lib: update libmetal to SHA cd4fb67a4f50
Origin: https://github.com/OpenAMP/libmetal Commit: cd4fb67a4f5080665bc9d31c8272f7c411e037c2 Status: Merge libmetal version 2022.10.0 after removing useless dirs to bring fixes and support for the new cache API in Zephyr. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
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@ -29,12 +29,53 @@ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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Apache License :2.0
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========================================
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Copyright [yyyy] [name of copyright owner]
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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GPL 2.0
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========================================
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Copyright (C) yyyy name of author
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This program is free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public License
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as published by the Free Software Foundation; either version 2
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of the License, or (at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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Linux Syscall Note
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========================================
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NOTE! This copyright does *not* cover user programs that use kernel services by normal system calls - this is merely considered normal use of the kernel, and does *not* fall under the heading of "derived work". Also note that the GPL below is copyrighted by the Free Software Foundation, but the instance of code that it refers to (the Linux kernel) is copyrighted by me and others who actually wrote it.
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Also note that the only valid version of the GPL as far as the kernel is concerned is _this_ particular version of the license (ie v2, not v2.2 or v3.x or whatever), unless explicitly otherwise stated.
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Notes
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=========================================
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Use the following tag instead of the full license text in the individual files:
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SPDX-License-Identifier: BSD-3-Clause
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SPDX-License-Identifier: Apache-2.0
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SPDX-License-Identifier: GPL-2.0
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SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
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This enables machine processing of license information based on the SPDX
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License Identifiers that are here available: http://spdx.org/licenses/
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@ -1,3 +1,3 @@
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VERSION_MAJOR = 1
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VERSION_MINOR = 2
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VERSION_MINOR = 3
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VERSION_PATCH = 0
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@ -72,5 +72,5 @@ option (WITH_DEFAULT_LOGGER "Build with default logger" ON)
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option (WITH_DOC "Build with documentation" ON)
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set (PROJECT_EC_FLAGS "-Wall -Werror -Wextra" CACHE STRING "")
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set (GLOBAL PROPERTY "PROJECT_EC_FLAGS" "-Wall -Werror -Wextra" CACHE STRING "")
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# vim: expandtab:ts=2:sw=2:smartindent
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@ -65,6 +65,8 @@ if (WITH_DEFAULT_LOGGER)
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add_definitions (-DDEFAULT_LOGGER_ON)
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endif (WITH_DEFAULT_LOGGER)
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get_property (_ec_flgs GLOBAL PROPERTY "PROJECT_EC_FLAGS")
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if (WITH_ZEPHYR)
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zephyr_library_named(metal)
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add_dependencies(metal offsets_h)
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@ -77,10 +79,7 @@ else (WITH_ZEPHYR)
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add_library (${_lib} SHARED ${_sources})
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target_link_libraries (${_lib} ${_deps})
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install (TARGETS ${_lib} LIBRARY DESTINATION ${CMAKE_INSTALL_LIBDIR})
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if (PROJECT_EC_FLAGS)
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string(REPLACE " " ";" _ec_flgs ${PROJECT_EC_FLAGS})
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target_compile_options (${_lib} PUBLIC ${_ec_flgs})
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endif (PROJECT_EC_FLAGS)
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target_compile_options (${_lib} PUBLIC ${_ec_flgs})
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set_target_properties (${_lib} PROPERTIES
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OUTPUT_NAME "${PROJECT_NAME}"
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VERSION "${PROJECT_VERSION}"
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@ -93,10 +92,7 @@ else (WITH_ZEPHYR)
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set (_lib ${PROJECT_NAME}-static)
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add_library (${_lib} STATIC ${_sources})
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install (TARGETS ${_lib} ARCHIVE DESTINATION ${CMAKE_INSTALL_LIBDIR})
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if (PROJECT_EC_FLAGS)
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string(REPLACE " " ";" _ec_flgs ${PROJECT_EC_FLAGS})
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target_compile_options (${_lib} PUBLIC ${_ec_flgs})
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endif (PROJECT_EC_FLAGS)
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target_compile_options (${_lib} PUBLIC ${_ec_flgs})
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set_target_properties (${_lib} PROPERTIES
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OUTPUT_NAME "${PROJECT_NAME}"
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)
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@ -12,6 +12,7 @@
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#ifndef __METAL_LIST__H__
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#define __METAL_LIST__H__
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#include <stdbool.h>
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#include <stdlib.h>
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#ifdef __cplusplus
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@ -96,6 +97,18 @@ static inline struct metal_list *metal_list_first(struct metal_list *list)
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for ((node) = (list)->next; \
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(node) != (list); \
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(node) = (node)->next)
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static inline bool metal_list_find_node(struct metal_list *list,
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struct metal_list *node)
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{
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struct metal_list *n;
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metal_list_for_each(list, n) {
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if (n == node)
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return true;
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}
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return false;
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}
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/** @} */
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#ifdef __cplusplus
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@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2016, Xilinx Inc. and Contributors. All rights reserved.
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* Copyright (C) 2022, Advanced Micro Devices, Inc.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -20,8 +21,6 @@
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#include "xreg_cortexr5.h"
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#include "xscugic.h"
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#define MPU_REGION_SIZE_MIN 0x20
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void sys_irq_restore_enable(unsigned int flags)
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{
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Xil_ExceptionEnableMask(~flags);
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@ -61,27 +60,16 @@ void metal_weak metal_generic_default_poll(void)
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metal_asm volatile("wfi");
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}
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/**
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* The code moved to cortexr5/xil_mpu.c:Xil_MemMap()
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* NULL in pa masks possible Xil_MemMap() errors.
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*/
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void *metal_machine_io_mem_map(void *va, metal_phys_addr_t pa,
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size_t size, unsigned int flags)
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{
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size_t rsize = MPU_REGION_SIZE_MIN;
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metal_phys_addr_t base_pa;
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void *__attribute__((unused)) physaddr;
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if (!flags)
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return va;
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while (1) {
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if (rsize < size) {
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rsize <<= 1;
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continue;
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} else {
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base_pa = pa & ~(rsize - 1);
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if ((base_pa + rsize) < (pa + size)) {
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rsize <<= 1;
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continue;
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}
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break;
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}
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}
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Xil_SetMPURegion(base_pa, rsize, flags);
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physaddr = Xil_MemMap(pa, size, flags);
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metal_assert(physaddr == (void *)pa);
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return va;
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}
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@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2016, Xilinx Inc. and Contributors. All rights reserved.
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* Copyright (C) 2022, Advanced Micro Devices, Inc.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "xreg_cortexr5.h"
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#include "xscugic.h"
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#define MPU_REGION_SIZE_MIN 0x20
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void sys_irq_restore_enable(unsigned int flags)
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{
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Xil_ExceptionEnableMask(~flags);
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metal_asm volatile("wfi");
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}
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/**
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* The code moved to cortexr5/xil_mpu.c:Xil_MemMap()
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* NULL in pa masks possible Xil_MemMap() errors.
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*/
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void *metal_machine_io_mem_map(void *va, metal_phys_addr_t pa,
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size_t size, unsigned int flags)
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{
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size_t rsize = MPU_REGION_SIZE_MIN;
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metal_phys_addr_t base_pa;
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void *__attribute__((unused)) physaddr;
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if (!flags)
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return va;
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while (1) {
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if (rsize < size) {
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rsize <<= 1;
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continue;
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} else {
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base_pa = pa & ~(rsize - 1);
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if ((base_pa + rsize) < (pa + size)) {
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rsize <<= 1;
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continue;
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}
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break;
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}
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}
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Xil_SetMPURegion(base_pa, rsize, flags);
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physaddr = Xil_MemMap(pa, size, flags);
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metal_assert(physaddr == (void *)pa);
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return va;
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}
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@ -25,12 +25,12 @@ extern "C" {
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static inline void __metal_cache_flush(void *addr, unsigned int len)
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{
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sys_cache_data_range(addr, len, K_CACHE_WB);
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sys_cache_data_flush_range(addr, len);
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}
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static inline void __metal_cache_invalidate(void *addr, unsigned int len)
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{
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sys_cache_data_range(addr, len, K_CACHE_INVD);
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sys_cache_data_invd_range(addr, len);
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}
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#ifdef __cplusplus
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