ext: libmetal: Update import of libmetal from b4b5bea to a4f7630
Pull in a more recent version of libmetal, motivated by the void pointer fixes in efc33fe. libmetal's b4b5bea to a4f7630 spans: a4f7630 linux: device: fix max chars to copy for the dev name 10a0d5b lib: system: freertos: mutex: change to use atomic_int ... 4e670c5 ci: Zephyr env var for toolchain 3bef6f0 cmake: Fix Zephyr library integration 13158c3 compiler: add IAR compiler file 0820a2e microblaze: suppress io 64-bit R/W access if 64 bit atomic ... e2e5608 io: suppress io 64 bit R/W access if 64 bit atomic not ... efc33fe io: fix compilation error for void pointers. 32ad1d2 cache: fix compilation issue c1ade0d travis CI: update Zephyr SDK version to 0.9.3 c49d7cd travis CI: updated arm compiler ubuntu package d279a6a travis ci: Update FreeRTOS download path 5c70105 irq: update sys_irq_restore_enable and sys_irq_save_disable 05f0cd4 cmake: Only look for doxygen package if docs enabled b4b5bea zephyr: Introduce WITH_ZEPHYR_LIB option At current time of writing, libmetal's HEAD is 5bc2106641. However this failed to build in their Travis CI. The latest passing commit is a4f7630. Signed-off-by: Mark Ruvald Pedersen <mped@oticon.com>
This commit is contained in:
parent
d3554a9e6a
commit
ae6daa6207
8
README
8
README
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@ -4,10 +4,8 @@ libmetal
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Origin:
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https://github.com/OpenAMP/libmetal
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Status:
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b4b5beab4b71388d63c732470b6d6da606ae8ffc
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When we import libmetal we removed the tests/ and examples/ dir to reduce
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Import instructions:
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When we import libmetal we remove the tests/ and examples/ dir to reduce
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the amount of code imported.
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Purpose:
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@ -29,7 +27,7 @@ URL:
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https://github.com/OpenAMP/libmetal
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commit:
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b4b5beab4b71388d63c732470b6d6da606ae8ffc
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a4f763094cb26cd8f7abdff251f57a6a802c039d
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Maintained-by:
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External
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@ -8,14 +8,15 @@ dist: trusty
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env:
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global:
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- ZEPHYR_GCC_VARIANT=zephyr
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- ZEPHYR_TOOLCHAIN_VARIANT=zephyr
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- ZEPHYR_SDK_INSTALL_DIR=/opt/zephyr-sdk
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- ZEPHYR_BASE=$TRAVIS_BUILD_DIR/deps/zephyr
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- ZEPHYR_SDK_VERSION=0.9.2
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- ZEPHYR_SDK_VERSION=0.9.3
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- ZEPHYR_SDK_DOWNLOAD_FOLDER=https://github.com/zephyrproject-rtos/meta-zephyr-sdk/releases/download/$ZEPHYR_SDK_VERSION
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- ZEPHYR_SDK_SETUP_BINARY=zephyr-sdk-$ZEPHYR_SDK_VERSION-setup.run
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- ZEPHYR_SDK_DOWNLOAD_URL=$ZEPHYR_SDK_DOWNLOAD_FOLDER/$ZEPHYR_SDK_SETUP_BINARY
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- FREERTOS_ZIP_URL=https://downloads.sourceforge.net/project/freertos/FreeRTOS/V10.0.1/FreeRTOSv10.0.1.zip
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- FREERTOS_ZIP_URL=https://cfhcable.dl.sourceforge.net/project/freertos/FreeRTOS/V10.0.1/FreeRTOSv10.0.1.zip
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- GCC_ARM_COMPILER_PACKAGE=gcc-arm-embedded_7-2018q2-1~trusty1_amd64.deb
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matrix:
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fast_finish: true
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@ -47,8 +48,8 @@ before_install:
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fi
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# This is to kick start CI on generic platform. Will need to have a proper way to get the required packages
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- if [[ "$TARGET" == "generic" || "$TARGET" == "freertos" ]]; then
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wget http://ppa.launchpad.net/team-gcc-arm-embedded/ppa/ubuntu/pool/main/g/gcc-arm-none-eabi/gcc-arm-embedded_7-2017q4-1~trusty3_amd64.deb &&
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sudo dpkg -i gcc-arm-embedded_7-2017q4-1~trusty3_amd64.deb;
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wget http://ppa.launchpad.net/team-gcc-arm-embedded/ppa/ubuntu/pool/main/g/gcc-arm-none-eabi/${GCC_ARM_COMPILER_PACKAGE} &&
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sudo dpkg -i ${GCC_ARM_COMPILER_PACKAGE};
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fi
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- if [[ "$TARGET" == "freertos" ]]; then
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wget $FREERTOS_ZIP_URL &&
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@ -1,4 +1,6 @@
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find_package (Doxygen)
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if (WITH_DOC)
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find_package (Doxygen)
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endif (WITH_DOC)
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if ("${CMAKE_SYSTEM_NAME}" STREQUAL "Linux")
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@ -63,7 +63,7 @@ endif (WITH_DEFAULT_LOGGER)
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if (WITH_ZEPHYR)
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zephyr_library_named(metal)
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add_dependencies(metal offsets_h)
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target_sources (metal PRIVATE ${_sources})
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zephyr_library_sources(${_sources})
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zephyr_include_directories(${CMAKE_CURRENT_BINARY_DIR}/include)
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else (WITH_ZEPHYR)
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# Build a shared library if so configured.
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@ -32,7 +32,7 @@ extern "C" {
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*/
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static inline void metal_cache_flush(void *addr, unsigned int len)
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{
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return __metal_cache_flush(addr, len);
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__metal_cache_flush(addr, len);
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}
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/**
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@ -45,7 +45,7 @@ static inline void metal_cache_flush(void *addr, unsigned int len)
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*/
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static inline void metal_cache_invalidate(void *addr, unsigned int len)
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{
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return __metal_cache_invalidate(addr, len);
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__metal_cache_invalidate(addr, len);
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}
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/** @} */
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@ -14,6 +14,8 @@
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#if defined(__GNUC__)
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# include <metal/compiler/gcc/compiler.h>
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#elif defined(__ICCARM__)
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# include <metal/compiler/iar/compiler.h>
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#else
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# error "Missing compiler support"
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#endif
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@ -1,3 +1,4 @@
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add_subdirectory (gcc)
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add_subdirectory (iar)
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# vim: expandtab:ts=2:sw=2:smartindent
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@ -0,0 +1,3 @@
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collect (PROJECT_LIB_HEADERS compiler.h)
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# vim: expandtab:ts=2:sw=2:smartindent
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@ -0,0 +1,27 @@
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/*
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* Copyright (c) 2018, ST Microelectronics. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/*
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* @file iar/compiler.h
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* @brief IAR specific primitives for libmetal.
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*/
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#ifndef __METAL_IAR_COMPILER__H__
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#define __METAL_IAR_COMPILER__H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define restrict __restrict__
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#define metal_align(n) __attribute__((aligned(n)))
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#define metal_weak __attribute__((weak))
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#ifdef __cplusplus
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}
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#endif
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#endif /* __METAL_IAR_COMPILER__H__ */
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@ -33,7 +33,8 @@ void metal_io_init(struct metal_io_region *io, void *virt,
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int metal_io_block_read(struct metal_io_region *io, unsigned long offset,
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void *restrict dst, int len)
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{
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void *ptr = metal_io_virt(io, offset);
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unsigned char *ptr = metal_io_virt(io, offset);
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unsigned char *dest = dst;
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int retlen;
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if (offset > io->size)
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@ -47,20 +48,20 @@ int metal_io_block_read(struct metal_io_region *io, unsigned long offset,
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} else {
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atomic_thread_fence(memory_order_seq_cst);
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while ( len && (
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((uintptr_t)dst % sizeof(int)) ||
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((uintptr_t)dest % sizeof(int)) ||
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((uintptr_t)ptr % sizeof(int)))) {
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*(unsigned char *)dst =
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*(unsigned char *)dest =
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*(const unsigned char *)ptr;
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dst++;
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dest++;
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ptr++;
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len--;
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}
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for (; len >= (int)sizeof(int); dst += sizeof(int),
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for (; len >= (int)sizeof(int); dest += sizeof(int),
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ptr += sizeof(int),
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len -= sizeof(int))
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*(unsigned int *)dst = *(const unsigned int *)ptr;
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for (; len != 0; dst++, ptr++, len--)
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*(unsigned char *)dst =
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*(unsigned int *)dest = *(const unsigned int *)ptr;
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for (; len != 0; dest++, ptr++, len--)
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*(unsigned char *)dest =
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*(const unsigned char *)ptr;
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}
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return retlen;
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@ -69,7 +70,8 @@ int metal_io_block_read(struct metal_io_region *io, unsigned long offset,
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int metal_io_block_write(struct metal_io_region *io, unsigned long offset,
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const void *restrict src, int len)
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{
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void *ptr = metal_io_virt(io, offset);
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unsigned char *ptr = metal_io_virt(io, offset);
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const unsigned char *source = src;
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int retlen;
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if (offset > io->size)
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@ -83,20 +85,20 @@ int metal_io_block_write(struct metal_io_region *io, unsigned long offset,
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} else {
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while ( len && (
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((uintptr_t)ptr % sizeof(int)) ||
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((uintptr_t)src % sizeof(int)))) {
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((uintptr_t)source % sizeof(int)))) {
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*(unsigned char *)ptr =
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*(const unsigned char *)src;
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*(const unsigned char *)source;
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ptr++;
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src++;
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source++;
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len--;
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}
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for (; len >= (int)sizeof(int); ptr += sizeof(int),
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src += sizeof(int),
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source += sizeof(int),
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len -= sizeof(int))
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*(unsigned int *)ptr = *(const unsigned int *)src;
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for (; len != 0; ptr++, src++, len--)
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*(unsigned int *)ptr = *(const unsigned int *)source;
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for (; len != 0; ptr++, source++, len--)
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*(unsigned char *)ptr =
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*(const unsigned char *)src;
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*(const unsigned char *)source;
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atomic_thread_fence(memory_order_seq_cst);
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}
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return retlen;
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@ -105,7 +107,7 @@ int metal_io_block_write(struct metal_io_region *io, unsigned long offset,
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int metal_io_block_set(struct metal_io_region *io, unsigned long offset,
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unsigned char value, int len)
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{
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void *ptr = metal_io_virt(io, offset);
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unsigned char *ptr = metal_io_virt(io, offset);
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int retlen = len;
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if (offset > io->size)
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@ -233,12 +233,9 @@ metal_io_read(struct metal_io_region *io, unsigned long offset,
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return atomic_load_explicit((atomic_uint *)ptr, order);
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else if (ptr && sizeof(atomic_ulong) == width)
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return atomic_load_explicit((atomic_ulong *)ptr, order);
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else if (ptr && sizeof(atomic_ullong) == width)
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#ifndef NO_ATOMIC_64_SUPPORT
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else if (ptr && sizeof(atomic_ullong) == width)
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return atomic_load_explicit((atomic_ullong *)ptr, order);
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#else
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return metal_processor_io_read64((atomic_ullong *)ptr, order);
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#endif
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metal_assert(0);
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return 0; /* quiet compiler */
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@ -269,11 +266,9 @@ metal_io_write(struct metal_io_region *io, unsigned long offset,
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atomic_store_explicit((atomic_uint *)ptr, value, order);
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else if (ptr && sizeof(atomic_ulong) == width)
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atomic_store_explicit((atomic_ulong *)ptr, value, order);
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else if (ptr && sizeof(atomic_ullong) == width)
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#ifndef NO_ATOMIC_64_SUPPORT
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else if (ptr && sizeof(atomic_ullong) == width)
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atomic_store_explicit((atomic_ullong *)ptr, value, order);
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#else
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metal_processor_io_write64((atomic_ullong *)ptr, value, order);
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#endif
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else
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metal_assert (0);
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@ -17,28 +17,4 @@
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#define metal_cpu_yield()
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static inline void metal_processor_io_write64(void *ptr, uint64_t value,
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memory_order order)
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{
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void *tmp = &value;
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atomic_store_explicit((atomic_ulong *)ptr, *((atomic_ulong *)tmp), order);
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tmp += sizeof(atomic_ulong);
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ptr += sizeof(atomic_ulong);
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atomic_store_explicit((atomic_ulong *)ptr, *((atomic_ulong *)tmp), order);
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}
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static inline uint64_t metal_processor_io_read64(void *ptr, memory_order order)
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{
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uint64_t long_ret;
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void *tmp = &long_ret;
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*((atomic_ulong *)tmp) = atomic_load_explicit((atomic_ulong *)ptr, order);
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tmp += sizeof(atomic_ulong);
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ptr += sizeof(atomic_ulong);
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*((atomic_ulong *)tmp) = atomic_load_explicit((atomic_ulong *)ptr, order);
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return long_ret;
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}
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#endif /* __METAL_MICROBLAZE__H__ */
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@ -234,15 +234,12 @@ int metal_irq_unregister(int irq,
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unsigned int metal_irq_save_disable(void)
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{
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sys_irq_save_disable();
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return 0;
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return sys_irq_save_disable();
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}
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void metal_irq_restore_enable(unsigned int flags)
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{
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(void)flags;
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sys_irq_restore_enable();
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sys_irq_restore_enable(flags);
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}
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void metal_irq_enable(unsigned int vector)
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@ -16,24 +16,22 @@
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#ifndef __METAL_FREERTOS_MUTEX__H__
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#define __METAL_FREERTOS_MUTEX__H__
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#include <metal/assert.h>
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#include "FreeRTOS.h"
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#include "semphr.h"
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#include <metal/atomic.h>
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#include <stdlib.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef struct {
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SemaphoreHandle_t m;
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atomic_int v;
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} metal_mutex_t;
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/*
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* METAL_MUTEX_INIT - used for initializing an mutex elmenet in a static struct
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* or global
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*/
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#define METAL_MUTEX_INIT(m) { NULL }
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#define METAL_MUTEX_INIT(m) { ATOMIC_VAR_INIT(0) }
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/*
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* METAL_MUTEX_DEFINE - used for defining and initializing a global or
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* static singleton mutex
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@ -42,40 +40,34 @@ typedef struct {
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static inline void __metal_mutex_init(metal_mutex_t *mutex)
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{
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metal_assert(mutex);
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mutex->m = xSemaphoreCreateMutex();
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metal_assert(mutex->m != NULL);
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atomic_store(&mutex->v, 0);
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}
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static inline void __metal_mutex_deinit(metal_mutex_t *mutex)
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{
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metal_assert(mutex && mutex->m != NULL);
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vSemaphoreDelete(mutex->m);
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mutex->m=NULL;
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(void)mutex;
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}
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static inline int __metal_mutex_try_acquire(metal_mutex_t *mutex)
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{
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metal_assert(mutex && mutex->m != NULL);
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return xSemaphoreTake(mutex->m, ( TickType_t ) 0 );
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return 1 - atomic_flag_test_and_set(&mutex->v);
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}
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static inline void __metal_mutex_acquire(metal_mutex_t *mutex)
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{
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metal_assert(mutex && mutex->m != NULL);
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xSemaphoreTake(mutex->m, portMAX_DELAY);
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while (atomic_flag_test_and_set(&mutex->v)) {
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;
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}
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}
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static inline void __metal_mutex_release(metal_mutex_t *mutex)
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{
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metal_assert(mutex && mutex->m != NULL);
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xSemaphoreGive(mutex->m);
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atomic_flag_clear(&mutex->v);
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}
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|
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static inline int __metal_mutex_is_acquired(metal_mutex_t *mutex)
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{
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metal_assert(mutex && mutex->m != NULL);
|
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return (NULL == xSemaphoreGetMutexHolder(mutex->m)) ? 0 : 1;
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return atomic_load(&mutex->v);
|
||||
}
|
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|
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#ifdef __cplusplus
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||||
|
|
|
@ -38,12 +38,12 @@ struct metal_state {
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/**
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* @brief restore interrupts to state before disable_global_interrupt()
|
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*/
|
||||
void sys_irq_restore_enable(void);
|
||||
void sys_irq_restore_enable(unsigned int flags);
|
||||
|
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/**
|
||||
* @brief disable all interrupts
|
||||
*/
|
||||
void sys_irq_save_disable(void);
|
||||
unsigned int sys_irq_save_disable(void);
|
||||
|
||||
#endif /* METAL_INTERNAL */
|
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|
||||
|
|
|
@ -14,13 +14,15 @@
|
|||
#include <metal/utilities.h>
|
||||
#include <stdint.h>
|
||||
|
||||
void sys_irq_restore_enable(void)
|
||||
void sys_irq_restore_enable(unsigned int flags)
|
||||
{
|
||||
metal_unused(flags);
|
||||
/* Add implementation here */
|
||||
}
|
||||
|
||||
void sys_irq_save_disable(void)
|
||||
unsigned int sys_irq_save_disable(void)
|
||||
{
|
||||
return 0;
|
||||
/* Add implementation here */
|
||||
}
|
||||
|
||||
|
|
|
@ -28,21 +28,19 @@
|
|||
/* Mask off lower bits of addr */
|
||||
#define ARM_AR_MEM_TTB_SECT_SIZE_MASK (~(ARM_AR_MEM_TTB_SECT_SIZE-1UL))
|
||||
|
||||
/* default value setting for disabling interrupts */
|
||||
static unsigned int int_old_val = XIL_EXCEPTION_ALL;
|
||||
|
||||
void sys_irq_restore_enable(void)
|
||||
void sys_irq_restore_enable(unsigned int flags)
|
||||
{
|
||||
Xil_ExceptionEnableMask(~int_old_val);
|
||||
Xil_ExceptionEnableMask(~flags);
|
||||
}
|
||||
|
||||
void sys_irq_save_disable(void)
|
||||
unsigned int sys_irq_save_disable(void)
|
||||
{
|
||||
int_old_val = mfcpsr() & XIL_EXCEPTION_ALL;
|
||||
unsigned int state = mfcpsr() & XIL_EXCEPTION_ALL;
|
||||
|
||||
if (XIL_EXCEPTION_ALL != int_old_val) {
|
||||
if (XIL_EXCEPTION_ALL != state) {
|
||||
Xil_ExceptionDisableMask(XIL_EXCEPTION_ALL);
|
||||
}
|
||||
return state;
|
||||
}
|
||||
|
||||
void metal_machine_cache_flush(void *addr, unsigned int len)
|
||||
|
|
|
@ -22,21 +22,19 @@
|
|||
#define MB (1024 * 1024UL)
|
||||
#define GB (1024 * 1024 * 1024UL)
|
||||
|
||||
/* default value setting for disabling interrupts */
|
||||
static unsigned int int_old_val = XIL_EXCEPTION_ALL;
|
||||
|
||||
void sys_irq_restore_enable(void)
|
||||
void sys_irq_restore_enable(unsigned int flags)
|
||||
{
|
||||
Xil_ExceptionEnableMask(~int_old_val);
|
||||
Xil_ExceptionEnableMask(~flags);
|
||||
}
|
||||
|
||||
void sys_irq_save_disable(void)
|
||||
unsigned int sys_irq_save_disable(void)
|
||||
{
|
||||
int_old_val = mfcpsr() & XIL_EXCEPTION_ALL;
|
||||
unsigned int state = mfcpsr() & XIL_EXCEPTION_ALL;
|
||||
|
||||
if (XIL_EXCEPTION_ALL != int_old_val) {
|
||||
if (XIL_EXCEPTION_ALL != state) {
|
||||
Xil_ExceptionDisableMask(XIL_EXCEPTION_ALL);
|
||||
}
|
||||
return state;
|
||||
}
|
||||
|
||||
void metal_machine_cache_flush(void *addr, unsigned int len)
|
||||
|
|
|
@ -22,21 +22,19 @@
|
|||
|
||||
#define MPU_REGION_SIZE_MIN 0x20
|
||||
|
||||
/* default value setting for disabling interrupts */
|
||||
static unsigned int int_old_val = XIL_EXCEPTION_ALL;
|
||||
|
||||
void sys_irq_restore_enable(void)
|
||||
void sys_irq_restore_enable(unsigned int flags)
|
||||
{
|
||||
Xil_ExceptionEnableMask(~int_old_val);
|
||||
Xil_ExceptionEnableMask(~flags);
|
||||
}
|
||||
|
||||
void sys_irq_save_disable(void)
|
||||
unsigned int sys_irq_save_disable(void)
|
||||
{
|
||||
int_old_val = mfcpsr() & XIL_EXCEPTION_ALL;
|
||||
unsigned int state = mfcpsr() & XIL_EXCEPTION_ALL;
|
||||
|
||||
if (XIL_EXCEPTION_ALL != int_old_val) {
|
||||
if (XIL_EXCEPTION_ALL != state) {
|
||||
Xil_ExceptionDisableMask(XIL_EXCEPTION_ALL);
|
||||
}
|
||||
return state;
|
||||
}
|
||||
|
||||
void metal_machine_cache_flush(void *addr, unsigned int len)
|
||||
|
|
|
@ -234,15 +234,12 @@ int metal_irq_unregister(int irq,
|
|||
|
||||
unsigned int metal_irq_save_disable(void)
|
||||
{
|
||||
sys_irq_save_disable();
|
||||
return 0;
|
||||
return sys_irq_save_disable();
|
||||
}
|
||||
|
||||
void metal_irq_restore_enable(unsigned int flags)
|
||||
{
|
||||
(void)flags;
|
||||
|
||||
sys_irq_restore_enable();
|
||||
sys_irq_restore_enable(flags);
|
||||
}
|
||||
|
||||
void metal_irq_enable(unsigned int vector)
|
||||
|
|
|
@ -22,36 +22,36 @@
|
|||
|
||||
#define MSR_IE 0x2UL /* MicroBlaze status register interrupt enable mask */
|
||||
|
||||
static unsigned int int_old_val = 0;
|
||||
|
||||
#if (XPAR_MICROBLAZE_USE_MSR_INSTR != 0)
|
||||
void sys_irq_save_disable(void)
|
||||
unsigned int sys_irq_save_disable(void)
|
||||
{
|
||||
unsigned int state;
|
||||
|
||||
asm volatile(" mfs %0, rmsr \n"
|
||||
" msrclr r0, %1 \n"
|
||||
: "=r"(int_old_val)
|
||||
: "=r"(state)
|
||||
: "i"(MSR_IE)
|
||||
: "memory");
|
||||
|
||||
int_old_val &= MSR_IE;
|
||||
return state &= MSR_IE;
|
||||
}
|
||||
#else /* XPAR_MICROBLAZE_USE_MSR_INSTR == 0 */
|
||||
void sys_irq_save_disable(void)
|
||||
unsigned int sys_irq_save_disable(void)
|
||||
{
|
||||
unsigned int tmp;
|
||||
unsigned int tmp, state;
|
||||
|
||||
asm volatile (" mfs %0, rmsr \n"
|
||||
" andi %1, %0, %2 \n"
|
||||
" mts rmsr, %1 \n"
|
||||
: "=r"(int_old_val), "=r"(tmp)
|
||||
: "=r"(state), "=r"(tmp)
|
||||
: "i"(~MSR_IE)
|
||||
: "memory");
|
||||
|
||||
int_old_val &= MSR_IE;
|
||||
return state &= MSR_IE;
|
||||
}
|
||||
#endif /* XPAR_MICROBLAZE_USE_MSR_INSTR */
|
||||
|
||||
void sys_irq_restore_enable(void)
|
||||
void sys_irq_restore_enable(unsigned int flags)
|
||||
{
|
||||
unsigned int tmp;
|
||||
|
||||
|
@ -59,7 +59,7 @@ void sys_irq_restore_enable(void)
|
|||
" or %0, %0, %1 \n"
|
||||
" mts rmsr, %0 \n"
|
||||
: "=r"(tmp)
|
||||
: "r"(int_old_val)
|
||||
: "r"(~flags)
|
||||
: "memory");
|
||||
}
|
||||
|
||||
|
|
|
@ -47,12 +47,12 @@ struct metal_state {
|
|||
/**
|
||||
* @brief restore interrupts to state before disable_global_interrupt()
|
||||
*/
|
||||
void sys_irq_restore_enable(void);
|
||||
void sys_irq_restore_enable(unsigned int flags);
|
||||
|
||||
/**
|
||||
* @brief disable all interrupts
|
||||
*/
|
||||
void sys_irq_save_disable(void);
|
||||
unsigned int sys_irq_save_disable(void);
|
||||
|
||||
#endif /* METAL_INTERNAL */
|
||||
|
||||
|
|
|
@ -14,13 +14,15 @@
|
|||
#include <metal/utilities.h>
|
||||
#include <stdint.h>
|
||||
|
||||
void sys_irq_restore_enable(void)
|
||||
void sys_irq_restore_enable(unsigned int flags)
|
||||
{
|
||||
metal_unused(flags);
|
||||
/* Add implementation here */
|
||||
}
|
||||
|
||||
void sys_irq_save_disable(void)
|
||||
unsigned int sys_irq_save_disable(void)
|
||||
{
|
||||
return 0;
|
||||
/* Add implementation here */
|
||||
}
|
||||
|
||||
|
|
|
@ -25,21 +25,19 @@
|
|||
/* Mask off lower bits of addr */
|
||||
#define ARM_AR_MEM_TTB_SECT_SIZE_MASK (~(ARM_AR_MEM_TTB_SECT_SIZE-1UL))
|
||||
|
||||
/* default value setting for disabling interrupts */
|
||||
static unsigned int int_old_val = XIL_EXCEPTION_ALL;
|
||||
|
||||
void sys_irq_restore_enable(void)
|
||||
void sys_irq_restore_enable(unsigned int flags)
|
||||
{
|
||||
Xil_ExceptionEnableMask(~int_old_val);
|
||||
Xil_ExceptionEnableMask(~flags);
|
||||
}
|
||||
|
||||
void sys_irq_save_disable(void)
|
||||
unsigned int sys_irq_save_disable(void)
|
||||
{
|
||||
int_old_val = mfcpsr() & XIL_EXCEPTION_ALL;
|
||||
unsigned int state = mfcpsr() & XIL_EXCEPTION_ALL;
|
||||
|
||||
if (XIL_EXCEPTION_ALL != int_old_val) {
|
||||
if (XIL_EXCEPTION_ALL != state) {
|
||||
Xil_ExceptionDisableMask(XIL_EXCEPTION_ALL);
|
||||
}
|
||||
return state;
|
||||
}
|
||||
|
||||
void metal_machine_cache_flush(void *addr, unsigned int len)
|
||||
|
|
|
@ -22,21 +22,19 @@
|
|||
#define MB (1024 * 1024UL)
|
||||
#define GB (1024 * 1024 * 1024UL)
|
||||
|
||||
/* default value setting for disabling interrupts */
|
||||
static unsigned int int_old_val = XIL_EXCEPTION_ALL;
|
||||
|
||||
void sys_irq_restore_enable(void)
|
||||
void sys_irq_restore_enable(unsigned int flags)
|
||||
{
|
||||
Xil_ExceptionEnableMask(~int_old_val);
|
||||
Xil_ExceptionEnableMask(~flags);
|
||||
}
|
||||
|
||||
void sys_irq_save_disable(void)
|
||||
unsigned int sys_irq_save_disable(void)
|
||||
{
|
||||
int_old_val = mfcpsr() & XIL_EXCEPTION_ALL;
|
||||
unsigned int state = mfcpsr() & XIL_EXCEPTION_ALL;
|
||||
|
||||
if (XIL_EXCEPTION_ALL != int_old_val) {
|
||||
if (XIL_EXCEPTION_ALL != state) {
|
||||
Xil_ExceptionDisableMask(XIL_EXCEPTION_ALL);
|
||||
}
|
||||
return state;
|
||||
}
|
||||
|
||||
void metal_machine_cache_flush(void *addr, unsigned int len)
|
||||
|
|
|
@ -22,21 +22,19 @@
|
|||
|
||||
#define MPU_REGION_SIZE_MIN 0x20
|
||||
|
||||
/* default value setting for disabling interrupts */
|
||||
static unsigned int int_old_val = XIL_EXCEPTION_ALL;
|
||||
|
||||
void sys_irq_restore_enable(void)
|
||||
void sys_irq_restore_enable(unsigned int flags)
|
||||
{
|
||||
Xil_ExceptionEnableMask(~int_old_val);
|
||||
Xil_ExceptionEnableMask(~flags);
|
||||
}
|
||||
|
||||
void sys_irq_save_disable(void)
|
||||
unsigned int sys_irq_save_disable(void)
|
||||
{
|
||||
int_old_val = mfcpsr() & XIL_EXCEPTION_ALL;
|
||||
unsigned int state = mfcpsr() & XIL_EXCEPTION_ALL;
|
||||
|
||||
if (XIL_EXCEPTION_ALL != int_old_val) {
|
||||
if (XIL_EXCEPTION_ALL != state) {
|
||||
Xil_ExceptionDisableMask(XIL_EXCEPTION_ALL);
|
||||
}
|
||||
return state;
|
||||
}
|
||||
|
||||
void metal_machine_cache_flush(void *addr, unsigned int len)
|
||||
|
|
|
@ -430,7 +430,7 @@ static int metal_linux_dev_open(struct metal_bus *bus,
|
|||
|
||||
/* Reset device data. */
|
||||
memset(ldev, 0, sizeof(*ldev));
|
||||
strncpy(ldev->dev_name, dev_name, sizeof(ldev->dev_name));
|
||||
strncpy(ldev->dev_name, dev_name, sizeof(ldev->dev_name) - 1);
|
||||
ldev->fd = -1;
|
||||
ldev->ldrv = ldrv;
|
||||
ldev->device.bus = bus;
|
||||
|
|
Loading…
Reference in New Issue