Commit Graph

38 Commits

Author SHA1 Message Date
Thomas Stranger d49fb6dbe7 scripts: minor fixes to be able to execute series_update on linux
On linux the script crashes, when subprocess.check_call()
parameters are passed as list and shell=True is set,
or if subprocess.check_call() parameters are passed as string
and shell=True is not set. These changes fix that.
2021-06-22 07:47:09 -05:00
Alexandre Bourdiol e3e435a80f scripts: serie_update.py: support master and main branches
https://github.com/STMicroelectronics/STM32CubeWL.git
has main branch instead of master.
So if master doesn't exist use main branch.

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2021-06-14 10:04:49 -05:00
Aurelien Jarno 98aca4a5e8 scripts/genpinctrl: use a pull-down for SPI SCK pin
When an STM32 SoC goes into STOP mode, the SPI device is disabled. This
cause the pins to not be drived anymore (i.e. they are floating) except
through their pull-up or pull-down.

From the logical point of view, the NSS pin is held high by a pull-up so
it's not a problem if the other pins are floating.  However those pins
are floating input for the slaves, which increase their power
consumption.

The solution is to hold the state of the pins through a pull-up or a
pull-down. This is already done for the NSS and MOSI pins, but not for
SCK. Fix that by using pull-down on the SCK pin the same way it is
already done for the MOSI pin.

(For the STM32L4 series, this is a regression introduced by the switch
to the device tree bindings for SPI pins configuration, see
zephyr #24097).

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2021-05-06 13:36:32 -05:00
Martin Jäger 802fef2e7d scripts/genpinctrl: Add HRTIM signals
Add signals generation for high-resolution timer (HRTIM).

HRTIM is not available on F1 targets.

Signed-off-by: Martin Jäger <martin@libre.solar>
2021-03-19 09:28:07 +01:00
Erwan Gouriou 32e61c2ab9 scripts: update_sm32_package: Fix issue with common_ll directory
When running ./update_stm32_package.py, script breaks due to
unexpected presence of common_ll/ under stm32cube/ .
Skip update when this directory is parsed.

Additionally, update README to avoid recurrent issue when using
the script.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-02-18 13:52:00 -06:00
Alexandre Bourdiol 2bc79045f9 scripts/genpinctrl: add STM32WL support
Update script to support STM32WL

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2021-02-16 07:55:31 -06:00
Erwan Gouriou 583799b640 scripts/genpinctrl: Add QUADSPI signals
Add signals generation for QUADSPI.
QSPI is not available on F1 targets.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-01-13 11:30:38 -06:00
Gerard Marull-Paretas 79a847bf2b scripts: tests: update genpinctrl tests
Update genpinctrl unit tests to match latest changes.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-12-03 08:39:09 -06:00
Gerard Marull-Paretas cfa91174ff scripts: genpinctrl: use STM32 open pin data
Change script to require STM32 Open Pin Data as input. README file is
now autogenerated so that it will always include the STM32 Open Pin Data
commit used for generation.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-12-03 08:39:09 -06:00
Gerard Marull-Paretas 77b7692fac scripts: genpinctrl: remove fmc mode
Mode is not required now, and in this case it causes mode detection
problems when specified.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-11-23 08:48:33 -06:00
Gerard Marull-Paretas e999fb82f4 scripts: genpinctrl: add configuration for FMC signals
Add Flexible Memory Controller (FMC) signals. Only available on some
non-F1 series.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-11-23 11:39:45 +01:00
Erwan Gouriou df82a758cb scripts/tests: Update tests following new algo
It is now possible that mode is not provided for non-F1 series
configs.
On F1 series ADC1_IN0 could be af 0.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-11-06 06:33:37 -06:00
Erwan Gouriou 0f855853fe scripts/genpinctrl: Remove mode for default (non-F1) config
Due to inference of mode for default configurations, mode
should not be set unless it specifies a specific signal variant.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-11-06 06:33:37 -06:00
Erwan Gouriou 634a286b27 scripts/genpinctrl: Add generation of additional functions
For non-F1 series:
Add generation of additional functions by inferring mode based
on AF detection instead of the mode value filed in config file.
This allows to detect that a signal should use 'analog' mode
when no AF function is associated to it.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-11-06 06:33:37 -06:00
Alexandre Bourdiol 4304374c39 scripts: serie_update.py: add systematic compilation of '_hal_rcc_ex.c'
Add systematic compialtion of '..._hal_rcc_ex.c' in 'CMakeLists.txt'
generation. There is more and more dependence of HAL IP to
'..._hal_rcc_ex.c'

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2020-11-05 22:06:47 -06:00
Alexandre Bourdiol 00ba06a3c7 scripts: fully redesign STM32Cube update scripts
Define class Stm32SerieUpdate
Use Pathlib instead of os.path
Add CLI option to provide directory path where to clone
STM32Cube repo (-r <repo_path>)
Reformat README.rst
Add *.pyc to .gitignore
Refactor variable naming (mainly paths),
* to be fully compilant with PEP8
* to be more understandable
* to simplify maintenance
Usage changed. Basic usage:
* update a single serie:
  'python3 update_stm32_package.py -s <stm32_serie>'
* update all serie at once:
  'python3 update_stm32_package.py

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2020-11-05 22:06:47 -06:00
Gerard Marull-Paretas 83a33ab973 scripts: genllheaders: add test to check generated headers
Add a test to check that generated output is correct.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-11-05 22:00:15 -06:00
Gerard Marull-Paretas 7827cf1b6c scripts: genllheaders: add script to generate common LL headers
The script is able to generate common LL headers which can be used in
both Zephyr and applications to make it easier to create family
independent code.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-11-05 22:00:15 -06:00
Gerard Marull-Paretas fb17cc5b42 scripts: genpinctrl: remove pwm variant for timer channels
STM32 timers are multi-purpose peripherals ranging from PWM, Input
capture, encoder, HALL sensor... In all series except F1 the timer pins
will always be configured in the same mode, i.e. alternate. So using a
variant for each functionality is not necessary. When working with F1
series mode is still required because the pin may operate in either
alternate or input mode depending on the assigned functionality.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-11-03 02:58:37 -06:00
Gerard Marull-Paretas a0267470e7 scripts: genpinctrl: provide path defaults
Provide script path defaults for CubeMX and output path.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-10-27 08:11:31 -05:00
Gerard Marull-Paretas 162f34b99a scripts: genpinctrl: use pathlib
Use pathlib facilities to improve path handling.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-10-27 08:11:31 -05:00
Erwan Gouriou bedf4f7704 scripts/genpinctrl: Add SDMMC pins configuration
Add config for SDMMC signals generation.
Not available on F1 series.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-27 08:11:12 -05:00
Erwan Gouriou 114ede9e9c script/genpinctrl: Update I2S signals
To be in line with existing c defined I2S signals,
set i2s_ck slew-rate to very-high-speed.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-27 08:07:15 -05:00
Gerard Marull-Paretas d8ae28c900 scripts: genpinctrl: add support for ethernet pins
Add support for ethernet pins.

F1 settings taken from RM0008 Rev 20, Table 209.
Other series settings are taken from current Zephyr settings. Note that
they will likely need to be adjusted, as very-high-speed is not needed
for all signals.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-10-22 07:46:04 -05:00
Erwan Gouriou b861dc701d scripts/genpinctrl: Add config for USB signals generation
Includes USB, OTG_FS and OTG_HS various signals.
This only concerns signals that are configured using alternate.
Signals requiring analog configuration are left a part for now on.
This could lead to situations where only USB_NOE signals are
available on some SoCs (other signals will require a script update
to be generated).


Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-22 07:44:36 -05:00
Gerard Marull-Paretas 7beab819d1 scripts: genpinctrl: process all remap blocks
Only first remap block was being processed, take into account all of
them now. Note that ``FULL_REMAP`` has been adjusted to ``REMAP_FULL``
as it was wrong. Tests updated to cover multiple remap cases.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-10-14 07:06:14 -05:00
Gerard Marull-Paretas 19256b48c0 scripts: genpinctrl: fix F1 generation for pins not in IP file
When working with F1 series pins not present in the GPIO IP files need
to be taken into account with the NO_REMAP setting.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-10-14 07:06:14 -05:00
Erwan Gouriou 3efa11b3f2 scripts/genpinctrl: Don't clean up README when generating
Now that dts contain a README file, don't clean up the entire
directory but only sub directories.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-09 08:24:11 -05:00
Erwan Gouriou 44f4b9cee2 scripts: Provide more specific name to config*.yaml files
config*.yaml file name is a bit vague.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-09 08:24:11 -05:00
Kumar Gala 2f716e53b1 genpinctrl: config-f1.yaml usb: remove USB_OTG_*
STM32F1 doesn't use pinmux for USB_OTG_* signals so remove from
config-f1.yaml

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-10-09 08:19:18 -05:00
Kumar Gala 78d56ac58a genpinctrl: config.yaml: Update for missing USB_OTG_FS_ID
USB_OTG_FS_ID signal was missing, add it to config.yaml

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-10-09 08:19:18 -05:00
Kumar Gala 9a86f73576 genpinctrl: config*yaml: Fix regex to support CAN_{TX,RX} and CANn_{TX,RX}
Some SoCs have the CAN signals without a number identifier (CAN_TX,
CAN_RX) so tweak regex to support with and without a number id.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-10-09 08:13:44 -05:00
Gerard Marull-Paretas bb47814823 scripts: genpinctrl: handle pin names with extra description
Some pin names have another name appended, e.g. "PA15 (JTDI)". Current
regex did not handle those cases, so it has been adjusted to handle
them.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-10-02 08:14:59 -05:00
Gerard Marull-Paretas a92cd408d8 scripts: add Python development tools
Add some useful development tools like the flake8 linter and black
autoformatter.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-09-29 09:03:24 -05:00
Gerard Marull-Paretas 8eb3d3fd0b scripts: tests: genpinctrl: add initial tests
Add some tests for genpinctrl script to make sure parsed and generated
data are correct.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-09-29 09:03:24 -05:00
Gerard Marull-Paretas bd2e89c49b scripts: genpinctrl: script for DT pinctrl generation
Initial version of the genpinctrl script. This script can be used to
automatically generate DT files with pinctrl configuration for all STM32
families using CubeMX database.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-09-29 09:03:24 -05:00
Erwan Gouriou 49cd8ccc6f Licenses: Add Apache-2.0 SPDX when missing
Some files were missing explicit License information.
Add Apache-2.0 SPDX tag in these few cases.


Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-06-25 21:31:01 -05:00
Francois Ramu a9347d32a7 script: build new zephyr module from a new STM32Cube
For stm32 series, get the version tree found on
https://github.com/STMicroelectronics/STM32Cube
and apply patches to update module to the latest version
run with $ python ./scripts/update_stm32_package.py stm32xx

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-01-14 14:35:30 +01:00