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lib/stm32wb: hci: Update lib to V1.8.0 Cube version 

Tested with 1.8 binary

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2020-08-27 16:36:05 +02:00 committed by Kumar Gala
parent c8ee94175f
commit c1dee8527e
7 changed files with 412 additions and 129 deletions
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13
lib/stm32wb/hci/README
View File

@ -6,7 +6,7 @@ Origin:
https://github.com/STMicroelectronics/STM32CubeWB
Status:
version 1.5.0
version 1.8.0
Purpose:
This library is used on stm32wb series to enable HCI communication between
@ -25,7 +25,7 @@ URL:
https://github.com/STMicroelectronics/STM32CubeWB
commit:
2b2c57a80d71ffeec182cc520e5a72af7b94778d
24ba9f167a82143a0a4fa8772cd4466070bcdb82
Maintained-by:
External
@ -44,6 +44,7 @@ Patch List:
- hw_ipcc.c
- app_common.h
- stm32_wpan_common.h
- ble_bufsize.h
* Remove dependency to hw_conf.h
This file is not actually needed. Remove inclusion so we don't need
@ -58,3 +59,11 @@ Patch List:
In case C-M0 binary includes BLE Host, inform that it should not be
used as, in Zephyr context, it is running on C-M4 side.
Impacted file: app_conf.h
* Add dependency to ble_bufsize.h
Some definitions of this file are now needed in app_conf.h
In original library, this inclusion is made indirectly through many
files. In order to limit the numbers of files to include, use a
shortcut and include directly this file.
Impacted file: app_conf.h
ST Internal Reference: 91777

2
lib/stm32wb/hci/app_common.h
View File

@ -78,7 +78,7 @@ extern "C"{
#define MODSUB( a, b, m ) MODADD( a, (m)-(b), m )
#define PAUSE( t ) M_BEGIN \
__IO int _i; \
volatile int _i; \
for ( _i = t; _i > 0; _i -- ); \
M_END

165
lib/stm32wb/hci/app_conf.h
View File

@ -1,10 +1,10 @@
/**
******************************************************************************
* @file app_conf.h
* @author MCD Application Team
* @brief Application configuration file
******************************************************************************
* @attention
******************************************************************************
* @file app_conf.h
* @author MCD Application Team
* @brief Application configuration file
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
@ -19,23 +19,24 @@
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __APP_CONF_H
#define __APP_CONF_H
#ifndef __APP_CONFIG_H
#define __APP_CONFIG_H
#include "hw.h"
/* hw_conf.h file is not used, remove the dependency */
/* #include "hw_conf.h" */
#include "hw_if.h"
#include "ble_bufsize.h"
/******************************************************************************
* Data Throughput Application Config
* Health Thermometer Application Config
******************************************************************************/
/**< generic parameters ******************************************************/
/**
* Define Tx Power
*/
*/
#define CFG_TX_POWER (0x18) /**< 0dbm */
/**
@ -66,7 +67,7 @@
#define CFG_IO_CAPABILITY_KEYBOARD_DISPLAY (0x04)
#define CFG_IO_CAPABILITY CFG_IO_CAPABILITY_DISPLAY_ONLY
/**
* Define MITM modes
*/
@ -75,27 +76,23 @@
#define CFG_MITM_PROTECTION CFG_MITM_PROTECTION_REQUIRED
/**
* Generic Access Appearance
*/
#define CFG_UNKNOWN_APPEARANCE (0)
#define CFG_GAP_APPEARANCE (832)
/**
* Define PHY
*/
#define ALL_PHYS_PREFERENCE 0x00
#define RX_2M_PREFERRED 0x02
#define TX_2M_PREFERRED 0x02
#define RX_1M_PREFERRED 0x01
#define TX_1M_PREFERRED 0x01
#define RX_ALL_PHY_PREFERRED 0x03
#define TX_ALL_PHY_PREFERRED 0x03
#define TX_1M 0x01
#define TX_2M 0x02
#define RX_1M 0x01
#define RX_2M 0x02
#define RX_2M 0x02
/**
* Generic Access Appearance
*/
#define CFG_UNKNOWN_APPEARANCE (0)
#define CFG_GAP_APPEARANCE (832)
/**
* Identity root key used to derive LTK and CSRK
*/
@ -116,80 +113,13 @@
/* USER CODE END Generic_Parameters */
/**< specific parameters ********************************************************/
/**
* Encryption enable when set to 1
* Encryption disabe when set to 0
*/
#define CFG_ENCRYPTION_ENABLE 0
#define CFG_MAX_CONNECTION (8)
/**
* Define the different role supported
* In this application
* When set to 1, the device is central
* When set to 0, the device is peripheral
*/
#define CFG_BLE_CENTRAL 1
#define CFG_DATA_ROLE_MODE 2
#define CFG_SERVER_ONLY 0
/**
* in this specific application, the device is either central
* or peripheral but cannot be both
*/
#undef CFG_ADV_BD_ADDRESS
#if (CFG_BLE_CENTRAL != 0 )
#define CFG_BLE_PERIPHERAL 0
#define CFG_ADV_BD_ADDRESS 0xFFEEDDCCBBAA
#else
#define CFG_ADV_BD_ADDRESS 0x222222333333
#define CFG_BLE_PERIPHERAL 1
#endif
#define PUSH_BUTTON_SW1_EXTI_IRQHandler EXTI4_IRQHandler
#define PUSH_BUTTON_SW2_EXTI_IRQHandler EXTI0_IRQHandler
#define PUSH_BUTTON_SW1_EXTI_IRQHandler EXTI4_IRQHandler
#define PUSH_BUTTON_SW2_EXTI_IRQHandler EXTI0_IRQHandler
#define CONN_L(x) ((int)(((float)x)/0.625f))
#define CONN_P(x) ((int)(((float)x)/1.25f))
#define SCAN_P (0x320)
#define SCAN_L (0x320)
#define CFG_DEV_ID_PERIPH_SERVER (0x88)
#define CFG_FEATURE_DT (0x70)
#define UUID_128BIT_FORMAT 1
#define MAX_HCI_CMD_EVENT_PAYLOAD_SIZE 255
#define DATA_NOTIFICATION_MAX_PACKET_SIZE 240
#define CFG_MAX_CONNECTION 1
/**
* TX PHY configuration
* It shall be set to
* 0 if ignored
* 1 if 1M
* 2 if 2M
* 4 if LE_CODED
* or any combination of 1M | 2M | LE_CODED
*/
#define CFG_TX_PHY 1
/**
* RX PHY configuration
* It shall be set to
* 0 if ignored
* 1 if 1M
* 2 if 2M
* 4 if LE_CODED
* or any combination of 1M | 2M | LE_CODED
*/
#define CFG_RX_PHY 1
/**
* ALL PHYS configuration
*/
#define CFG_ALL_PHYS ((!CFG_TX_PHY) + ((!CFG_RX_PHY)*2))
#define L2CAP_SLAVE_LATENCY 0x0000
#define L2CAP_TIMEOUT_MULTIPLIER 0x1F4
/******************************************************************************
* BLE Stack
******************************************************************************/
@ -217,7 +147,7 @@
/**
* Maximum supported ATT_MTU size
*/
#define CFG_BLE_MAX_ATT_MTU (250)
#define CFG_BLE_MAX_ATT_MTU (156)
/**
* Size of the storage area for Attribute values
@ -234,12 +164,12 @@
/**
* Prepare Write List size in terms of number of packet with ATT_MTU=23 bytes
*/
#define CFG_BLE_PREPARE_WRITE_LIST_SIZE ( 0x3A )
#define CFG_BLE_PREPARE_WRITE_LIST_SIZE BLE_PREP_WRITE_X_ATT(CFG_BLE_MAX_ATT_MTU)
/**
* Number of allocated memory blocks
*/
#define CFG_BLE_MBLOCK_COUNT ( 0x79 )
#define CFG_BLE_MBLOCK_COUNT (BLE_MBLOCKS_CALC(CFG_BLE_PREPARE_WRITE_LIST_SIZE, CFG_BLE_MAX_ATT_MTU, CFG_BLE_NUM_LINK))
/**
* Enable or disable the Extended Packet length feature. Valid values are 0 or 1.
@ -331,12 +261,12 @@
* UART interfaces
******************************************************************************/
/**
/**
* Select UART interfaces
*/
#define CFG_UART_GUI
#define CFG_DEBUG_TRACE_UART hw_uart1
#define CFG_CONSOLE_MENU hw_lpuart1
#define CFG_UART_GUI
#define CFG_DEBUG_TRACE_UART /*hw_uart1*/hw_lpuart1
#define CFG_CONSOLE_MENU /*hw_lpuart1*/hw_uart1
/******************************************************************************
* USB interface
@ -429,11 +359,11 @@
#endif
/** tick timer value in us */
#define CFG_TS_TICK_VAL DIVR( (CFG_RTCCLK_DIV * 1000000), HSE_VALUE/32 )
//#define CFG_TS_TICK_VAL DIVR( (CFG_RTCCLK_DIV * 1000000), LSE_VALUE )
#define CFG_TS_TICK_VAL DIVR( (CFG_RTCCLK_DIV * 1000000), LSE_VALUE )
typedef enum
{
CFG_TIM_PROC_ID_ISR,
CFG_TIM_PROC_ID_ISR,
} CFG_TimProcID_t;
/******************************************************************************
@ -534,19 +464,12 @@ typedef enum
/**< Add in that list all tasks that may send a ACI/HCI command */
typedef enum
{
CFG_TASK_DATA_TRANSFER_UPDATE_ID,
CFG_TASK_DATA_WRITE_ID,
CFG_TASK_CONN_DEV_1_ID,
CFG_TASK_BUTTON_ID,
CFG_TASK_SW2_BUTTON_PUSHED_ID,
CFG_TASK_START_ADV_ID,
CFG_TASK_START_SCAN_ID,
CFG_TASK_LINK_CONFIG_ID,
CFG_TASK_APP_DATA_THROUGHPUT_ID,
CFG_TASK_CONN_UPDATE_ID,
CFG_TASK_CONN_MGR_ID,
CFG_TASK_HID_UPDATE_REQ_ID,
CFG_TASK_HID_DISC_REQ_ID,
CFG_TASK_HCI_ASYNCH_EVT_ID,
CFG_LAST_TASK_ID_WITH_HCICMD, /**< Shall be LAST in the list */
CFG_LAST_TASK_ID_WITH_HCICMD, /**< Shall be LAST in the list */
} CFG_Task_Id_With_HCI_Cmd_t;
/**< Add in that list all tasks that never send a ACI/HCI command */
@ -566,8 +489,8 @@ typedef enum
*/
typedef enum
{
CFG_SCH_PRIO_0,
CFG_PRIO_NBR,
CFG_SCH_PRIO_0,
CFG_PRIO_NBR,
} CFG_SCH_Prio_Id_t;
/**
@ -575,10 +498,8 @@ typedef enum
*/
typedef enum
{
CFG_IDLEEVT_HCI_CMD_EVT_RSP_ID,
CFG_IDLEEVT_SYSTEM_HCI_CMD_EVT_RSP_ID,
CFG_IDLEEVT_GAP_PROC_COMPLETE,
CFG_IDLEEVT_GATT_PROC_COMPLETE,
CFG_IDLEEVT_HCI_CMD_EVT_RSP_ID,
CFG_IDLEEVT_SYSTEM_HCI_CMD_EVT_RSP_ID,
} CFG_IdleEvt_Id_t;
/******************************************************************************
@ -604,6 +525,6 @@ typedef enum
#define CFG_OTP_END_ADRESS OTP_AREA_END_ADDR
#endif /*__APP_CONF_H */
#endif /*__APP_CONFIG_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

161
lib/stm32wb/hci/ble_bufsize.h Normal file
View File

@ -0,0 +1,161 @@
/*****************************************************************************
* @file ble_bufsize.h
* @author MCD Application Team
* @brief Definition of BLE stack buffers size
*****************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
*****************************************************************************
*/
#ifndef BLE_BUFSIZE_H__
#define BLE_BUFSIZE_H__
/*
* BLE_DEFAULT_ATT_MTU: minimum MTU value that GATT must support.
*/
#define BLE_DEFAULT_ATT_MTU 23
/*
* BLE_DEFAULT_MAX_ATT_MTU: maximum supported ATT MTU size.
*/
#define BLE_DEFAULT_MAX_ATT_MTU 158
/*
* BLE_DEFAULT_MAX_ATT_SIZE: maximum attribute size.
*/
#define BLE_DEFAULT_MAX_ATT_SIZE 512
/*
* BLE_PREP_WRITE_X_ATT: compute how many Prepare Write Request are needed to
* write a characteristic with size 'max_att' when the used ATT_MTU value is
* equal to BLE_DEFAULT_ATT_MTU (23).
*/
#define BLE_PREP_WRITE_X_ATT(max_att) \
(DIVC(max_att, BLE_DEFAULT_ATT_MTU - 5) * 2)
/*
* BLE_DEFAULT_PREP_WRITE_LIST_SIZE: default minimum Prepare Write List size.
*/
#define BLE_DEFAULT_PREP_WRITE_LIST_SIZE \
BLE_PREP_WRITE_X_ATT(BLE_DEFAULT_MAX_ATT_SIZE)
/*
* BLE_MEM_BLOCK_X_MTU: compute how many memory blocks are needed to compose
* an ATT packet with ATT_MTU=mtu.
*/
#define BLE_MEM_BLOCK_SIZE 32
#define BLE_MEM_BLOCK_X_TX(mtu) \
(DIVC((mtu) + 4U, BLE_MEM_BLOCK_SIZE) + 1U)
#define BLE_MEM_BLOCK_X_RX(mtu, n_link) \
((DIVC((mtu) + 4U, BLE_MEM_BLOCK_SIZE) + 2U) * (n_link) + 1)
#define BLE_MEM_BLOCK_X_MTU(mtu, n_link) \
(BLE_MEM_BLOCK_X_TX(mtu) + BLE_MEM_BLOCK_X_RX(mtu, n_link))
/*
* BLE_MBLOCKS_SECURE_CONNECTIONS: minimum number of blocks required for
* secure connections
*/
#define BLE_MBLOCKS_SECURE_CONNECTIONS 4
/*
* BLE_MBLOCKS_CALC: minimum number of buffers needed by the stack.
* This is the minimum racomanded value and depends on:
* - pw: size of Prepare Write List
* - mtu: ATT_MTU size
* - n_link: maximum number of simultaneous connections
*/
#define BLE_MBLOCKS_CALC(pw, mtu, n_link) \
((pw) + MAX(BLE_MEM_BLOCK_X_MTU(mtu, n_link), \
BLE_MBLOCKS_SECURE_CONNECTIONS))
/*
* BLE_DEFAULT_MBLOCKS_COUNT: default memory blocks count
*/
#define BLE_DEFAULT_MBLOCKS_COUNT(n_link) \
BLE_MBLOCKS_CALC(BLE_DEFAULT_PREP_WRITE_LIST_SIZE, \
BLE_DEFAULT_MAX_ATT_MTU, n_link)
/*
* BLE_FIXED_BUFFER_SIZE_BYTES:
* A part of the RAM, is dinamically allocated by initilizing all the pointers
* defined in a global context variable "mem_alloc_ctx_p".
* This initialization is made in the Dynamic_allocator functions, which
* assing a portion of RAM given by the external application to the above
* mentioned "global pointers".
*
* The size of this Dynamic RAM is made of 2 main components:
* - a part that is parameters-dependent (num of links, GATT buffers, ...),
* and which value is explicited by the following macro;
* - a part, that may be considered "fixed", i.e. independent from the above
* mentioned parameters.
*/
#if (SLAVE_ONLY == 0) && (LL_ONLY == 0)
#define BLE_FIXED_BUFFER_SIZE_BYTES 6960 /* Full stack */
#elif SLAVE_ONLY == 0
#define BLE_FIXED_BUFFER_SIZE_BYTES 6256 /* LL only */
#else
#define BLE_FIXED_BUFFER_SIZE_BYTES 6696 /* Slave only */
#endif
/*
* BLE_PER_LINK_SIZE_BYTES: additional memory size used per link
*/
#if (SLAVE_ONLY == 0) && (LL_ONLY == 0)
#define BLE_PER_LINK_SIZE_BYTES 380 /* Full stack */
#elif SLAVE_ONLY == 0
#define BLE_PER_LINK_SIZE_BYTES 196 /* LL only */
#else
#define BLE_PER_LINK_SIZE_BYTES 332 /* Slave only */
#endif
/*
* BLE_TOTAL_BUFFER_SIZE: this macro returns the amount of memory, in bytes,
* needed for the storage of data structures (except GATT database elements)
* whose size depends on the number of supported connections.
*
* @param num_links: Maximum number of simultaneous connections that the device
* will support. Valid values are from 1 to 8.
*
* @param mblocks_count: Number of memory blocks allocated for packets.
*/
#define BLE_TOTAL_BUFFER_SIZE(n_link, mblocks_count) \
(BLE_FIXED_BUFFER_SIZE_BYTES + \
(BLE_PER_LINK_SIZE_BYTES * (n_link)) + \
((BLE_MEM_BLOCK_SIZE + 12) * (mblocks_count)))
/*
* BLE_TOTAL_BUFFER_SIZE_GATT: this macro returns the amount of memory,
* in bytes, needed for the storage of GATT database elements.
*
* @param num_gatt_attributes: Maximum number of Attributes (i.e. the number
* of characteristic + the number of characteristic values + the number of
* descriptors, excluding the services) that can be stored in the GATT
* database. Note that certain characteristics and relative descriptors are
* added automatically during device initialization so this parameters should
* be 9 plus the number of user Attributes
*
* @param num_gatt_services: Maximum number of Services that can be stored in
* the GATT database. Note that the GAP and GATT services are automatically
* added so this parameter should be 2 plus the number of user services
*
* @param att_value_array_size: Size of the storage area for Attribute values.
*/
#define BLE_TOTAL_BUFFER_SIZE_GATT(num_gatt_attributes, num_gatt_services, att_value_array_size) \
(((((att_value_array_size) - 1) | 3) + 1) + \
(40 * (num_gatt_attributes)) + (48 * (num_gatt_services)))
#endif /* ! BLE_BUFSIZE_H__ */

21
lib/stm32wb/hci/shci.c
View File

@ -308,7 +308,7 @@ SHCI_CmdStatus_t SHCI_C2_LLD_BLE_Init( uint8_t param_size, uint8_t * p_param )
p_rsp = (TL_EvtPacket_t *)local_buffer;
shci_send( SHCI_OPCODE_C2_LLD_TESTS_INIT,
shci_send( SHCI_OPCODE_C2_LLD_BLE_INIT,
param_size,
p_param,
p_rsp );
@ -534,6 +534,25 @@ SHCI_CmdStatus_t SHCI_C2_SetFlashActivityControl(SHCI_C2_SET_FLASH_ACTIVITY_CONT
return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]);
}
SHCI_CmdStatus_t SHCI_C2_Config(SHCI_C2_CONFIG_Cmd_Param_t *pCmdPacket)
{
/**
* Buffer is large enough to hold command complete without payload
*/
uint8_t local_buffer[TL_BLEEVT_CS_BUFFER_SIZE];
TL_EvtPacket_t * p_rsp;
p_rsp = (TL_EvtPacket_t *)local_buffer;
shci_send( SHCI_OPCODE_C2_CONFIG,
sizeof(SHCI_C2_CONFIG_Cmd_Param_t),
(uint8_t*)pCmdPacket,
p_rsp );
return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]);
}
/**
* Local System COMMAND
* These commands are NOT sent to the CPU2

175
lib/stm32wb/hci/shci.h
View File

@ -63,16 +63,91 @@ extern "C" {
{
SHCI_SUB_EVT_CODE_READY = SHCI_SUB_EVT_CODE_BASE,
SHCI_SUB_EVT_ERROR_NOTIF,
SHCI_SUB_EVT_BLE_NVM_RAM_UPDATE,
SHCI_SUB_EVT_OT_NVM_RAM_UPDATE,
SHCI_SUB_EVT_NVM_START_WRITE,
SHCI_SUB_EVT_NVM_END_WRITE,
SHCI_SUB_EVT_NVM_START_ERASE,
SHCI_SUB_EVT_NVM_END_ERASE,
} SHCI_SUB_EVT_CODE_t;
/**
* SHCI_SUB_EVT_CODE_READY
* This notifies the CPU1 that the CPU2 is now ready to receive commands
* It reports as well which firmware is running on CPU2 : The wireless stack of the FUS (previously named RSS)
*/
typedef PACKED_STRUCT{
SHCI_SysEvt_Ready_Rsp_t sysevt_ready_rsp;
} SHCI_C2_Ready_Evt_t;
/**
* SHCI_SUB_EVT_ERROR_NOTIF
* This reports to the CPU1 some error form the CPU2
*/
typedef PACKED_STRUCT{
SCHI_SystemErrCode_t errorCode;
} SHCI_C2_ErrorNotif_Evt_t;
/**
* SHCI_SUB_EVT_BLE_NVM_RAM_UPDATE
* This notifies the CPU1 which part of the BLE NVM RAM has been updated so that only the modified
* section could be written in Flash/NVM
* StartAddress : Start address of the section that has been modified
* Size : Size (in bytes) of the section that has been modified
*/
typedef PACKED_STRUCT{
uint32_t StartAddress;
uint32_t Size;
} SHCI_C2_BleNvmRamUpdate_Evt_t;
/**
* SHCI_SUB_EVT_OT_NVM_RAM_UPDATE
* This notifies the CPU1 which part of the OT NVM RAM has been updated so that only the modified
* section could be written in Flash/NVM
* StartAddress : Start address of the section that has been modified
* Size : Size (in bytes) of the section that has been modified
*/
typedef PACKED_STRUCT{
uint32_t StartAddress;
uint32_t Size;
} SHCI_C2_OtNvmRamUpdate_Evt_t;
/**
* SHCI_SUB_EVT_NVM_START_WRITE
* This notifies the CPU1 that the CPU2 has started a write procedure in Flash
* NumberOfWords : The number of 64bits data the CPU2 needs to write in Flash.
* For each 64bits data, the algorithm as described in AN5289 is executed.
* When this number is reported to 0, it means the Number of 64bits to be written
* was unknown when the procedure has started.
* When all data are written, the SHCI_SUB_EVT_NVM_END_WRITE event is reported
*/
typedef PACKED_STRUCT{
uint32_t NumberOfWords;
} SHCI_C2_NvmStartWrite_Evt_t;
/**
* SHCI_SUB_EVT_NVM_END_WRITE
* This notifies the CPU1 that the CPU2 has written all expected data in Flash
*/
/**
* SHCI_SUB_EVT_NVM_START_ERASE
* This notifies the CPU1 that the CPU2 has started a erase procedure in Flash
* NumberOfSectors : The number of sectors the CPU2 needs to erase in Flash.
* For each sector, the algorithm as described in AN5289 is executed.
* When this number is reported to 0, it means the Number of sectors to be erased
* was unknown when the procedure has started.
* When all sectors are erased, the SHCI_SUB_EVT_NVM_END_ERASE event is reported
*/
typedef PACKED_STRUCT{
uint32_t NumberOfSectors;
} SHCI_C2_NvmStartErase_Evt_t;
/**
* SHCI_SUB_EVT_NVM_END_ERASE
* This notifies the CPU1 that the CPU2 has erased all expected flash sectors
*/
/* SYSTEM COMMAND */
typedef PACKED_STRUCT
{
@ -139,7 +214,8 @@ extern "C" {
SHCI_OCF_C2_LLD_TESTS_INIT,
SHCI_OCF_C2_EXTPA_CONFIG,
SHCI_OCF_C2_SET_FLASH_ACTIVITY_CONTROL,
SHCI_OCF_C2_LLD_BLE_INIT
SHCI_OCF_C2_LLD_BLE_INIT,
SHCI_OCF_C2_CONFIG,
} SHCI_OCF_t;
#define SHCI_OPCODE_C2_FUS_GET_STATE (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_GET_STATE)
@ -403,6 +479,62 @@ extern "C" {
/** No response parameters*/
#define SHCI_OPCODE_C2_CONFIG (( SHCI_OGF << 10) + SHCI_OCF_C2_CONFIG)
/** Command parameters */
typedef PACKED_STRUCT{
uint8_t PayloadCmdSize;
uint8_t Config1;
uint8_t EvtMask1;
uint8_t Spare1;
uint32_t BleNvmRamAddress;
uint32_t ThreadNvmRamAddress;
} SHCI_C2_CONFIG_Cmd_Param_t;
/**
* PayloadCmdSize
* Value that shall be used
*/
#define SHCI_C2_CONFIG_PAYLOAD_CMD_SIZE (sizeof(SHCI_C2_CONFIG_Cmd_Param_t) - 1)
/**
* Config1
* Each definition below may be added together to build the Config1 value
* WARNING : Only one definition per bit shall be added to build the Config1 value
*/
#define SHCI_C2_CONFIG_CONFIG1_BIT0_BLE_NVM_DATA_TO_INTERNAL_FLASH (0<<0)
#define SHCI_C2_CONFIG_CONFIG1_BIT0_BLE_NVM_DATA_TO_SRAM (1<<0)
#define SHCI_C2_CONFIG_CONFIG1_BIT1_THREAD_NVM_DATA_TO_INTERNAL_FLASH (0<<1)
#define SHCI_C2_CONFIG_CONFIG1_BIT1_THREAD_NVM_DATA_TO_SRAM (1<<1)
/**
* EvtMask1
* Each definition below may be added together to build the EvtMask1 value
*/
#define SHCI_C2_CONFIG_EVTMASK1_BIT0_ERROR_NOTIF_ENABLE (1<<0)
#define SHCI_C2_CONFIG_EVTMASK1_BIT1_BLE_NVM_RAM_UPDATE_ENABLE (1<<1)
#define SHCI_C2_CONFIG_EVTMASK1_BIT2_OT_NVM_RAM_UPDATE_ENABLE (1<<2)
#define SHCI_C2_CONFIG_EVTMASK1_BIT3_NVM_START_WRITE_ENABLE (1<<3)
#define SHCI_C2_CONFIG_EVTMASK1_BIT4_NVM_END_WRITE_ENABLE (1<<4)
#define SHCI_C2_CONFIG_EVTMASK1_BIT5_NVM_START_ERASE_ENABLE (1<<5)
#define SHCI_C2_CONFIG_EVTMASK1_BIT6_NVM_END_ERASE_ENABLE (1<<6)
/**
* BleNvmRamAddress
* The buffer shall have a size of BLE_NVM_SRAM_SIZE number of 32bits
* The buffer shall be allocated in SRAM2
*/
#define BLE_NVM_SRAM_SIZE (507)
/**
* ThreadNvmRamAddress
* The buffer shall have a size of THREAD_NVM_SRAM_SIZE number of 32bits
* The buffer shall be allocated in SRAM2
*/
#define THREAD_NVM_SRAM_SIZE (1016)
/** No response parameters*/
/* Exported type --------------------------------------------------------*/
typedef MB_WirelessFwInfoTable_t SHCI_WirelessFwInfoTable_t;
@ -464,6 +596,7 @@ typedef MB_WirelessFwInfoTable_t SHCI_WirelessFwInfoTable_t;
#define INFO_STACK_TYPE_ZIGBEE_RFD 0x31
#define INFO_STACK_TYPE_MAC 0x40
#define INFO_STACK_TYPE_BLE_THREAD_FTD_STATIC 0x50
#define INFO_STACK_TYPE_BLE_THREAD_FTD_DYAMIC 0x51
#define INFO_STACK_TYPE_802154_LLD_TESTS 0x60
#define INFO_STACK_TYPE_802154_PHY_VALID 0x61
#define INFO_STACK_TYPE_BLE_PHY_VALID 0x62
@ -471,6 +604,8 @@ typedef MB_WirelessFwInfoTable_t SHCI_WirelessFwInfoTable_t;
#define INFO_STACK_TYPE_BLE_RLV 0x64
#define INFO_STACK_TYPE_802154_RLV 0x65
#define INFO_STACK_TYPE_BLE_ZIGBEE_FFD_STATIC 0x70
#define INFO_STACK_TYPE_BLE_ZIGBEE_FFD_DYNAMIC 0x78
#define INFO_STACK_TYPE_RLV 0x80
typedef struct {
/**
@ -762,6 +897,44 @@ typedef struct {
*/
SHCI_CmdStatus_t SHCI_C2_SetFlashActivityControl(SHCI_C2_SET_FLASH_ACTIVITY_CONTROL_Source_t Source);
/**
* SHCI_C2_Config
* @brief Send the system configuration to the CPU2
*
* @param pCmdPacket: address of the buffer holding following parameters
* uint8_t PayloadCmdSize : Size of the payload - shall be SHCI_C2_CONFIG_PAYLOAD_CMD_SIZE
* uint8_t Config1 :
* - bit0 : 0 - BLE NVM Data data are flushed in internal secure flash
* 1 - BLE NVM Data are written in SRAM cache pointed by BleNvmRamAddress
* - bit1 : 0 - THREAD NVM Data data are flushed in internal secure flash
* 1 - THREAD NVM Data are written in SRAM cache pointed by ThreadNvmRamAddress
* - bit2 to bit7 : Unused, shall be set to 0
* uint8_t EvtMask1 :
* When a bit is set to 0, the event is not reported
* bit0 : Asynchronous Event with Sub Evt Code 0x9201 (= SHCI_SUB_EVT_ERROR_NOTIF)
* ...
* bit31 : Asynchronous Event with Sub Evt Code 0x9220
* uint8_t Spare1 : Unused, shall be set to 0
* uint32_t BleNvmRamAddress :
* Only considered when Config1.bit0 = 1
* When set to 0, data are kept in internal SRAM on CPU2
* Otherwise, data are copied in the cache pointed by BleNvmRamAddress
* The size of the buffer shall be BLE_NVM_SRAM_SIZE (number of 32bits)
* The buffer shall be allocated in SRAM2
* uint32_t ThreadNvmRamAddress :
* Only considered when Config1.bit1 = 1
* When set to 0, data are kept in internal SRAM on CPU2
* Otherwise, data are copied in the cache pointed by ThreadNvmRamAddress
* The size of the buffer shall be THREAD_NVM_SRAM_SIZE (number of 32bits)
* The buffer shall be allocated in SRAM2
*
* Please check macro definition to be used for this function
* They are defined in this file next to the definition of SHCI_OPCODE_C2_CONFIG
*
* @retval Status
*/
SHCI_CmdStatus_t SHCI_C2_Config(SHCI_C2_CONFIG_Cmd_Param_t *pCmdPacket);
#ifdef __cplusplus
}
#endif

4
lib/stm32wb/hci/tl_mbox.c
View File

@ -63,8 +63,8 @@ PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_ZigbeeTable_t TL_Zigbee_Table;
PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static tListNode FreeBufQueue;
PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static tListNode TracesEvtQueue;
PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static uint8_t CsBuffer[sizeof(TL_PacketHeader_t) + TL_EVT_HDR_SIZE + sizeof(TL_CsEvt_t)];
PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static tListNode EvtQueue;
PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static tListNode SystemEvtQueue;
PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static tListNode EvtQueue;
PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static tListNode SystemEvtQueue;
static tListNode LocalFreeBufQueue;