stm32cube: update stm32f3 to version V1.11.0
Update Cube version for STM32F3xx series on https://github.com/STMicroelectronics from version v1.10.0 to version v1.11.0 Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit is contained in:
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/**
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******************************************************************************
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* @file stm32f0xx_hal_exti.h
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* @author MCD Application Team
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* @brief Header file of EXTI HAL module.
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2019 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef STM32F0xx_HAL_EXTI_H
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#define STM32F0xx_HAL_EXTI_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f0xx_hal_def.h"
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/** @addtogroup STM32F0xx_HAL_Driver
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* @{
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*/
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/** @defgroup EXTI EXTI
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* @brief EXTI HAL module driver
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup EXTI_Exported_Types EXTI Exported Types
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* @{
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*/
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/**
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* @brief HAL EXTI common Callback ID enumeration definition
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*/
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typedef enum
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{
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HAL_EXTI_COMMON_CB_ID = 0x00U
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} EXTI_CallbackIDTypeDef;
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/**
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* @brief EXTI Handle structure definition
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*/
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typedef struct
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{
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uint32_t Line; /*!< Exti line number */
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void (* PendingCallback)(void); /*!< Exti pending callback */
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} EXTI_HandleTypeDef;
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/**
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* @brief EXTI Configuration structure definition
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*/
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typedef struct
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{
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uint32_t Line; /*!< The Exti line to be configured. This parameter
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can be a value of @ref EXTI_Line */
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uint32_t Mode; /*!< The Exit Mode to be configured for a core.
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This parameter can be a combination of @ref EXTI_Mode */
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uint32_t Trigger; /*!< The Exti Trigger to be configured. This parameter
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can be a value of @ref EXTI_Trigger */
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uint32_t GPIOSel; /*!< The Exti GPIO multiplexer selection to be configured.
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This parameter is only possible for line 0 to 15. It
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can be a value of @ref EXTI_GPIOSel */
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} EXTI_ConfigTypeDef;
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/**
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* @}
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*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup EXTI_Exported_Constants EXTI Exported Constants
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* @{
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*/
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/** @defgroup EXTI_Line EXTI Line
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* @{
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*/
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#define EXTI_LINE_0 (EXTI_GPIO | 0x00u) /*!< External interrupt line 0 */
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#define EXTI_LINE_1 (EXTI_GPIO | 0x01u) /*!< External interrupt line 1 */
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#define EXTI_LINE_2 (EXTI_GPIO | 0x02u) /*!< External interrupt line 2 */
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#define EXTI_LINE_3 (EXTI_GPIO | 0x03u) /*!< External interrupt line 3 */
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#define EXTI_LINE_4 (EXTI_GPIO | 0x04u) /*!< External interrupt line 4 */
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#define EXTI_LINE_5 (EXTI_GPIO | 0x05u) /*!< External interrupt line 5 */
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#define EXTI_LINE_6 (EXTI_GPIO | 0x06u) /*!< External interrupt line 6 */
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#define EXTI_LINE_7 (EXTI_GPIO | 0x07u) /*!< External interrupt line 7 */
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#define EXTI_LINE_8 (EXTI_GPIO | 0x08u) /*!< External interrupt line 8 */
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#define EXTI_LINE_9 (EXTI_GPIO | 0x09u) /*!< External interrupt line 9 */
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#define EXTI_LINE_10 (EXTI_GPIO | 0x0Au) /*!< External interrupt line 10 */
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#define EXTI_LINE_11 (EXTI_GPIO | 0x0Bu) /*!< External interrupt line 11 */
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#define EXTI_LINE_12 (EXTI_GPIO | 0x0Cu) /*!< External interrupt line 12 */
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#define EXTI_LINE_13 (EXTI_GPIO | 0x0Du) /*!< External interrupt line 13 */
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#define EXTI_LINE_14 (EXTI_GPIO | 0x0Eu) /*!< External interrupt line 14 */
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#define EXTI_LINE_15 (EXTI_GPIO | 0x0Fu) /*!< External interrupt line 15 */
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#if defined (EXTI_IMR_MR16)
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#define EXTI_LINE_16 (EXTI_CONFIG | 0x10u) /*!< External interrupt line 16 Connected to the PVD Output */
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#else
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#define EXTI_LINE_16 (EXTI_RESERVED | 0x10u)
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#endif /* EXTI_IMR_MR16 */
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#define EXTI_LINE_17 (EXTI_CONFIG | 0x11u) /*!< External interrupt line 17 Connected to the RTC Alarm event */
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#if defined (EXTI_IMR_MR18)
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#define EXTI_LINE_18 (EXTI_CONFIG | 0x12u) /*!< External interrupt line 18 Connected to the USB OTG FS Wakeup from suspend event */
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#else
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#define EXTI_LINE_18 (EXTI_RESERVED | 0x12u)
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#endif /* EXTI_IMR_MR18 */
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#define EXTI_LINE_19 (EXTI_CONFIG | 0x13u) /*!< External interrupt line 19 Connected to the Ethernet Wakeup event */
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#if defined (EXTI_IMR_MR20)
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#define EXTI_LINE_20 (EXTI_CONFIG | 0x14u) /*!< External interrupt line 20 Connected to the USB OTG HS (configured in FS) Wakeup event */
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#else
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#define EXTI_LINE_20 (EXTI_RESERVED | 0x14u)
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#endif /* EXTI_IMR_MR20 */
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#if defined (EXTI_IMR_MR21)
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#define EXTI_LINE_21 (EXTI_CONFIG | 0x15u) /*!< External interrupt line 21 Connected to the Comparator 1 output */
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#else
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#define EXTI_LINE_21 (EXTI_RESERVED | 0x15u)
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#endif /* EXTI_IMR_MR21 */
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#if defined (EXTI_IMR_MR22)
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#define EXTI_LINE_22 (EXTI_CONFIG | 0x16u) /*!< External interrupt line 22 Connected to the Comparator 2 output */
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#else
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#define EXTI_LINE_22 (EXTI_RESERVED | 0x16u)
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#endif /* EXTI_IMR_MR22 */
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#if defined (EXTI_IMR_MR23)
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#define EXTI_LINE_23 (EXTI_DIRECT | 0x17u) /*!< External interrupt line 23 Connected to the internal I2C1 wakeup event */
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#else
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#define EXTI_LINE_23 (EXTI_RESERVED | 0x17u)
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#endif /* EXTI_IMR_MR23 */
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#define EXTI_LINE_24 (EXTI_RESERVED | 0x18u)
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#if defined (EXTI_IMR_MR25)
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#define EXTI_LINE_25 (EXTI_CONFIG | 0x19u) /*!< External interrupt line 25 Connected to the internal USART1 wakeup event */
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#else
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#define EXTI_LINE_25 (EXTI_RESERVED | 0x19u)
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#endif /* EXTI_IMR_MR25 */
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#if defined (EXTI_IMR_MR26)
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#define EXTI_LINE_26 (EXTI_CONFIG | 0x1Au) /*!< External interrupt line 26 Connected to the internal USART2 wakeup event */
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#else
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#define EXTI_LINE_26 (EXTI_RESERVED | 0x1Au)
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#endif /* EXTI_IMR_MR26 */
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#if defined (EXTI_IMR_MR27)
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#define EXTI_LINE_27 (EXTI_CONFIG | 0x1Bu) /*!< External interrupt line 27 Connected to the internal CEC wakeup event */
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#else
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#define EXTI_LINE_27 (EXTI_RESERVED | 0x1Bu)
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#endif /* EXTI_IMR_MR27 */
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#if defined (EXTI_IMR_MR28)
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#define EXTI_LINE_28 (EXTI_CONFIG | 0x1Cu) /*!< External interrupt line 28 Connected to the internal USART3 wakeup event */
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#else
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#define EXTI_LINE_28 (EXTI_RESERVED | 0x1Cu)
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#endif /* EXTI_IMR_MR28 */
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#define EXTI_LINE_29 (EXTI_RESERVED | 0x1Du)
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#define EXTI_LINE_30 (EXTI_RESERVED | 0x1Eu)
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#if defined (EXTI_IMR_MR31)
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#define EXTI_LINE_31 (EXTI_CONFIG | 0x1Fu) /*!< External interrupt line 31 Connected to the VDDIO2 supply comparator output */
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#else
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#define EXTI_LINE_31 (EXTI_RESERVED | 0x1Fu)
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#endif /* EXTI_IMR_MR31 */
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/**
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* @}
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*/
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/** @defgroup EXTI_Mode EXTI Mode
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* @{
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*/
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#define EXTI_MODE_NONE 0x00000000u
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#define EXTI_MODE_INTERRUPT 0x00000001u
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#define EXTI_MODE_EVENT 0x00000002u
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/**
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* @}
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*/
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/** @defgroup EXTI_Trigger EXTI Trigger
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* @{
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*/
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#define EXTI_TRIGGER_NONE 0x00000000u
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#define EXTI_TRIGGER_RISING 0x00000001u
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#define EXTI_TRIGGER_FALLING 0x00000002u
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#define EXTI_TRIGGER_RISING_FALLING (EXTI_TRIGGER_RISING | EXTI_TRIGGER_FALLING)
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/**
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* @}
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*/
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/** @defgroup EXTI_GPIOSel EXTI GPIOSel
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* @brief
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* @{
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*/
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#define EXTI_GPIOA 0x00000000u
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#define EXTI_GPIOB 0x00000001u
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#define EXTI_GPIOC 0x00000002u
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#if defined (GPIOD)
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#define EXTI_GPIOD 0x00000003u
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#endif /* GPIOD */
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#if defined (GPIOE)
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#define EXTI_GPIOE 0x00000004u
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#endif /* GPIOE */
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#define EXTI_GPIOF 0x00000005u
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported macro ------------------------------------------------------------*/
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/** @defgroup EXTI_Exported_Macros EXTI Exported Macros
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* @{
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*/
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/**
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* @}
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*/
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/* Private constants --------------------------------------------------------*/
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/** @defgroup EXTI_Private_Constants EXTI Private Constants
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* @{
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*/
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/**
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* @brief EXTI Line property definition
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*/
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#define EXTI_PROPERTY_SHIFT 24u
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#define EXTI_DIRECT (0x01uL << EXTI_PROPERTY_SHIFT)
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#define EXTI_CONFIG (0x02uL << EXTI_PROPERTY_SHIFT)
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#define EXTI_GPIO ((0x04uL << EXTI_PROPERTY_SHIFT) | EXTI_CONFIG)
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#define EXTI_RESERVED (0x08uL << EXTI_PROPERTY_SHIFT)
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#define EXTI_PROPERTY_MASK (EXTI_DIRECT | EXTI_CONFIG | EXTI_GPIO)
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/**
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* @brief EXTI bit usage
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*/
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#define EXTI_PIN_MASK 0x0000001Fu
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/**
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* @brief EXTI Mask for interrupt & event mode
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*/
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#define EXTI_MODE_MASK (EXTI_MODE_EVENT | EXTI_MODE_INTERRUPT)
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/**
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* @brief EXTI Mask for trigger possibilities
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*/
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#define EXTI_TRIGGER_MASK (EXTI_TRIGGER_RISING | EXTI_TRIGGER_FALLING)
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/**
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* @brief EXTI Line number
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*/
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#define EXTI_LINE_NB 32uL
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/**
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* @}
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*/
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/* Private macros ------------------------------------------------------------*/
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/** @defgroup EXTI_Private_Macros EXTI Private Macros
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* @{
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*/
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#define IS_EXTI_LINE(__LINE__) ((((__LINE__) & ~(EXTI_PROPERTY_MASK | EXTI_PIN_MASK)) == 0x00u) && \
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((((__LINE__) & EXTI_PROPERTY_MASK) == EXTI_DIRECT) || \
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(((__LINE__) & EXTI_PROPERTY_MASK) == EXTI_CONFIG) || \
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(((__LINE__) & EXTI_PROPERTY_MASK) == EXTI_GPIO)) && \
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(((__LINE__) & EXTI_PIN_MASK) < EXTI_LINE_NB))
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#define IS_EXTI_MODE(__LINE__) ((((__LINE__) & EXTI_MODE_MASK) != 0x00u) && \
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(((__LINE__) & ~EXTI_MODE_MASK) == 0x00u))
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#define IS_EXTI_TRIGGER(__LINE__) (((__LINE__) & ~EXTI_TRIGGER_MASK) == 0x00u)
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#define IS_EXTI_PENDING_EDGE(__LINE__) ((__LINE__) == EXTI_TRIGGER_RISING_FALLING)
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#define IS_EXTI_CONFIG_LINE(__LINE__) (((__LINE__) & EXTI_CONFIG) != 0x00u)
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#if defined (GPIOE)
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#define IS_EXTI_GPIO_PORT(__PORT__) (((__PORT__) == EXTI_GPIOA) || \
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((__PORT__) == EXTI_GPIOB) || \
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((__PORT__) == EXTI_GPIOC) || \
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((__PORT__) == EXTI_GPIOD) || \
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((__PORT__) == EXTI_GPIOE) || \
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((__PORT__) == EXTI_GPIOF))
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#elif defined (GPIOD)
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#define IS_EXTI_GPIO_PORT(__PORT__) (((__PORT__) == EXTI_GPIOA) || \
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((__PORT__) == EXTI_GPIOB) || \
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((__PORT__) == EXTI_GPIOC) || \
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((__PORT__) == EXTI_GPIOD) || \
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((__PORT__) == EXTI_GPIOF))
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#else
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#define IS_EXTI_GPIO_PORT(__PORT__) (((__PORT__) == EXTI_GPIOA) || \
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((__PORT__) == EXTI_GPIOB) || \
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((__PORT__) == EXTI_GPIOC) || \
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((__PORT__) == EXTI_GPIOF))
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#endif /* GPIOE */
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#define IS_EXTI_GPIO_PIN(__PIN__) ((__PIN__) < 16u)
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/**
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* @}
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*/
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/* Exported functions --------------------------------------------------------*/
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/** @defgroup EXTI_Exported_Functions EXTI Exported Functions
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* @brief EXTI Exported Functions
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* @{
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*/
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/** @defgroup EXTI_Exported_Functions_Group1 Configuration functions
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* @brief Configuration functions
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* @{
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*/
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/* Configuration functions ****************************************************/
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HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig);
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HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig);
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HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef *hexti);
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HAL_StatusTypeDef HAL_EXTI_RegisterCallback(EXTI_HandleTypeDef *hexti, EXTI_CallbackIDTypeDef CallbackID, void (*pPendingCbfn)(void));
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HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLine);
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/**
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* @}
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*/
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/** @defgroup EXTI_Exported_Functions_Group2 IO operation functions
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* @brief IO operation functions
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* @{
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*/
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/* IO operation functions *****************************************************/
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void HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti);
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uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge);
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void HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge);
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void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti);
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* STM32F0xx_HAL_EXTI_H */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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@ -0,0 +1,237 @@
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/**
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******************************************************************************
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* @file stm32f0xx_ll_usb.h
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* @author MCD Application Team
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* @brief Header file of USB Low Layer HAL module.
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
|
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef STM32F0xx_LL_USB_H
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#define STM32F0xx_LL_USB_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f0xx_hal_def.h"
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#if defined (USB)
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/** @addtogroup STM32F0xx_HAL_Driver
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* @{
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*/
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/** @addtogroup USB_LL
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/**
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* @brief USB Mode definition
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*/
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typedef enum
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{
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USB_DEVICE_MODE = 0
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} USB_ModeTypeDef;
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/**
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* @brief USB Initialization Structure definition
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*/
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typedef struct
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{
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uint32_t dev_endpoints; /*!< Device Endpoints number.
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This parameter depends on the used USB core.
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This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
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uint32_t speed; /*!< USB Core speed.
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This parameter can be any value of @ref USB_Core_Speed */
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uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size. */
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uint32_t phy_itface; /*!< Select the used PHY interface.
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This parameter can be any value of @ref USB_Core_PHY */
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uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */
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uint32_t low_power_enable; /*!< Enable or disable Low Power mode */
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uint32_t lpm_enable; /*!< Enable or disable Battery charging. */
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||||
uint32_t battery_charging_enable; /*!< Enable or disable Battery charging. */
|
||||
} USB_CfgTypeDef;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t num; /*!< Endpoint number
|
||||
This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
|
||||
|
||||
uint8_t is_in; /*!< Endpoint direction
|
||||
This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
|
||||
|
||||
uint8_t is_stall; /*!< Endpoint stall condition
|
||||
This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
|
||||
|
||||
uint8_t type; /*!< Endpoint type
|
||||
This parameter can be any value of @ref USB_EP_Type */
|
||||
|
||||
uint8_t data_pid_start; /*!< Initial data PID
|
||||
This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
|
||||
|
||||
uint16_t pmaadress; /*!< PMA Address
|
||||
This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
|
||||
|
||||
uint16_t pmaaddr0; /*!< PMA Address0
|
||||
This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
|
||||
|
||||
uint16_t pmaaddr1; /*!< PMA Address1
|
||||
This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
|
||||
|
||||
uint8_t doublebuffer; /*!< Double buffer enable
|
||||
This parameter can be 0 or 1 */
|
||||
|
||||
uint16_t tx_fifo_num; /*!< This parameter is not required by USB Device FS peripheral, it is used
|
||||
only by USB OTG FS peripheral
|
||||
This parameter is added to ensure compatibility across USB peripherals */
|
||||
|
||||
uint32_t maxpacket; /*!< Endpoint Max packet size
|
||||
This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
|
||||
|
||||
uint8_t *xfer_buff; /*!< Pointer to transfer buffer */
|
||||
|
||||
uint32_t xfer_len; /*!< Current transfer length */
|
||||
|
||||
uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */
|
||||
|
||||
} USB_EPTypeDef;
|
||||
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup PCD_Exported_Constants PCD Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup USB_LL_EP0_MPS USB Low Layer EP0 MPS
|
||||
* @{
|
||||
*/
|
||||
#define DEP0CTL_MPS_64 0U
|
||||
#define DEP0CTL_MPS_32 1U
|
||||
#define DEP0CTL_MPS_16 2U
|
||||
#define DEP0CTL_MPS_8 3U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USB_LL_EP_Type USB Low Layer EP Type
|
||||
* @{
|
||||
*/
|
||||
#define EP_TYPE_CTRL 0U
|
||||
#define EP_TYPE_ISOC 1U
|
||||
#define EP_TYPE_BULK 2U
|
||||
#define EP_TYPE_INTR 3U
|
||||
#define EP_TYPE_MSK 3U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USB_LL Device Speed
|
||||
* @{
|
||||
*/
|
||||
#define USBD_FS_SPEED 2U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#define BTABLE_ADDRESS 0x000U
|
||||
#define PMA_ACCESS 1U
|
||||
|
||||
#define EP_ADDR_MSK 0x7U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @addtogroup USB_LL_Exported_Functions USB Low Layer Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg);
|
||||
HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg);
|
||||
HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx);
|
||||
HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx);
|
||||
HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode);
|
||||
HAL_StatusTypeDef USB_SetDevSpeed(USB_TypeDef *USBx, uint8_t speed);
|
||||
HAL_StatusTypeDef USB_FlushRxFifo(USB_TypeDef *USBx);
|
||||
HAL_StatusTypeDef USB_FlushTxFifo(USB_TypeDef *USBx, uint32_t num);
|
||||
HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep);
|
||||
HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep);
|
||||
HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep);
|
||||
HAL_StatusTypeDef USB_WritePacket(USB_TypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len);
|
||||
void *USB_ReadPacket(USB_TypeDef *USBx, uint8_t *dest, uint16_t len);
|
||||
HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep);
|
||||
HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep);
|
||||
HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address);
|
||||
HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx);
|
||||
HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx);
|
||||
HAL_StatusTypeDef USB_StopDevice(USB_TypeDef *USBx);
|
||||
HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t *psetup);
|
||||
uint32_t USB_ReadInterrupts(USB_TypeDef *USBx);
|
||||
uint32_t USB_ReadDevAllOutEpInterrupt(USB_TypeDef *USBx);
|
||||
uint32_t USB_ReadDevOutEPInterrupt(USB_TypeDef *USBx, uint8_t epnum);
|
||||
uint32_t USB_ReadDevAllInEpInterrupt(USB_TypeDef *USBx);
|
||||
uint32_t USB_ReadDevInEPInterrupt(USB_TypeDef *USBx, uint8_t epnum);
|
||||
void USB_ClearInterrupts(USB_TypeDef *USBx, uint32_t interrupt);
|
||||
|
||||
HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_TypeDef *USBx);
|
||||
HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_TypeDef *USBx);
|
||||
void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
|
||||
void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* defined (USB) */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* STM32F0xx_LL_USB_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
|
@ -0,0 +1,559 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f0xx_hal_exti.c
|
||||
* @author MCD Application Team
|
||||
* @brief EXTI HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the Extended Interrupts and events controller (EXTI) peripheral:
|
||||
* + Initialization and de-initialization functions
|
||||
* + IO operation functions
|
||||
*
|
||||
@verbatim
|
||||
==============================================================================
|
||||
##### EXTI Peripheral features #####
|
||||
==============================================================================
|
||||
[..]
|
||||
(+) Each Exti line can be configured within this driver.
|
||||
|
||||
(+) Exti line can be configured in 3 different modes
|
||||
(++) Interrupt
|
||||
(++) Event
|
||||
(++) Both of them
|
||||
|
||||
(+) Configurable Exti lines can be configured with 3 different triggers
|
||||
(++) Rising
|
||||
(++) Falling
|
||||
(++) Both of them
|
||||
|
||||
(+) When set in interrupt mode, configurable Exti lines have two different
|
||||
interrupts pending registers which allow to distinguish which transition
|
||||
occurs:
|
||||
(++) Rising edge pending interrupt
|
||||
(++) Falling
|
||||
|
||||
(+) Exti lines 0 to 15 are linked to gpio pin number 0 to 15. Gpio port can
|
||||
be selected through multiplexer.
|
||||
|
||||
##### How to use this driver #####
|
||||
==============================================================================
|
||||
[..]
|
||||
|
||||
(#) Configure the EXTI line using HAL_EXTI_SetConfigLine().
|
||||
(++) Choose the interrupt line number by setting "Line" member from
|
||||
EXTI_ConfigTypeDef structure.
|
||||
(++) Configure the interrupt and/or event mode using "Mode" member from
|
||||
EXTI_ConfigTypeDef structure.
|
||||
(++) For configurable lines, configure rising and/or falling trigger
|
||||
"Trigger" member from EXTI_ConfigTypeDef structure.
|
||||
(++) For Exti lines linked to gpio, choose gpio port using "GPIOSel"
|
||||
member from GPIO_InitTypeDef structure.
|
||||
|
||||
(#) Get current Exti configuration of a dedicated line using
|
||||
HAL_EXTI_GetConfigLine().
|
||||
(++) Provide exiting handle as parameter.
|
||||
(++) Provide pointer on EXTI_ConfigTypeDef structure as second parameter.
|
||||
|
||||
(#) Clear Exti configuration of a dedicated line using HAL_EXTI_GetConfigLine().
|
||||
(++) Provide exiting handle as parameter.
|
||||
|
||||
(#) Register callback to treat Exti interrupts using HAL_EXTI_RegisterCallback().
|
||||
(++) Provide exiting handle as first parameter.
|
||||
(++) Provide which callback will be registered using one value from
|
||||
EXTI_CallbackIDTypeDef.
|
||||
(++) Provide callback function pointer.
|
||||
|
||||
(#) Get interrupt pending bit using HAL_EXTI_GetPending().
|
||||
|
||||
(#) Clear interrupt pending bit using HAL_EXTI_GetPending().
|
||||
|
||||
(#) Generate software interrupt using HAL_EXTI_GenerateSWI().
|
||||
|
||||
@endverbatim
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f0xx_hal.h"
|
||||
|
||||
/** @addtogroup STM32F0xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup EXTI
|
||||
* @{
|
||||
*/
|
||||
/** MISRA C:2012 deviation rule has been granted for following rule:
|
||||
* Rule-18.1_b - Medium: Array `EXTICR' 1st subscript interval [0,7] may be out
|
||||
* of bounds [0,3] in following API :
|
||||
* HAL_EXTI_SetConfigLine
|
||||
* HAL_EXTI_GetConfigLine
|
||||
* HAL_EXTI_ClearConfigLine
|
||||
*/
|
||||
|
||||
#ifdef HAL_EXTI_MODULE_ENABLED
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private defines -----------------------------------------------------------*/
|
||||
/** @defgroup EXTI_Private_Constants EXTI Private Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup EXTI_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup EXTI_Exported_Functions_Group1
|
||||
* @brief Configuration functions
|
||||
*
|
||||
@verbatim
|
||||
===============================================================================
|
||||
##### Configuration functions #####
|
||||
===============================================================================
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Set configuration of a dedicated Exti line.
|
||||
* @param hexti Exti handle.
|
||||
* @param pExtiConfig Pointer on EXTI configuration to be set.
|
||||
* @retval HAL Status.
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig)
|
||||
{
|
||||
uint32_t regval;
|
||||
uint32_t linepos;
|
||||
uint32_t maskline;
|
||||
|
||||
/* Check null pointer */
|
||||
if ((hexti == NULL) || (pExtiConfig == NULL))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Check parameters */
|
||||
assert_param(IS_EXTI_LINE(pExtiConfig->Line));
|
||||
assert_param(IS_EXTI_MODE(pExtiConfig->Mode));
|
||||
|
||||
/* Assign line number to handle */
|
||||
hexti->Line = pExtiConfig->Line;
|
||||
|
||||
/* Compute line mask */
|
||||
linepos = (pExtiConfig->Line & EXTI_PIN_MASK);
|
||||
maskline = (1uL << linepos);
|
||||
|
||||
/* Configure triggers for configurable lines */
|
||||
if ((pExtiConfig->Line & EXTI_CONFIG) != 0x00u)
|
||||
{
|
||||
assert_param(IS_EXTI_TRIGGER(pExtiConfig->Trigger));
|
||||
|
||||
/* Configure rising trigger */
|
||||
/* Mask or set line */
|
||||
if ((pExtiConfig->Trigger & EXTI_TRIGGER_RISING) != 0x00u)
|
||||
{
|
||||
EXTI->RTSR |= maskline;
|
||||
}
|
||||
else
|
||||
{
|
||||
EXTI->RTSR &= ~maskline;
|
||||
}
|
||||
|
||||
/* Configure falling trigger */
|
||||
/* Mask or set line */
|
||||
if ((pExtiConfig->Trigger & EXTI_TRIGGER_FALLING) != 0x00u)
|
||||
{
|
||||
EXTI->FTSR |= maskline;
|
||||
}
|
||||
else
|
||||
{
|
||||
EXTI->FTSR &= ~maskline;
|
||||
}
|
||||
|
||||
|
||||
/* Configure gpio port selection in case of gpio exti line */
|
||||
if ((pExtiConfig->Line & EXTI_GPIO) == EXTI_GPIO)
|
||||
{
|
||||
assert_param(IS_EXTI_GPIO_PORT(pExtiConfig->GPIOSel));
|
||||
assert_param(IS_EXTI_GPIO_PIN(linepos));
|
||||
|
||||
regval = SYSCFG->EXTICR[linepos >> 2u];
|
||||
regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u)));
|
||||
regval |= (pExtiConfig->GPIOSel << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u)));
|
||||
SYSCFG->EXTICR[linepos >> 2u] = regval;
|
||||
}
|
||||
}
|
||||
|
||||
/* Configure interrupt mode : read current mode */
|
||||
/* Mask or set line */
|
||||
if ((pExtiConfig->Mode & EXTI_MODE_INTERRUPT) != 0x00u)
|
||||
{
|
||||
EXTI->IMR |= maskline;
|
||||
}
|
||||
else
|
||||
{
|
||||
EXTI->IMR &= ~maskline;
|
||||
}
|
||||
|
||||
/* Configure event mode : read current mode */
|
||||
/* Mask or set line */
|
||||
if ((pExtiConfig->Mode & EXTI_MODE_EVENT) != 0x00u)
|
||||
{
|
||||
EXTI->EMR |= maskline;
|
||||
}
|
||||
else
|
||||
{
|
||||
EXTI->EMR &= ~maskline;
|
||||
}
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get configuration of a dedicated Exti line.
|
||||
* @param hexti Exti handle.
|
||||
* @param pExtiConfig Pointer on structure to store Exti configuration.
|
||||
* @retval HAL Status.
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig)
|
||||
{
|
||||
uint32_t regval;
|
||||
uint32_t linepos;
|
||||
uint32_t maskline;
|
||||
|
||||
/* Check null pointer */
|
||||
if ((hexti == NULL) || (pExtiConfig == NULL))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Check the parameter */
|
||||
assert_param(IS_EXTI_LINE(hexti->Line));
|
||||
|
||||
/* Store handle line number to configuration structure */
|
||||
pExtiConfig->Line = hexti->Line;
|
||||
|
||||
/* Compute line mask */
|
||||
linepos = (pExtiConfig->Line & EXTI_PIN_MASK);
|
||||
maskline = (1uL << linepos);
|
||||
|
||||
/* 1] Get core mode : interrupt */
|
||||
|
||||
/* Check if selected line is enable */
|
||||
if ((EXTI->IMR & maskline) != 0x00u)
|
||||
{
|
||||
pExtiConfig->Mode = EXTI_MODE_INTERRUPT;
|
||||
}
|
||||
else
|
||||
{
|
||||
pExtiConfig->Mode = EXTI_MODE_NONE;
|
||||
}
|
||||
|
||||
/* Get event mode */
|
||||
/* Check if selected line is enable */
|
||||
if ((EXTI->EMR & maskline) != 0x00u)
|
||||
{
|
||||
pExtiConfig->Mode |= EXTI_MODE_EVENT;
|
||||
}
|
||||
|
||||
/* 2] Get trigger for configurable lines : rising */
|
||||
if ((pExtiConfig->Line & EXTI_CONFIG) != 0x00u)
|
||||
{
|
||||
/* Check if configuration of selected line is enable */
|
||||
if ((EXTI->RTSR & maskline) != 0x00u)
|
||||
{
|
||||
pExtiConfig->Trigger = EXTI_TRIGGER_RISING;
|
||||
}
|
||||
else
|
||||
{
|
||||
pExtiConfig->Trigger = EXTI_TRIGGER_NONE;
|
||||
}
|
||||
|
||||
/* Get falling configuration */
|
||||
/* Check if configuration of selected line is enable */
|
||||
if ((EXTI->FTSR & maskline) != 0x00u)
|
||||
{
|
||||
pExtiConfig->Trigger |= EXTI_TRIGGER_FALLING;
|
||||
}
|
||||
|
||||
/* Get Gpio port selection for gpio lines */
|
||||
if ((pExtiConfig->Line & EXTI_GPIO) == EXTI_GPIO)
|
||||
{
|
||||
assert_param(IS_EXTI_GPIO_PIN(linepos));
|
||||
|
||||
regval = SYSCFG->EXTICR[linepos >> 2u];
|
||||
pExtiConfig->GPIOSel = ((regval << (SYSCFG_EXTICR1_EXTI1_Pos * (3uL - (linepos & 0x03u)))) >> 24);
|
||||
}
|
||||
else
|
||||
{
|
||||
pExtiConfig->GPIOSel = 0x00u;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* No Trigger selected */
|
||||
pExtiConfig->Trigger = EXTI_TRIGGER_NONE;
|
||||
pExtiConfig->GPIOSel = 0x00u;
|
||||
}
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clear whole configuration of a dedicated Exti line.
|
||||
* @param hexti Exti handle.
|
||||
* @retval HAL Status.
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef *hexti)
|
||||
{
|
||||
uint32_t regval;
|
||||
uint32_t linepos;
|
||||
uint32_t maskline;
|
||||
|
||||
/* Check null pointer */
|
||||
if (hexti == NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Check the parameter */
|
||||
assert_param(IS_EXTI_LINE(hexti->Line));
|
||||
|
||||
/* compute line mask */
|
||||
linepos = (hexti->Line & EXTI_PIN_MASK);
|
||||
maskline = (1uL << linepos);
|
||||
|
||||
/* 1] Clear interrupt mode */
|
||||
EXTI->IMR = (EXTI->IMR & ~maskline);
|
||||
|
||||
/* 2] Clear event mode */
|
||||
EXTI->EMR = (EXTI->EMR & ~maskline);
|
||||
|
||||
/* 3] Clear triggers in case of configurable lines */
|
||||
if ((hexti->Line & EXTI_CONFIG) != 0x00u)
|
||||
{
|
||||
EXTI->RTSR = (EXTI->RTSR & ~maskline);
|
||||
EXTI->FTSR = (EXTI->FTSR & ~maskline);
|
||||
|
||||
/* Get Gpio port selection for gpio lines */
|
||||
if ((hexti->Line & EXTI_GPIO) == EXTI_GPIO)
|
||||
{
|
||||
assert_param(IS_EXTI_GPIO_PIN(linepos));
|
||||
|
||||
regval = SYSCFG->EXTICR[linepos >> 2u];
|
||||
regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u)));
|
||||
SYSCFG->EXTICR[linepos >> 2u] = regval;
|
||||
}
|
||||
}
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Register callback for a dedicated Exti line.
|
||||
* @param hexti Exti handle.
|
||||
* @param CallbackID User callback identifier.
|
||||
* This parameter can be one of @arg @ref EXTI_CallbackIDTypeDef values.
|
||||
* @param pPendingCbfn function pointer to be stored as callback.
|
||||
* @retval HAL Status.
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_EXTI_RegisterCallback(EXTI_HandleTypeDef *hexti, EXTI_CallbackIDTypeDef CallbackID, void (*pPendingCbfn)(void))
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
switch (CallbackID)
|
||||
{
|
||||
case HAL_EXTI_COMMON_CB_ID:
|
||||
hexti->PendingCallback = pPendingCbfn;
|
||||
break;
|
||||
|
||||
default:
|
||||
status = HAL_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Store line number as handle private field.
|
||||
* @param hexti Exti handle.
|
||||
* @param ExtiLine Exti line number.
|
||||
* This parameter can be from 0 to @ref EXTI_LINE_NB.
|
||||
* @retval HAL Status.
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLine)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_EXTI_LINE(ExtiLine));
|
||||
|
||||
/* Check null pointer */
|
||||
if (hexti == NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Store line number as handle private field */
|
||||
hexti->Line = ExtiLine;
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup EXTI_Exported_Functions_Group2
|
||||
* @brief EXTI IO functions.
|
||||
*
|
||||
@verbatim
|
||||
===============================================================================
|
||||
##### IO operation functions #####
|
||||
===============================================================================
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Handle EXTI interrupt request.
|
||||
* @param hexti Exti handle.
|
||||
* @retval none.
|
||||
*/
|
||||
void HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti)
|
||||
{
|
||||
uint32_t regval;
|
||||
uint32_t maskline;
|
||||
|
||||
/* Compute line mask */
|
||||
maskline = (1uL << (hexti->Line & EXTI_PIN_MASK));
|
||||
|
||||
/* Get pending bit */
|
||||
regval = (EXTI->PR & maskline);
|
||||
if (regval != 0x00u)
|
||||
{
|
||||
/* Clear pending bit */
|
||||
EXTI->PR = maskline;
|
||||
|
||||
/* Call callback */
|
||||
if (hexti->PendingCallback != NULL)
|
||||
{
|
||||
hexti->PendingCallback();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get interrupt pending bit of a dedicated line.
|
||||
* @param hexti Exti handle.
|
||||
* @param Edge Specify which pending edge as to be checked.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg @ref EXTI_TRIGGER_RISING_FALLING
|
||||
* This parameter is kept for compatibility with other series.
|
||||
* @retval 1 if interrupt is pending else 0.
|
||||
*/
|
||||
uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge)
|
||||
{
|
||||
uint32_t regval;
|
||||
uint32_t linepos;
|
||||
uint32_t maskline;
|
||||
|
||||
/* Check parameters */
|
||||
assert_param(IS_EXTI_LINE(hexti->Line));
|
||||
assert_param(IS_EXTI_CONFIG_LINE(hexti->Line));
|
||||
assert_param(IS_EXTI_PENDING_EDGE(Edge));
|
||||
|
||||
/* Compute line mask */
|
||||
linepos = (hexti->Line & EXTI_PIN_MASK);
|
||||
maskline = (1uL << linepos);
|
||||
|
||||
/* return 1 if bit is set else 0 */
|
||||
regval = ((EXTI->PR & maskline) >> linepos);
|
||||
return regval;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clear interrupt pending bit of a dedicated line.
|
||||
* @param hexti Exti handle.
|
||||
* @param Edge Specify which pending edge as to be clear.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg @ref EXTI_TRIGGER_RISING_FALLING
|
||||
* This parameter is kept for compatibility with other series.
|
||||
* @retval None.
|
||||
*/
|
||||
void HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge)
|
||||
{
|
||||
uint32_t maskline;
|
||||
|
||||
/* Check parameters */
|
||||
assert_param(IS_EXTI_LINE(hexti->Line));
|
||||
assert_param(IS_EXTI_CONFIG_LINE(hexti->Line));
|
||||
assert_param(IS_EXTI_PENDING_EDGE(Edge));
|
||||
|
||||
/* Compute line mask */
|
||||
maskline = (1uL << (hexti->Line & EXTI_PIN_MASK));
|
||||
|
||||
/* Clear Pending bit */
|
||||
EXTI->PR = maskline;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Generate a software interrupt for a dedicated line.
|
||||
* @param hexti Exti handle.
|
||||
* @retval None.
|
||||
*/
|
||||
void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti)
|
||||
{
|
||||
uint32_t maskline;
|
||||
|
||||
/* Check parameters */
|
||||
assert_param(IS_EXTI_LINE(hexti->Line));
|
||||
assert_param(IS_EXTI_CONFIG_LINE(hexti->Line));
|
||||
|
||||
/* Compute line mask */
|
||||
maskline = (1uL << (hexti->Line & EXTI_PIN_MASK));
|
||||
|
||||
/* Generate Software interrupt */
|
||||
EXTI->SWIER = maskline;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* HAL_EXTI_MODULE_ENABLED */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
|
@ -0,0 +1,138 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f0xx_hal_usart_ex.c
|
||||
* @author MCD Application Team
|
||||
* @brief Extended USART HAL module driver.
|
||||
* This file provides firmware functions to manage the following extended
|
||||
* functionalities of the Universal Synchronous Receiver Transmitter Peripheral (USART).
|
||||
* + Peripheral Control functions
|
||||
*
|
||||
*
|
||||
@verbatim
|
||||
==============================================================================
|
||||
##### USART peripheral extended features #####
|
||||
==============================================================================
|
||||
|
||||
(#) FIFO mode enabling/disabling and RX/TX FIFO threshold programming.
|
||||
|
||||
-@- When USART operates in FIFO mode, FIFO mode must be enabled prior
|
||||
starting RX/TX transfers. Also RX/TX FIFO thresholds must be
|
||||
configured prior starting RX/TX transfers.
|
||||
|
||||
(#) Slave mode enabling/disabling and NSS pin configuration.
|
||||
|
||||
-@- When USART operates in Slave mode, Slave mode must be enabled prior
|
||||
starting RX/TX transfers.
|
||||
|
||||
@endverbatim
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f0xx_hal.h"
|
||||
|
||||
/** @addtogroup STM32F0xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup USARTEx USARTEx
|
||||
* @brief USART Extended HAL module driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifdef HAL_USART_MODULE_ENABLED
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup USARTEx_Exported_Functions USARTEx Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup USARTEx_Exported_Functions_Group1 IO operation functions
|
||||
* @brief Extended USART Transmit/Receive functions
|
||||
*
|
||||
@verbatim
|
||||
===============================================================================
|
||||
##### IO operation functions #####
|
||||
===============================================================================
|
||||
This subsection provides a set of FIFO mode related callback functions.
|
||||
|
||||
(#) TX/RX Fifos Callbacks:
|
||||
(+) HAL_USARTEx_RxFifoFullCallback()
|
||||
(+) HAL_USARTEx_TxFifoEmptyCallback()
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USARTEx_Exported_Functions_Group2 Peripheral Control functions
|
||||
* @brief Extended Peripheral Control functions
|
||||
*
|
||||
@verbatim
|
||||
===============================================================================
|
||||
##### Peripheral Control functions #####
|
||||
===============================================================================
|
||||
[..] This section provides the following functions:
|
||||
(+) HAL_USARTEx_EnableSPISlaveMode() API enables the SPI slave mode
|
||||
(+) HAL_USARTEx_DisableSPISlaveMode() API disables the SPI slave mode
|
||||
(+) HAL_USARTEx_ConfigNSS API configures the Slave Select input pin (NSS)
|
||||
(+) HAL_USARTEx_EnableFifoMode() API enables the FIFO mode
|
||||
(+) HAL_USARTEx_DisableFifoMode() API disables the FIFO mode
|
||||
(+) HAL_USARTEx_SetTxFifoThreshold() API sets the TX FIFO threshold
|
||||
(+) HAL_USARTEx_SetRxFifoThreshold() API sets the RX FIFO threshold
|
||||
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup USARTEx_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* HAL_USART_MODULE_ENABLED */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
|
@ -0,0 +1,878 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f0xx_ll_usb.c
|
||||
* @author MCD Application Team
|
||||
* @brief USB Low Layer HAL module driver.
|
||||
*
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the USB Peripheral Controller:
|
||||
* + Initialization/de-initialization functions
|
||||
* + I/O operation functions
|
||||
* + Peripheral Control functions
|
||||
* + Peripheral State functions
|
||||
*
|
||||
@verbatim
|
||||
==============================================================================
|
||||
##### How to use this driver #####
|
||||
==============================================================================
|
||||
[..]
|
||||
(#) Fill parameters of Init structure in USB_OTG_CfgTypeDef structure.
|
||||
|
||||
(#) Call USB_CoreInit() API to initialize the USB Core peripheral.
|
||||
|
||||
(#) The upper HAL HCD/PCD driver will call the right routines for its internal processes.
|
||||
|
||||
@endverbatim
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f0xx_hal.h"
|
||||
|
||||
/** @addtogroup STM32F0xx_LL_USB_DRIVER
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if defined (HAL_PCD_MODULE_ENABLED) || defined (HAL_HCD_MODULE_ENABLED)
|
||||
#if defined (USB)
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
|
||||
/**
|
||||
* @brief Initializes the USB Core
|
||||
* @param USBx: USB Instance
|
||||
* @param cfg : pointer to a USB_CfgTypeDef structure that contains
|
||||
* the configuration information for the specified USBx peripheral.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(USBx);
|
||||
UNUSED(cfg);
|
||||
|
||||
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
|
||||
only by USB OTG FS peripheral.
|
||||
- This function is added to ensure compatibility across platforms.
|
||||
*/
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief USB_EnableGlobalInt
|
||||
* Enables the controller's Global Int in the AHB Config reg
|
||||
* @param USBx : Selected device
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx)
|
||||
{
|
||||
uint16_t winterruptmask;
|
||||
|
||||
/* Set winterruptmask variable */
|
||||
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
|
||||
USB_CNTR_SUSPM | USB_CNTR_ERRM |
|
||||
USB_CNTR_SOFM | USB_CNTR_ESOFM |
|
||||
USB_CNTR_RESETM | USB_CNTR_L1REQM;
|
||||
|
||||
/* Set interrupt mask */
|
||||
USBx->CNTR |= winterruptmask;
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief USB_DisableGlobalInt
|
||||
* Disable the controller's Global Int in the AHB Config reg
|
||||
* @param USBx : Selected device
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx)
|
||||
{
|
||||
uint16_t winterruptmask;
|
||||
|
||||
/* Set winterruptmask variable */
|
||||
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
|
||||
USB_CNTR_SUSPM | USB_CNTR_ERRM |
|
||||
USB_CNTR_SOFM | USB_CNTR_ESOFM |
|
||||
USB_CNTR_RESETM | USB_CNTR_L1REQM;
|
||||
|
||||
/* Clear interrupt mask */
|
||||
USBx->CNTR &= ~winterruptmask;
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief USB_SetCurrentMode : Set functional mode
|
||||
* @param USBx : Selected device
|
||||
* @param mode : current core mode
|
||||
* This parameter can be one of the these values:
|
||||
* @arg USB_DEVICE_MODE: Peripheral mode mode
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(USBx);
|
||||
UNUSED(mode);
|
||||
|
||||
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
|
||||
only by USB OTG FS peripheral.
|
||||
- This function is added to ensure compatibility across platforms.
|
||||
*/
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief USB_DevInit : Initializes the USB controller registers
|
||||
* for device mode
|
||||
* @param USBx : Selected device
|
||||
* @param cfg : pointer to a USB_CfgTypeDef structure that contains
|
||||
* the configuration information for the specified USBx peripheral.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(cfg);
|
||||
|
||||
/* Init Device */
|
||||
/*CNTR_FRES = 1*/
|
||||
USBx->CNTR = USB_CNTR_FRES;
|
||||
|
||||
/*CNTR_FRES = 0*/
|
||||
USBx->CNTR = 0;
|
||||
|
||||
/*Clear pending interrupts*/
|
||||
USBx->ISTR = 0;
|
||||
|
||||
/*Set Btable Address*/
|
||||
USBx->BTABLE = BTABLE_ADDRESS;
|
||||
|
||||
/* Enable USB Device Interrupt mask */
|
||||
(void)USB_EnableGlobalInt(USBx);
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief USB_SetDevSpeed :Initializes the device speed
|
||||
* depending on the PHY type and the enumeration speed of the device.
|
||||
* @param USBx Selected device
|
||||
* @param speed device speed
|
||||
* @retval Hal status
|
||||
*/
|
||||
HAL_StatusTypeDef USB_SetDevSpeed(USB_TypeDef *USBx, uint8_t speed)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(USBx);
|
||||
UNUSED(speed);
|
||||
|
||||
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
|
||||
only by USB OTG FS peripheral.
|
||||
- This function is added to ensure compatibility across platforms.
|
||||
*/
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief USB_FlushTxFifo : Flush a Tx FIFO
|
||||
* @param USBx : Selected device
|
||||
* @param num : FIFO number
|
||||
* This parameter can be a value from 1 to 15
|
||||
15 means Flush all Tx FIFOs
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef USB_FlushTxFifo(USB_TypeDef *USBx, uint32_t num)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(USBx);
|
||||
UNUSED(num);
|
||||
|
||||
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
|
||||
only by USB OTG FS peripheral.
|
||||
- This function is added to ensure compatibility across platforms.
|
||||
*/
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief USB_FlushRxFifo : Flush Rx FIFO
|
||||
* @param USBx : Selected device
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef USB_FlushRxFifo(USB_TypeDef *USBx)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(USBx);
|
||||
|
||||
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
|
||||
only by USB OTG FS peripheral.
|
||||
- This function is added to ensure compatibility across platforms.
|
||||
*/
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Activate and configure an endpoint
|
||||
* @param USBx : Selected device
|
||||
* @param ep: pointer to endpoint structure
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
|
||||
{
|
||||
HAL_StatusTypeDef ret = HAL_OK;
|
||||
uint16_t wEpRegVal;
|
||||
|
||||
wEpRegVal = PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_T_MASK;
|
||||
|
||||
/* initialize Endpoint */
|
||||
switch (ep->type)
|
||||
{
|
||||
case EP_TYPE_CTRL:
|
||||
wEpRegVal |= USB_EP_CONTROL;
|
||||
break;
|
||||
|
||||
case EP_TYPE_BULK:
|
||||
wEpRegVal |= USB_EP_BULK;
|
||||
break;
|
||||
|
||||
case EP_TYPE_INTR:
|
||||
wEpRegVal |= USB_EP_INTERRUPT;
|
||||
break;
|
||||
|
||||
case EP_TYPE_ISOC:
|
||||
wEpRegVal |= USB_EP_ISOCHRONOUS;
|
||||
break;
|
||||
|
||||
default:
|
||||
ret = HAL_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
PCD_SET_ENDPOINT(USBx, ep->num, wEpRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX);
|
||||
|
||||
PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num);
|
||||
|
||||
if (ep->doublebuffer == 0U)
|
||||
{
|
||||
if (ep->is_in != 0U)
|
||||
{
|
||||
/*Set the endpoint Transmit buffer address */
|
||||
PCD_SET_EP_TX_ADDRESS(USBx, ep->num, ep->pmaadress);
|
||||
PCD_CLEAR_TX_DTOG(USBx, ep->num);
|
||||
|
||||
if (ep->type != EP_TYPE_ISOC)
|
||||
{
|
||||
/* Configure NAK status for the Endpoint */
|
||||
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Configure TX Endpoint to disabled state */
|
||||
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/*Set the endpoint Receive buffer address */
|
||||
PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress);
|
||||
/*Set the endpoint Receive buffer counter*/
|
||||
PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket);
|
||||
PCD_CLEAR_RX_DTOG(USBx, ep->num);
|
||||
/* Configure VALID status for the Endpoint*/
|
||||
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
|
||||
}
|
||||
}
|
||||
/*Double Buffer*/
|
||||
else
|
||||
{
|
||||
/* Set the endpoint as double buffered */
|
||||
PCD_SET_EP_DBUF(USBx, ep->num);
|
||||
/* Set buffer address for double buffered mode */
|
||||
PCD_SET_EP_DBUF_ADDR(USBx, ep->num, ep->pmaaddr0, ep->pmaaddr1);
|
||||
|
||||
if (ep->is_in == 0U)
|
||||
{
|
||||
/* Clear the data toggle bits for the endpoint IN/OUT */
|
||||
PCD_CLEAR_RX_DTOG(USBx, ep->num);
|
||||
PCD_CLEAR_TX_DTOG(USBx, ep->num);
|
||||
|
||||
/* Reset value of the data toggle bits for the endpoint out */
|
||||
PCD_TX_DTOG(USBx, ep->num);
|
||||
|
||||
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
|
||||
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Clear the data toggle bits for the endpoint IN/OUT */
|
||||
PCD_CLEAR_RX_DTOG(USBx, ep->num);
|
||||
PCD_CLEAR_TX_DTOG(USBx, ep->num);
|
||||
PCD_RX_DTOG(USBx, ep->num);
|
||||
|
||||
if (ep->type != EP_TYPE_ISOC)
|
||||
{
|
||||
/* Configure NAK status for the Endpoint */
|
||||
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Configure TX Endpoint to disabled state */
|
||||
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
|
||||
}
|
||||
|
||||
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief De-activate and de-initialize an endpoint
|
||||
* @param USBx : Selected device
|
||||
* @param ep: pointer to endpoint structure
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
|
||||
{
|
||||
if (ep->doublebuffer == 0U)
|
||||
{
|
||||
if (ep->is_in != 0U)
|
||||
{
|
||||
PCD_CLEAR_TX_DTOG(USBx, ep->num);
|
||||
/* Configure DISABLE status for the Endpoint*/
|
||||
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
|
||||
}
|
||||
else
|
||||
{
|
||||
PCD_CLEAR_RX_DTOG(USBx, ep->num);
|
||||
/* Configure DISABLE status for the Endpoint*/
|
||||
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
|
||||
}
|
||||
}
|
||||
/*Double Buffer*/
|
||||
else
|
||||
{
|
||||
if (ep->is_in == 0U)
|
||||
{
|
||||
/* Clear the data toggle bits for the endpoint IN/OUT*/
|
||||
PCD_CLEAR_RX_DTOG(USBx, ep->num);
|
||||
PCD_CLEAR_TX_DTOG(USBx, ep->num);
|
||||
|
||||
/* Reset value of the data toggle bits for the endpoint out*/
|
||||
PCD_TX_DTOG(USBx, ep->num);
|
||||
|
||||
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
|
||||
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Clear the data toggle bits for the endpoint IN/OUT*/
|
||||
PCD_CLEAR_RX_DTOG(USBx, ep->num);
|
||||
PCD_CLEAR_TX_DTOG(USBx, ep->num);
|
||||
PCD_RX_DTOG(USBx, ep->num);
|
||||
/* Configure DISABLE status for the Endpoint*/
|
||||
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
|
||||
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
|
||||
}
|
||||
}
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief USB_EPStartXfer : setup and starts a transfer over an EP
|
||||
* @param USBx : Selected device
|
||||
* @param ep: pointer to endpoint structure
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep)
|
||||
{
|
||||
uint16_t pmabuffer;
|
||||
uint32_t len;
|
||||
|
||||
/* IN endpoint */
|
||||
if (ep->is_in == 1U)
|
||||
{
|
||||
/*Multi packet transfer*/
|
||||
if (ep->xfer_len > ep->maxpacket)
|
||||
{
|
||||
len = ep->maxpacket;
|
||||
ep->xfer_len -= len;
|
||||
}
|
||||
else
|
||||
{
|
||||
len = ep->xfer_len;
|
||||
ep->xfer_len = 0U;
|
||||
}
|
||||
|
||||
/* configure and validate Tx endpoint */
|
||||
if (ep->doublebuffer == 0U)
|
||||
{
|
||||
USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, (uint16_t)len);
|
||||
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Write the data to the USB endpoint */
|
||||
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
|
||||
{
|
||||
/* Set the Double buffer counter for pmabuffer1 */
|
||||
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
|
||||
pmabuffer = ep->pmaaddr1;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Set the Double buffer counter for pmabuffer0 */
|
||||
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
|
||||
pmabuffer = ep->pmaaddr0;
|
||||
}
|
||||
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
|
||||
PCD_FreeUserBuffer(USBx, ep->num, ep->is_in);
|
||||
}
|
||||
|
||||
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID);
|
||||
}
|
||||
else /* OUT endpoint */
|
||||
{
|
||||
/* Multi packet transfer*/
|
||||
if (ep->xfer_len > ep->maxpacket)
|
||||
{
|
||||
len = ep->maxpacket;
|
||||
ep->xfer_len -= len;
|
||||
}
|
||||
else
|
||||
{
|
||||
len = ep->xfer_len;
|
||||
ep->xfer_len = 0U;
|
||||
}
|
||||
|
||||
/* configure and validate Rx endpoint */
|
||||
if (ep->doublebuffer == 0U)
|
||||
{
|
||||
/*Set RX buffer count*/
|
||||
PCD_SET_EP_RX_CNT(USBx, ep->num, len);
|
||||
}
|
||||
else
|
||||
{
|
||||
/*Set the Double buffer counter*/
|
||||
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, len);
|
||||
}
|
||||
|
||||
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
|
||||
}
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief USB_WritePacket : Writes a packet into the Tx FIFO associated
|
||||
* with the EP/channel
|
||||
* @param USBx : Selected device
|
||||
* @param src : pointer to source buffer
|
||||
* @param ch_ep_num : endpoint or host channel number
|
||||
* @param len : Number of bytes to write
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef USB_WritePacket(USB_TypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(USBx);
|
||||
UNUSED(src);
|
||||
UNUSED(ch_ep_num);
|
||||
UNUSED(len);
|
||||
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
|
||||
only by USB OTG FS peripheral.
|
||||
- This function is added to ensure compatibility across platforms.
|
||||
*/
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief USB_ReadPacket : read a packet from the Tx FIFO associated
|
||||
* with the EP/channel
|
||||
* @param USBx : Selected device
|
||||
* @param dest : destination pointer
|
||||
* @param len : Number of bytes to read
|
||||
* @retval pointer to destination buffer
|
||||
*/
|
||||
void *USB_ReadPacket(USB_TypeDef *USBx, uint8_t *dest, uint16_t len)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(USBx);
|
||||
UNUSED(dest);
|
||||
UNUSED(len);
|
||||
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
|
||||
only by USB OTG FS peripheral.
|
||||
- This function is added to ensure compatibility across platforms.
|
||||
*/
|
||||
return ((void *)NULL);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief USB_EPSetStall : set a stall condition over an EP
|
||||
* @param USBx : Selected device
|
||||
* @param ep: pointer to endpoint structure
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
|
||||
{
|
||||
if (ep->is_in != 0U)
|
||||
{
|
||||
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_STALL);
|
||||
}
|
||||
else
|
||||
{
|
||||
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_STALL);
|
||||
}
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief USB_EPClearStall : Clear a stall condition over an EP
|
||||
* @param USBx : Selected device
|
||||
* @param ep: pointer to endpoint structure
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
|
||||
{
|
||||
if (ep->doublebuffer == 0U)
|
||||
{
|
||||
if (ep->is_in != 0U)
|
||||
{
|
||||
PCD_CLEAR_TX_DTOG(USBx, ep->num);
|
||||
|
||||
if (ep->type != EP_TYPE_ISOC)
|
||||
{
|
||||
/* Configure NAK status for the Endpoint */
|
||||
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
PCD_CLEAR_RX_DTOG(USBx, ep->num);
|
||||
|
||||
/* Configure VALID status for the Endpoint*/
|
||||
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
|
||||
}
|
||||
}
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief USB_StopDevice : Stop the usb device mode
|
||||
* @param USBx : Selected device
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef USB_StopDevice(USB_TypeDef *USBx)
|
||||
{
|
||||
/* disable all interrupts and force USB reset */
|
||||
USBx->CNTR = USB_CNTR_FRES;
|
||||
|
||||
/* clear interrupt status register */
|
||||
USBx->ISTR = 0;
|
||||
|
||||
/* switch-off device */
|
||||
USBx->CNTR = (USB_CNTR_FRES | USB_CNTR_PDWN);
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief USB_SetDevAddress : Stop the usb device mode
|
||||
* @param USBx : Selected device
|
||||
* @param address : new device address to be assigned
|
||||
* This parameter can be a value from 0 to 255
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address)
|
||||
{
|
||||
if (address == 0U)
|
||||
{
|
||||
/* set device address and enable function */
|
||||
USBx->DADDR = USB_DADDR_EF;
|
||||
}
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief USB_DevConnect : Connect the USB device by enabling the pull-up/pull-down
|
||||
* @param USBx : Selected device
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx)
|
||||
{
|
||||
/* Enabling DP Pull-UP bit to Connect internal PU resistor on USB DP line */
|
||||
USBx->BCDR |= USB_BCDR_DPPU;
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief USB_DevDisconnect : Disconnect the USB device by disabling the pull-up/pull-down
|
||||
* @param USBx : Selected device
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx)
|
||||
{
|
||||
/* Disable DP Pull-Up bit to disconnect the Internal PU resistor on USB DP line */
|
||||
USBx->BCDR &= (uint16_t)(~(USB_BCDR_DPPU));
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief USB_ReadInterrupts: return the global USB interrupt status
|
||||
* @param USBx : Selected device
|
||||
* @retval HAL status
|
||||
*/
|
||||
uint32_t USB_ReadInterrupts(USB_TypeDef *USBx)
|
||||
{
|
||||
uint32_t tmpreg;
|
||||
|
||||
tmpreg = USBx->ISTR;
|
||||
return tmpreg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief USB_ReadDevAllOutEpInterrupt: return the USB device OUT endpoints interrupt status
|
||||
* @param USBx : Selected device
|
||||
* @retval HAL status
|
||||
*/
|
||||
uint32_t USB_ReadDevAllOutEpInterrupt(USB_TypeDef *USBx)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(USBx);
|
||||
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
|
||||
only by USB OTG FS peripheral.
|
||||
- This function is added to ensure compatibility across platforms.
|
||||
*/
|
||||
return (0);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief USB_ReadDevAllInEpInterrupt: return the USB device IN endpoints interrupt status
|
||||
* @param USBx : Selected device
|
||||
* @retval HAL status
|
||||
*/
|
||||
uint32_t USB_ReadDevAllInEpInterrupt(USB_TypeDef *USBx)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(USBx);
|
||||
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
|
||||
only by USB OTG FS peripheral.
|
||||
- This function is added to ensure compatibility across platforms.
|
||||
*/
|
||||
return (0);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Returns Device OUT EP Interrupt register
|
||||
* @param USBx : Selected device
|
||||
* @param epnum : endpoint number
|
||||
* This parameter can be a value from 0 to 15
|
||||
* @retval Device OUT EP Interrupt register
|
||||
*/
|
||||
uint32_t USB_ReadDevOutEPInterrupt(USB_TypeDef *USBx, uint8_t epnum)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(USBx);
|
||||
UNUSED(epnum);
|
||||
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
|
||||
only by USB OTG FS peripheral.
|
||||
- This function is added to ensure compatibility across platforms.
|
||||
*/
|
||||
return (0);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Returns Device IN EP Interrupt register
|
||||
* @param USBx : Selected device
|
||||
* @param epnum : endpoint number
|
||||
* This parameter can be a value from 0 to 15
|
||||
* @retval Device IN EP Interrupt register
|
||||
*/
|
||||
uint32_t USB_ReadDevInEPInterrupt(USB_TypeDef *USBx, uint8_t epnum)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(USBx);
|
||||
UNUSED(epnum);
|
||||
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
|
||||
only by USB OTG FS peripheral.
|
||||
- This function is added to ensure compatibility across platforms.
|
||||
*/
|
||||
return (0);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief USB_ClearInterrupts: clear a USB interrupt
|
||||
* @param USBx Selected device
|
||||
* @param interrupt interrupt flag
|
||||
* @retval None
|
||||
*/
|
||||
void USB_ClearInterrupts(USB_TypeDef *USBx, uint32_t interrupt)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(USBx);
|
||||
UNUSED(interrupt);
|
||||
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
|
||||
only by USB OTG FS peripheral.
|
||||
- This function is added to ensure compatibility across platforms.
|
||||
*/
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Prepare the EP0 to start the first control setup
|
||||
* @param USBx Selected device
|
||||
* @param psetup pointer to setup packet
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t *psetup)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(USBx);
|
||||
UNUSED(psetup);
|
||||
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
|
||||
only by USB OTG FS peripheral.
|
||||
- This function is added to ensure compatibility across platforms.
|
||||
*/
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief USB_ActivateRemoteWakeup : active remote wakeup signalling
|
||||
* @param USBx Selected device
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_TypeDef *USBx)
|
||||
{
|
||||
USBx->CNTR |= USB_CNTR_RESUME;
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief USB_DeActivateRemoteWakeup : de-active remote wakeup signalling
|
||||
* @param USBx Selected device
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_TypeDef *USBx)
|
||||
{
|
||||
USBx->CNTR &= ~(USB_CNTR_RESUME);
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Copy a buffer from user memory area to packet memory area (PMA)
|
||||
* @param USBx USB peripheral instance register address.
|
||||
* @param pbUsrBuf pointer to user memory area.
|
||||
* @param wPMABufAddr address into PMA.
|
||||
* @param wNBytes: no. of bytes to be copied.
|
||||
* @retval None
|
||||
*/
|
||||
void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
|
||||
{
|
||||
uint32_t n = ((uint32_t)wNBytes + 1U) >> 1;
|
||||
uint32_t BaseAddr = (uint32_t)USBx;
|
||||
uint32_t i, temp1, temp2;
|
||||
__IO uint16_t *pdwVal;
|
||||
uint8_t *pBuf = pbUsrBuf;
|
||||
|
||||
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
|
||||
|
||||
for (i = n; i != 0U; i--)
|
||||
{
|
||||
temp1 = *pBuf;
|
||||
pBuf++;
|
||||
temp2 = temp1 | ((uint16_t)((uint16_t) *pBuf << 8));
|
||||
*pdwVal = (uint16_t)temp2;
|
||||
pdwVal++;
|
||||
|
||||
#if PMA_ACCESS > 1U
|
||||
pdwVal++;
|
||||
#endif
|
||||
|
||||
pBuf++;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Copy a buffer from user memory area to packet memory area (PMA)
|
||||
* @param USBx: USB peripheral instance register address.
|
||||
* @param pbUsrBuf pointer to user memory area.
|
||||
* @param wPMABufAddr address into PMA.
|
||||
* @param wNBytes: no. of bytes to be copied.
|
||||
* @retval None
|
||||
*/
|
||||
void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
|
||||
{
|
||||
uint32_t n = (uint32_t)wNBytes >> 1;
|
||||
uint32_t BaseAddr = (uint32_t)USBx;
|
||||
uint32_t i, temp;
|
||||
__IO uint16_t *pdwVal;
|
||||
uint8_t *pBuf = pbUsrBuf;
|
||||
|
||||
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
|
||||
|
||||
for (i = n; i != 0U; i--)
|
||||
{
|
||||
temp = *(__IO uint16_t *)pdwVal;
|
||||
pdwVal++;
|
||||
*pBuf = (uint8_t)((temp >> 0) & 0xFFU);
|
||||
pBuf++;
|
||||
*pBuf = (uint8_t)((temp >> 8) & 0xFFU);
|
||||
pBuf++;
|
||||
|
||||
#if PMA_ACCESS > 1U
|
||||
pdwVal++;
|
||||
#endif
|
||||
}
|
||||
|
||||
if ((wNBytes % 2U) != 0U)
|
||||
{
|
||||
temp = *pdwVal;
|
||||
*pBuf = (uint8_t)((temp >> 0) & 0xFFU);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* defined (USB) */
|
||||
#endif /* defined (HAL_PCD_MODULE_ENABLED) || defined (HAL_HCD_MODULE_ENABLED) */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
File diff suppressed because it is too large
Load Diff
|
@ -1,4 +1,5 @@
|
|||
# Copyright (c) 2017 Erwin Rol <erwin@erwinrol.com>
|
||||
# Copyright (c) 2019 STMicroelectronics.
|
||||
#
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
|
@ -16,6 +17,7 @@ zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_CRC_EX drivers/src/stm32f3xx_h
|
|||
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_DAC drivers/src/stm32f3xx_hal_dac.c)
|
||||
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_DAC_EX drivers/src/stm32f3xx_hal_dac_ex.c)
|
||||
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_DMA drivers/src/stm32f3xx_hal_dma.c)
|
||||
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_EXTI drivers/src/stm32f3xx_hal_exti.c)
|
||||
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_FLASH drivers/src/stm32f3xx_hal_flash.c)
|
||||
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_FLASH_EX drivers/src/stm32f3xx_hal_flash_ex.c)
|
||||
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_GPIO drivers/src/stm32f3xx_hal_gpio.c)
|
||||
|
@ -35,6 +37,7 @@ zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_PCD drivers/src/stm32f3xx_hal_
|
|||
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_PCD_EX drivers/src/stm32f3xx_hal_pcd_ex.c)
|
||||
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_PWR drivers/src/stm32f3xx_hal_pwr.c)
|
||||
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_PWR_EX drivers/src/stm32f3xx_hal_pwr_ex.c)
|
||||
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_RCC drivers/src/stm32f3xx_hal_rcc.c)
|
||||
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_RCC_EX drivers/src/stm32f3xx_hal_rcc_ex.c)
|
||||
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_RTC drivers/src/stm32f3xx_hal_rtc.c)
|
||||
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_RTC_EX drivers/src/stm32f3xx_hal_rtc_ex.c)
|
||||
|
@ -51,6 +54,7 @@ zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_TSC drivers/src/stm32f3xx_hal_
|
|||
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_UART drivers/src/stm32f3xx_hal_uart.c)
|
||||
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_UART_EX drivers/src/stm32f3xx_hal_uart_ex.c)
|
||||
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_USART drivers/src/stm32f3xx_hal_usart.c)
|
||||
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_USART_EX drivers/src/stm32f3xx_hal_usart_ex.c)
|
||||
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_WWDG drivers/src/stm32f3xx_hal_wwdg.c)
|
||||
zephyr_library_sources_ifdef(CONFIG_USE_STM32_LL_ADC drivers/src/stm32f3xx_ll_adc.c)
|
||||
zephyr_library_sources_ifdef(CONFIG_USE_STM32_LL_COMP drivers/src/stm32f3xx_ll_comp.c)
|
||||
|
@ -69,4 +73,5 @@ zephyr_library_sources_ifdef(CONFIG_USE_STM32_LL_RTC drivers/src/stm32f3xx_ll_rt
|
|||
zephyr_library_sources_ifdef(CONFIG_USE_STM32_LL_SPI drivers/src/stm32f3xx_ll_spi.c)
|
||||
zephyr_library_sources_ifdef(CONFIG_USE_STM32_LL_TIM drivers/src/stm32f3xx_ll_tim.c)
|
||||
zephyr_library_sources_ifdef(CONFIG_USE_STM32_LL_USART drivers/src/stm32f3xx_ll_usart.c)
|
||||
zephyr_library_sources_ifdef(CONFIG_USE_STM32_LL_USB drivers/src/stm32f3xx_ll_usb.c)
|
||||
zephyr_library_sources_ifdef(CONFIG_USE_STM32_LL_UTILS drivers/src/stm32f3xx_ll_utils.c)
|
||||
|
|
|
@ -6,7 +6,7 @@ Origin:
|
|||
http://www.st.com/en/embedded-software/stm32cubef3.html
|
||||
|
||||
Status:
|
||||
version 1.10.0
|
||||
version v1.11.0
|
||||
|
||||
Purpose:
|
||||
ST Microelectronics official MCU package for STM32F3 series.
|
||||
|
@ -20,10 +20,10 @@ Dependencies:
|
|||
None.
|
||||
|
||||
URL:
|
||||
http://www.st.com/en/embedded-software/stm32cubef3.html
|
||||
https://github.com/STMicroelectronics/STM32CubeF3
|
||||
|
||||
commit:
|
||||
version 1.10.0
|
||||
Commit:
|
||||
8fa3aadf0255818f0ca72ba6a5a6731ef8c585fb
|
||||
|
||||
Maintained-by:
|
||||
External
|
||||
|
@ -36,14 +36,4 @@ License Link:
|
|||
|
||||
Patch List:
|
||||
|
||||
*Changes from official delivery:
|
||||
-dos2unix applied
|
||||
-trailing white spaces removed
|
||||
|
||||
*Fix warnings for extraneous parentheses
|
||||
Using clang 7.0.1, if ((htim->State == HAL_TIM_STATE_BUSY))
|
||||
generates warnings. Remove the extra parentheses
|
||||
Impacted files:
|
||||
drivers/src/stm32f3xx_hal_tim.c
|
||||
drivers/src/stm32f3xx_hal_tim_ex.c
|
||||
ST Bug tracker ID: 63616
|
||||
See release_note.html from STM32Cube
|
||||
|
|
|
@ -7,29 +7,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
@ -110,6 +94,10 @@
|
|||
#define HAL_ADC_STATE_ERROR HAL_ADC_STATE_ERROR_INTERNAL
|
||||
#define HAL_ADC_STATE_BUSY HAL_ADC_STATE_BUSY_INTERNAL
|
||||
#define HAL_ADC_STATE_AWD HAL_ADC_STATE_AWD1
|
||||
|
||||
#if defined(STM32H7)
|
||||
#define ADC_CHANNEL_VBAT_DIV4 ADC_CHANNEL_VBAT
|
||||
#endif /* STM32H7 */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -248,6 +236,16 @@
|
|||
#define DAC_WAVEGENERATION_NOISE DAC_WAVE_NOISE
|
||||
#define DAC_WAVEGENERATION_TRIANGLE DAC_WAVE_TRIANGLE
|
||||
|
||||
#if defined(STM32G4)
|
||||
#define DAC_CHIPCONNECT_DISABLE (DAC_CHIPCONNECT_EXTERNAL | DAC_CHIPCONNECT_BOTH)
|
||||
#define DAC_CHIPCONNECT_ENABLE (DAC_CHIPCONNECT_INTERNAL | DAC_CHIPCONNECT_BOTH)
|
||||
#endif
|
||||
|
||||
#if defined(STM32L1) || defined(STM32L4) || defined(STM32G0)
|
||||
#define HAL_DAC_MSP_INIT_CB_ID HAL_DAC_MSPINIT_CB_ID
|
||||
#define HAL_DAC_MSP_DEINIT_CB_ID HAL_DAC_MSPDEINIT_CB_ID
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -363,6 +361,10 @@
|
|||
#define HAL_DMAMUX_REQUEST_GEN_FALLING HAL_DMAMUX_REQ_GEN_FALLING
|
||||
#define HAL_DMAMUX_REQUEST_GEN_RISING_FALLING HAL_DMAMUX_REQ_GEN_RISING_FALLING
|
||||
|
||||
#define DFSDM_FILTER_EXT_TRIG_LPTIM1 DFSDM_FILTER_EXT_TRIG_LPTIM1_OUT
|
||||
#define DFSDM_FILTER_EXT_TRIG_LPTIM2 DFSDM_FILTER_EXT_TRIG_LPTIM2_OUT
|
||||
#define DFSDM_FILTER_EXT_TRIG_LPTIM3 DFSDM_FILTER_EXT_TRIG_LPTIM3_OUT
|
||||
|
||||
#endif /* STM32H7 */
|
||||
|
||||
/**
|
||||
|
@ -451,6 +453,16 @@
|
|||
#define OB_BOOT_ENTRY_FORCED_NONE OB_BOOT_LOCK_DISABLE
|
||||
#define OB_BOOT_ENTRY_FORCED_FLASH OB_BOOT_LOCK_ENABLE
|
||||
#endif
|
||||
#if defined(STM32H7)
|
||||
#define FLASH_FLAG_SNECCE_BANK1RR FLASH_FLAG_SNECCERR_BANK1
|
||||
#define FLASH_FLAG_DBECCE_BANK1RR FLASH_FLAG_DBECCERR_BANK1
|
||||
#define FLASH_FLAG_STRBER_BANK1R FLASH_FLAG_STRBERR_BANK1
|
||||
#define FLASH_FLAG_SNECCE_BANK2RR FLASH_FLAG_SNECCERR_BANK2
|
||||
#define FLASH_FLAG_DBECCE_BANK2RR FLASH_FLAG_DBECCERR_BANK2
|
||||
#define FLASH_FLAG_STRBER_BANK2R FLASH_FLAG_STRBERR_BANK2
|
||||
#define FLASH_FLAG_WDW FLASH_FLAG_WBNE
|
||||
#define OB_WRP_SECTOR_All OB_WRP_SECTOR_ALL
|
||||
#endif /* STM32H7 */
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
@ -486,6 +498,13 @@
|
|||
#define HAL_SYSCFG_FASTMODEPLUS_I2C1 I2C_FASTMODEPLUS_I2C1
|
||||
#define HAL_SYSCFG_FASTMODEPLUS_I2C2 I2C_FASTMODEPLUS_I2C2
|
||||
#define HAL_SYSCFG_FASTMODEPLUS_I2C3 I2C_FASTMODEPLUS_I2C3
|
||||
#if defined(STM32G4)
|
||||
|
||||
#define HAL_SYSCFG_EnableIOAnalogSwitchBooster HAL_SYSCFG_EnableIOSwitchBooster
|
||||
#define HAL_SYSCFG_DisableIOAnalogSwitchBooster HAL_SYSCFG_DisableIOSwitchBooster
|
||||
#define HAL_SYSCFG_EnableIOAnalogSwitchVDD HAL_SYSCFG_EnableIOSwitchVDD
|
||||
#define HAL_SYSCFG_DisableIOAnalogSwitchVDD HAL_SYSCFG_DisableIOSwitchVDD
|
||||
#endif /* STM32G4 */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -494,7 +513,7 @@
|
|||
/** @defgroup LL_FMC_Aliased_Defines LL FMC Aliased Defines maintained for compatibility purpose
|
||||
* @{
|
||||
*/
|
||||
#if defined(STM32L4) || defined(STM32F7) || defined(STM32H7)
|
||||
#if defined(STM32L4) || defined(STM32F7) || defined(STM32H7) || defined(STM32G4)
|
||||
#define FMC_NAND_PCC_WAIT_FEATURE_DISABLE FMC_NAND_WAIT_FEATURE_DISABLE
|
||||
#define FMC_NAND_PCC_WAIT_FEATURE_ENABLE FMC_NAND_WAIT_FEATURE_ENABLE
|
||||
#define FMC_NAND_PCC_MEM_BUS_WIDTH_8 FMC_NAND_MEM_BUS_WIDTH_8
|
||||
|
@ -553,12 +572,12 @@
|
|||
#define GPIO_AF1_LPTIM GPIO_AF1_LPTIM1
|
||||
#define GPIO_AF2_LPTIM GPIO_AF2_LPTIM1
|
||||
|
||||
#if defined(STM32L0) || defined(STM32L4) || defined(STM32F4) || defined(STM32F2) || defined(STM32F7) || defined(STM32G4)
|
||||
#if defined(STM32L0) || defined(STM32L4) || defined(STM32F4) || defined(STM32F2) || defined(STM32F7) || defined(STM32G4) || defined(STM32H7)
|
||||
#define GPIO_SPEED_LOW GPIO_SPEED_FREQ_LOW
|
||||
#define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_MEDIUM
|
||||
#define GPIO_SPEED_FAST GPIO_SPEED_FREQ_HIGH
|
||||
#define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_VERY_HIGH
|
||||
#endif /* STM32L0 || STM32L4 || STM32F4 || STM32F2 || STM32F7 || STM32G4 */
|
||||
#endif /* STM32L0 || STM32L4 || STM32F4 || STM32F2 || STM32F7 || STM32G4 || STM32H7*/
|
||||
|
||||
#if defined(STM32L1)
|
||||
#define GPIO_SPEED_VERY_LOW GPIO_SPEED_FREQ_LOW
|
||||
|
@ -599,6 +618,125 @@
|
|||
#define __HAL_HRTIM_GetClockPrescaler __HAL_HRTIM_GETCLOCKPRESCALER
|
||||
#define __HAL_HRTIM_SetCompare __HAL_HRTIM_SETCOMPARE
|
||||
#define __HAL_HRTIM_GetCompare __HAL_HRTIM_GETCOMPARE
|
||||
|
||||
#if defined(STM32G4)
|
||||
#define HAL_HRTIM_ExternalEventCounterConfig HAL_HRTIM_ExtEventCounterConfig
|
||||
#define HAL_HRTIM_ExternalEventCounterEnable HAL_HRTIM_ExtEventCounterEnable
|
||||
#define HAL_HRTIM_ExternalEventCounterDisable HAL_HRTIM_ExtEventCounterDisable
|
||||
#define HAL_HRTIM_ExternalEventCounterReset HAL_HRTIM_ExtEventCounterReset
|
||||
#endif /* STM32G4 */
|
||||
|
||||
#if defined(STM32H7)
|
||||
#define HRTIM_OUTPUTSET_TIMAEV1_TIMBCMP1 HRTIM_OUTPUTSET_TIMEV_1
|
||||
#define HRTIM_OUTPUTSET_TIMAEV2_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_2
|
||||
#define HRTIM_OUTPUTSET_TIMAEV3_TIMCCMP2 HRTIM_OUTPUTSET_TIMEV_3
|
||||
#define HRTIM_OUTPUTSET_TIMAEV4_TIMCCMP3 HRTIM_OUTPUTSET_TIMEV_4
|
||||
#define HRTIM_OUTPUTSET_TIMAEV5_TIMDCMP1 HRTIM_OUTPUTSET_TIMEV_5
|
||||
#define HRTIM_OUTPUTSET_TIMAEV6_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_6
|
||||
#define HRTIM_OUTPUTSET_TIMAEV7_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_7
|
||||
#define HRTIM_OUTPUTSET_TIMAEV8_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_8
|
||||
#define HRTIM_OUTPUTSET_TIMAEV9_TIMFCMP4 HRTIM_OUTPUTSET_TIMEV_9
|
||||
#define HRTIM_OUTPUTSET_TIMBEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1
|
||||
#define HRTIM_OUTPUTSET_TIMBEV2_TIMACMP2 HRTIM_OUTPUTSET_TIMEV_2
|
||||
#define HRTIM_OUTPUTSET_TIMBEV3_TIMCCMP3 HRTIM_OUTPUTSET_TIMEV_3
|
||||
#define HRTIM_OUTPUTSET_TIMBEV4_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_4
|
||||
#define HRTIM_OUTPUTSET_TIMBEV5_TIMDCMP3 HRTIM_OUTPUTSET_TIMEV_5
|
||||
#define HRTIM_OUTPUTSET_TIMBEV6_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_6
|
||||
#define HRTIM_OUTPUTSET_TIMBEV7_TIMECMP1 HRTIM_OUTPUTSET_TIMEV_7
|
||||
#define HRTIM_OUTPUTSET_TIMBEV8_TIMECMP2 HRTIM_OUTPUTSET_TIMEV_8
|
||||
#define HRTIM_OUTPUTSET_TIMBEV9_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_9
|
||||
#define HRTIM_OUTPUTSET_TIMCEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1
|
||||
#define HRTIM_OUTPUTSET_TIMCEV2_TIMACMP2 HRTIM_OUTPUTSET_TIMEV_2
|
||||
#define HRTIM_OUTPUTSET_TIMCEV3_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_3
|
||||
#define HRTIM_OUTPUTSET_TIMCEV4_TIMBCMP3 HRTIM_OUTPUTSET_TIMEV_4
|
||||
#define HRTIM_OUTPUTSET_TIMCEV5_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_5
|
||||
#define HRTIM_OUTPUTSET_TIMCEV6_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_6
|
||||
#define HRTIM_OUTPUTSET_TIMCEV7_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_7
|
||||
#define HRTIM_OUTPUTSET_TIMCEV8_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_8
|
||||
#define HRTIM_OUTPUTSET_TIMCEV9_TIMFCMP2 HRTIM_OUTPUTSET_TIMEV_9
|
||||
#define HRTIM_OUTPUTSET_TIMDEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1
|
||||
#define HRTIM_OUTPUTSET_TIMDEV2_TIMACMP4 HRTIM_OUTPUTSET_TIMEV_2
|
||||
#define HRTIM_OUTPUTSET_TIMDEV3_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_3
|
||||
#define HRTIM_OUTPUTSET_TIMDEV4_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_4
|
||||
#define HRTIM_OUTPUTSET_TIMDEV5_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_5
|
||||
#define HRTIM_OUTPUTSET_TIMDEV6_TIMECMP1 HRTIM_OUTPUTSET_TIMEV_6
|
||||
#define HRTIM_OUTPUTSET_TIMDEV7_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_7
|
||||
#define HRTIM_OUTPUTSET_TIMDEV8_TIMFCMP1 HRTIM_OUTPUTSET_TIMEV_8
|
||||
#define HRTIM_OUTPUTSET_TIMDEV9_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_9
|
||||
#define HRTIM_OUTPUTSET_TIMEEV1_TIMACMP4 HRTIM_OUTPUTSET_TIMEV_1
|
||||
#define HRTIM_OUTPUTSET_TIMEEV2_TIMBCMP3 HRTIM_OUTPUTSET_TIMEV_2
|
||||
#define HRTIM_OUTPUTSET_TIMEEV3_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_3
|
||||
#define HRTIM_OUTPUTSET_TIMEEV4_TIMCCMP1 HRTIM_OUTPUTSET_TIMEV_4
|
||||
#define HRTIM_OUTPUTSET_TIMEEV5_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_5
|
||||
#define HRTIM_OUTPUTSET_TIMEEV6_TIMDCMP1 HRTIM_OUTPUTSET_TIMEV_6
|
||||
#define HRTIM_OUTPUTSET_TIMEEV7_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_7
|
||||
#define HRTIM_OUTPUTSET_TIMEEV8_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_8
|
||||
#define HRTIM_OUTPUTSET_TIMEEV9_TIMFCMP4 HRTIM_OUTPUTSET_TIMEV_9
|
||||
#define HRTIM_OUTPUTSET_TIMFEV1_TIMACMP3 HRTIM_OUTPUTSET_TIMEV_1
|
||||
#define HRTIM_OUTPUTSET_TIMFEV2_TIMBCMP1 HRTIM_OUTPUTSET_TIMEV_2
|
||||
#define HRTIM_OUTPUTSET_TIMFEV3_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_3
|
||||
#define HRTIM_OUTPUTSET_TIMFEV4_TIMCCMP1 HRTIM_OUTPUTSET_TIMEV_4
|
||||
#define HRTIM_OUTPUTSET_TIMFEV5_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_5
|
||||
#define HRTIM_OUTPUTSET_TIMFEV6_TIMDCMP3 HRTIM_OUTPUTSET_TIMEV_6
|
||||
#define HRTIM_OUTPUTSET_TIMFEV7_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_7
|
||||
#define HRTIM_OUTPUTSET_TIMFEV8_TIMECMP2 HRTIM_OUTPUTSET_TIMEV_8
|
||||
#define HRTIM_OUTPUTSET_TIMFEV9_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_9
|
||||
|
||||
#define HRTIM_OUTPUTRESET_TIMAEV1_TIMBCMP1 HRTIM_OUTPUTSET_TIMEV_1
|
||||
#define HRTIM_OUTPUTRESET_TIMAEV2_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_2
|
||||
#define HRTIM_OUTPUTRESET_TIMAEV3_TIMCCMP2 HRTIM_OUTPUTSET_TIMEV_3
|
||||
#define HRTIM_OUTPUTRESET_TIMAEV4_TIMCCMP3 HRTIM_OUTPUTSET_TIMEV_4
|
||||
#define HRTIM_OUTPUTRESET_TIMAEV5_TIMDCMP1 HRTIM_OUTPUTSET_TIMEV_5
|
||||
#define HRTIM_OUTPUTRESET_TIMAEV6_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_6
|
||||
#define HRTIM_OUTPUTRESET_TIMAEV7_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_7
|
||||
#define HRTIM_OUTPUTRESET_TIMAEV8_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_8
|
||||
#define HRTIM_OUTPUTRESET_TIMAEV9_TIMFCMP4 HRTIM_OUTPUTSET_TIMEV_9
|
||||
#define HRTIM_OUTPUTRESET_TIMBEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1
|
||||
#define HRTIM_OUTPUTRESET_TIMBEV2_TIMACMP2 HRTIM_OUTPUTSET_TIMEV_2
|
||||
#define HRTIM_OUTPUTRESET_TIMBEV3_TIMCCMP3 HRTIM_OUTPUTSET_TIMEV_3
|
||||
#define HRTIM_OUTPUTRESET_TIMBEV4_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_4
|
||||
#define HRTIM_OUTPUTRESET_TIMBEV5_TIMDCMP3 HRTIM_OUTPUTSET_TIMEV_5
|
||||
#define HRTIM_OUTPUTRESET_TIMBEV6_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_6
|
||||
#define HRTIM_OUTPUTRESET_TIMBEV7_TIMECMP1 HRTIM_OUTPUTSET_TIMEV_7
|
||||
#define HRTIM_OUTPUTRESET_TIMBEV8_TIMECMP2 HRTIM_OUTPUTSET_TIMEV_8
|
||||
#define HRTIM_OUTPUTRESET_TIMBEV9_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_9
|
||||
#define HRTIM_OUTPUTRESET_TIMCEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1
|
||||
#define HRTIM_OUTPUTRESET_TIMCEV2_TIMACMP2 HRTIM_OUTPUTSET_TIMEV_2
|
||||
#define HRTIM_OUTPUTRESET_TIMCEV3_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_3
|
||||
#define HRTIM_OUTPUTRESET_TIMCEV4_TIMBCMP3 HRTIM_OUTPUTSET_TIMEV_4
|
||||
#define HRTIM_OUTPUTRESET_TIMCEV5_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_5
|
||||
#define HRTIM_OUTPUTRESET_TIMCEV6_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_6
|
||||
#define HRTIM_OUTPUTRESET_TIMCEV7_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_7
|
||||
#define HRTIM_OUTPUTRESET_TIMCEV8_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_8
|
||||
#define HRTIM_OUTPUTRESET_TIMCEV9_TIMFCMP2 HRTIM_OUTPUTSET_TIMEV_9
|
||||
#define HRTIM_OUTPUTRESET_TIMDEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1
|
||||
#define HRTIM_OUTPUTRESET_TIMDEV2_TIMACMP4 HRTIM_OUTPUTSET_TIMEV_2
|
||||
#define HRTIM_OUTPUTRESET_TIMDEV3_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_3
|
||||
#define HRTIM_OUTPUTRESET_TIMDEV4_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_4
|
||||
#define HRTIM_OUTPUTRESET_TIMDEV5_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_5
|
||||
#define HRTIM_OUTPUTRESET_TIMDEV6_TIMECMP1 HRTIM_OUTPUTSET_TIMEV_6
|
||||
#define HRTIM_OUTPUTRESET_TIMDEV7_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_7
|
||||
#define HRTIM_OUTPUTRESET_TIMDEV8_TIMFCMP1 HRTIM_OUTPUTSET_TIMEV_8
|
||||
#define HRTIM_OUTPUTRESET_TIMDEV9_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_9
|
||||
#define HRTIM_OUTPUTRESET_TIMEEV1_TIMACMP4 HRTIM_OUTPUTSET_TIMEV_1
|
||||
#define HRTIM_OUTPUTRESET_TIMEEV2_TIMBCMP3 HRTIM_OUTPUTSET_TIMEV_2
|
||||
#define HRTIM_OUTPUTRESET_TIMEEV3_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_3
|
||||
#define HRTIM_OUTPUTRESET_TIMEEV4_TIMCCMP1 HRTIM_OUTPUTSET_TIMEV_4
|
||||
#define HRTIM_OUTPUTRESET_TIMEEV5_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_5
|
||||
#define HRTIM_OUTPUTRESET_TIMEEV6_TIMDCMP1 HRTIM_OUTPUTSET_TIMEV_6
|
||||
#define HRTIM_OUTPUTRESET_TIMEEV7_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_7
|
||||
#define HRTIM_OUTPUTRESET_TIMEEV8_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_8
|
||||
#define HRTIM_OUTPUTRESET_TIMEEV9_TIMFCMP4 HRTIM_OUTPUTSET_TIMEV_9
|
||||
#define HRTIM_OUTPUTRESET_TIMFEV1_TIMACMP3 HRTIM_OUTPUTSET_TIMEV_1
|
||||
#define HRTIM_OUTPUTRESET_TIMFEV2_TIMBCMP1 HRTIM_OUTPUTSET_TIMEV_2
|
||||
#define HRTIM_OUTPUTRESET_TIMFEV3_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_3
|
||||
#define HRTIM_OUTPUTRESET_TIMFEV4_TIMCCMP1 HRTIM_OUTPUTSET_TIMEV_4
|
||||
#define HRTIM_OUTPUTRESET_TIMFEV5_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_5
|
||||
#define HRTIM_OUTPUTRESET_TIMFEV6_TIMDCMP3 HRTIM_OUTPUTSET_TIMEV_6
|
||||
#define HRTIM_OUTPUTRESET_TIMFEV7_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_7
|
||||
#define HRTIM_OUTPUTRESET_TIMFEV8_TIMECMP2 HRTIM_OUTPUTSET_TIMEV_8
|
||||
#define HRTIM_OUTPUTRESET_TIMFEV9_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_9
|
||||
#endif /* STM32H7 */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -738,6 +876,12 @@
|
|||
#define OPAMP_PGACONNECT_VM0 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0
|
||||
#define OPAMP_PGACONNECT_VM1 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO1
|
||||
|
||||
#if defined(STM32L1) || defined(STM32L4)
|
||||
#define HAL_OPAMP_MSP_INIT_CB_ID HAL_OPAMP_MSPINIT_CB_ID
|
||||
#define HAL_OPAMP_MSP_DEINIT_CB_ID HAL_OPAMP_MSPDEINIT_CB_ID
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -746,6 +890,15 @@
|
|||
* @{
|
||||
*/
|
||||
#define I2S_STANDARD_PHILLIPS I2S_STANDARD_PHILIPS
|
||||
|
||||
#if defined(STM32H7)
|
||||
#define I2S_IT_TXE I2S_IT_TXP
|
||||
#define I2S_IT_RXNE I2S_IT_RXP
|
||||
|
||||
#define I2S_FLAG_TXE I2S_FLAG_TXP
|
||||
#define I2S_FLAG_RXNE I2S_FLAG_RXP
|
||||
#endif
|
||||
|
||||
#if defined(STM32F7)
|
||||
#define I2S_CLOCK_SYSCLK I2S_CLOCK_PLL
|
||||
#endif
|
||||
|
@ -870,6 +1023,21 @@
|
|||
#define SPI_NSS_PULSE_DISABLED SPI_NSS_PULSE_DISABLE
|
||||
#define SPI_NSS_PULSE_ENABLED SPI_NSS_PULSE_ENABLE
|
||||
|
||||
#if defined(STM32H7)
|
||||
|
||||
#define SPI_FLAG_TXE SPI_FLAG_TXP
|
||||
#define SPI_FLAG_RXNE SPI_FLAG_RXP
|
||||
|
||||
#define SPI_IT_TXE SPI_IT_TXP
|
||||
#define SPI_IT_RXNE SPI_IT_RXP
|
||||
|
||||
#define SPI_FRLVL_EMPTY SPI_RX_FIFO_0PACKET
|
||||
#define SPI_FRLVL_QUARTER_FULL SPI_RX_FIFO_1PACKET
|
||||
#define SPI_FRLVL_HALF_FULL SPI_RX_FIFO_2PACKET
|
||||
#define SPI_FRLVL_FULL SPI_RX_FIFO_3PACKET
|
||||
|
||||
#endif /* STM32H7 */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -945,6 +1113,25 @@
|
|||
#if defined(STM32F3)
|
||||
#define IS_TIM_HALL_INTERFACE_INSTANCE IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE
|
||||
#endif
|
||||
|
||||
#if defined(STM32H7)
|
||||
#define TIM_TIM1_ETR_COMP1_OUT TIM_TIM1_ETR_COMP1
|
||||
#define TIM_TIM1_ETR_COMP2_OUT TIM_TIM1_ETR_COMP2
|
||||
#define TIM_TIM8_ETR_COMP1_OUT TIM_TIM8_ETR_COMP1
|
||||
#define TIM_TIM8_ETR_COMP2_OUT TIM_TIM8_ETR_COMP2
|
||||
#define TIM_TIM2_ETR_COMP1_OUT TIM_TIM2_ETR_COMP1
|
||||
#define TIM_TIM2_ETR_COMP2_OUT TIM_TIM2_ETR_COMP2
|
||||
#define TIM_TIM3_ETR_COMP1_OUT TIM_TIM3_ETR_COMP1
|
||||
#define TIM_TIM1_TI1_COMP1_OUT TIM_TIM1_TI1_COMP1
|
||||
#define TIM_TIM8_TI1_COMP2_OUT TIM_TIM8_TI1_COMP2
|
||||
#define TIM_TIM2_TI4_COMP1_OUT TIM_TIM2_TI4_COMP1
|
||||
#define TIM_TIM2_TI4_COMP2_OUT TIM_TIM2_TI4_COMP2
|
||||
#define TIM_TIM2_TI4_COMP1COMP2_OUT TIM_TIM2_TI4_COMP1_COMP2
|
||||
#define TIM_TIM3_TI1_COMP1_OUT TIM_TIM3_TI1_COMP1
|
||||
#define TIM_TIM3_TI1_COMP2_OUT TIM_TIM3_TI1_COMP2
|
||||
#define TIM_TIM3_TI1_COMP1COMP2_OUT TIM_TIM3_TI1_COMP1_COMP2
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -1106,7 +1293,8 @@
|
|||
*/
|
||||
|
||||
#if defined(STM32L4) || defined(STM32F7) || defined(STM32F427xx) || defined(STM32F437xx) \
|
||||
|| defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
|
||||
|| defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx) \
|
||||
|| defined(STM32H7)
|
||||
/** @defgroup HAL_DMA2D_Aliased_Defines HAL DMA2D Aliased Defines maintained for legacy purpose
|
||||
* @{
|
||||
*/
|
||||
|
@ -1130,7 +1318,7 @@
|
|||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* STM32L4 || STM32F7*/
|
||||
#endif /* STM32L4 || STM32F7 || STM32F4 || STM32H7 */
|
||||
|
||||
/** @defgroup HAL_PPP_Aliased_Defines HAL PPP Aliased Defines maintained for legacy purpose
|
||||
* @{
|
||||
|
@ -1194,6 +1382,7 @@
|
|||
#endif
|
||||
#define HAL_ADC_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINT() : HAL_ADCEx_DisableVREFINT())
|
||||
#define HAL_ADC_EnableBufferSensor_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINTTempSensor() : HAL_ADCEx_DisableVREFINTTempSensor())
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -1222,6 +1411,30 @@
|
|||
#define HAL_FMPI2CEx_DigitalFilter_Config HAL_FMPI2CEx_ConfigDigitalFilter
|
||||
|
||||
#define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd)==ENABLE)? HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus))
|
||||
|
||||
#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4)
|
||||
#define HAL_I2C_Master_Sequential_Transmit_IT HAL_I2C_Master_Seq_Transmit_IT
|
||||
#define HAL_I2C_Master_Sequential_Receive_IT HAL_I2C_Master_Seq_Receive_IT
|
||||
#define HAL_I2C_Slave_Sequential_Transmit_IT HAL_I2C_Slave_Seq_Transmit_IT
|
||||
#define HAL_I2C_Slave_Sequential_Receive_IT HAL_I2C_Slave_Seq_Receive_IT
|
||||
#endif /* STM32H7 || STM32WB || STM32G0 || STM32F0 || STM32F1 || STM32F2 || STM32F3 || STM32F4 || STM32F7 || STM32L0 || STM32L4 || STM32L5 || STM32G4 */
|
||||
#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4)
|
||||
#define HAL_I2C_Master_Sequential_Transmit_DMA HAL_I2C_Master_Seq_Transmit_DMA
|
||||
#define HAL_I2C_Master_Sequential_Receive_DMA HAL_I2C_Master_Seq_Receive_DMA
|
||||
#define HAL_I2C_Slave_Sequential_Transmit_DMA HAL_I2C_Slave_Seq_Transmit_DMA
|
||||
#define HAL_I2C_Slave_Sequential_Receive_DMA HAL_I2C_Slave_Seq_Receive_DMA
|
||||
#endif /* STM32H7 || STM32WB || STM32G0 || STM32F4 || STM32F7 || STM32L0 || STM32L4 || STM32L5 || STM32G4 */
|
||||
|
||||
#if defined(STM32F4)
|
||||
#define HAL_FMPI2C_Master_Sequential_Transmit_IT HAL_FMPI2C_Master_Seq_Transmit_IT
|
||||
#define HAL_FMPI2C_Master_Sequential_Receive_IT HAL_FMPI2C_Master_Seq_Receive_IT
|
||||
#define HAL_FMPI2C_Slave_Sequential_Transmit_IT HAL_FMPI2C_Slave_Seq_Transmit_IT
|
||||
#define HAL_FMPI2C_Slave_Sequential_Receive_IT HAL_FMPI2C_Slave_Seq_Receive_IT
|
||||
#define HAL_FMPI2C_Master_Sequential_Transmit_DMA HAL_FMPI2C_Master_Seq_Transmit_DMA
|
||||
#define HAL_FMPI2C_Master_Sequential_Receive_DMA HAL_FMPI2C_Master_Seq_Receive_DMA
|
||||
#define HAL_FMPI2C_Slave_Sequential_Transmit_DMA HAL_FMPI2C_Slave_Seq_Transmit_DMA
|
||||
#define HAL_FMPI2C_Slave_Sequential_Receive_DMA HAL_FMPI2C_Slave_Seq_Receive_DMA
|
||||
#endif /* STM32F4 */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -1301,6 +1514,14 @@
|
|||
#define HAL_TIM_DMAError TIM_DMAError
|
||||
#define HAL_TIM_DMACaptureCplt TIM_DMACaptureCplt
|
||||
#define HAL_TIMEx_DMACommutationCplt TIMEx_DMACommutationCplt
|
||||
#if defined(STM32H7) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4)
|
||||
#define HAL_TIM_SlaveConfigSynchronization HAL_TIM_SlaveConfigSynchro
|
||||
#define HAL_TIM_SlaveConfigSynchronization_IT HAL_TIM_SlaveConfigSynchro_IT
|
||||
#define HAL_TIMEx_CommutationCallback HAL_TIMEx_CommutCallback
|
||||
#define HAL_TIMEx_ConfigCommutationEvent HAL_TIMEx_ConfigCommutEvent
|
||||
#define HAL_TIMEx_ConfigCommutationEvent_IT HAL_TIMEx_ConfigCommutEvent_IT
|
||||
#define HAL_TIMEx_ConfigCommutationEvent_DMA HAL_TIMEx_ConfigCommutEvent_DMA
|
||||
#endif /* STM32H7 || STM32G0 || STM32F0 || STM32F1 || STM32F2 || STM32F3 || STM32F4 || STM32F7 || STM32L0 */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -1514,10 +1735,17 @@
|
|||
#define __HAL_UNFREEZE_TIM17_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM17
|
||||
#define __HAL_FREEZE_RTC_DBGMCU __HAL_DBGMCU_FREEZE_RTC
|
||||
#define __HAL_UNFREEZE_RTC_DBGMCU __HAL_DBGMCU_UNFREEZE_RTC
|
||||
#define __HAL_FREEZE_WWDG_DBGMCU __HAL_DBGMCU_FREEZE_WWDG
|
||||
#define __HAL_UNFREEZE_WWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_WWDG
|
||||
#define __HAL_FREEZE_IWDG_DBGMCU __HAL_DBGMCU_FREEZE_IWDG
|
||||
#define __HAL_UNFREEZE_IWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_IWDG
|
||||
#if defined(STM32H7)
|
||||
#define __HAL_FREEZE_WWDG_DBGMCU __HAL_DBGMCU_FREEZE_WWDG1
|
||||
#define __HAL_UNFREEZE_WWDG_DBGMCU __HAL_DBGMCU_UnFreeze_WWDG1
|
||||
#define __HAL_FREEZE_IWDG_DBGMCU __HAL_DBGMCU_FREEZE_IWDG1
|
||||
#define __HAL_UNFREEZE_IWDG_DBGMCU __HAL_DBGMCU_UnFreeze_IWDG1
|
||||
#else
|
||||
#define __HAL_FREEZE_WWDG_DBGMCU __HAL_DBGMCU_FREEZE_WWDG
|
||||
#define __HAL_UNFREEZE_WWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_WWDG
|
||||
#define __HAL_FREEZE_IWDG_DBGMCU __HAL_DBGMCU_FREEZE_IWDG
|
||||
#define __HAL_UNFREEZE_IWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_IWDG
|
||||
#endif /* STM32H7 */
|
||||
#define __HAL_FREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT
|
||||
#define __HAL_UNFREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT
|
||||
#define __HAL_FREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT
|
||||
|
@ -1783,6 +2011,10 @@
|
|||
#define IS_I2S_INSTANCE IS_I2S_ALL_INSTANCE
|
||||
#define IS_I2S_INSTANCE_EXT IS_I2S_ALL_INSTANCE_EXT
|
||||
|
||||
#if defined(STM32H7)
|
||||
#define __HAL_I2S_CLEAR_FREFLAG __HAL_I2S_CLEAR_TIFREFLAG
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -2408,12 +2640,28 @@
|
|||
#define __USB_OTG_FS_CLK_DISABLE __HAL_RCC_USB_OTG_FS_CLK_DISABLE
|
||||
#define __USB_OTG_FS_CLK_ENABLE __HAL_RCC_USB_OTG_FS_CLK_ENABLE
|
||||
#define __USB_RELEASE_RESET __HAL_RCC_USB_RELEASE_RESET
|
||||
|
||||
#if defined(STM32H7)
|
||||
#define __HAL_RCC_WWDG_CLK_DISABLE __HAL_RCC_WWDG1_CLK_DISABLE
|
||||
#define __HAL_RCC_WWDG_CLK_ENABLE __HAL_RCC_WWDG1_CLK_ENABLE
|
||||
#define __HAL_RCC_WWDG_CLK_SLEEP_DISABLE __HAL_RCC_WWDG1_CLK_SLEEP_DISABLE
|
||||
#define __HAL_RCC_WWDG_CLK_SLEEP_ENABLE __HAL_RCC_WWDG1_CLK_SLEEP_ENABLE
|
||||
|
||||
#define __HAL_RCC_WWDG_FORCE_RESET ((void)0U) /* Not available on the STM32H7*/
|
||||
#define __HAL_RCC_WWDG_RELEASE_RESET ((void)0U) /* Not available on the STM32H7*/
|
||||
|
||||
|
||||
#define __HAL_RCC_WWDG_IS_CLK_ENABLED __HAL_RCC_WWDG1_IS_CLK_ENABLED
|
||||
#define __HAL_RCC_WWDG_IS_CLK_DISABLED __HAL_RCC_WWDG1_IS_CLK_DISABLED
|
||||
#endif
|
||||
|
||||
#define __WWDG_CLK_DISABLE __HAL_RCC_WWDG_CLK_DISABLE
|
||||
#define __WWDG_CLK_ENABLE __HAL_RCC_WWDG_CLK_ENABLE
|
||||
#define __WWDG_CLK_SLEEP_DISABLE __HAL_RCC_WWDG_CLK_SLEEP_DISABLE
|
||||
#define __WWDG_CLK_SLEEP_ENABLE __HAL_RCC_WWDG_CLK_SLEEP_ENABLE
|
||||
#define __WWDG_FORCE_RESET __HAL_RCC_WWDG_FORCE_RESET
|
||||
#define __WWDG_RELEASE_RESET __HAL_RCC_WWDG_RELEASE_RESET
|
||||
|
||||
#define __TIM21_CLK_ENABLE __HAL_RCC_TIM21_CLK_ENABLE
|
||||
#define __TIM21_CLK_DISABLE __HAL_RCC_TIM21_CLK_DISABLE
|
||||
#define __TIM21_FORCE_RESET __HAL_RCC_TIM21_FORCE_RESET
|
||||
|
@ -2746,6 +2994,15 @@
|
|||
#define __WWDG_IS_CLK_ENABLED __HAL_RCC_WWDG_IS_CLK_ENABLED
|
||||
#define __WWDG_IS_CLK_DISABLED __HAL_RCC_WWDG_IS_CLK_DISABLED
|
||||
|
||||
#if defined(STM32L1)
|
||||
#define __HAL_RCC_CRYP_CLK_DISABLE __HAL_RCC_AES_CLK_DISABLE
|
||||
#define __HAL_RCC_CRYP_CLK_ENABLE __HAL_RCC_AES_CLK_ENABLE
|
||||
#define __HAL_RCC_CRYP_CLK_SLEEP_DISABLE __HAL_RCC_AES_CLK_SLEEP_DISABLE
|
||||
#define __HAL_RCC_CRYP_CLK_SLEEP_ENABLE __HAL_RCC_AES_CLK_SLEEP_ENABLE
|
||||
#define __HAL_RCC_CRYP_FORCE_RESET __HAL_RCC_AES_FORCE_RESET
|
||||
#define __HAL_RCC_CRYP_RELEASE_RESET __HAL_RCC_AES_RELEASE_RESET
|
||||
#endif /* STM32L1 */
|
||||
|
||||
#if defined(STM32F4)
|
||||
#define __HAL_RCC_SDMMC1_FORCE_RESET __HAL_RCC_SDIO_FORCE_RESET
|
||||
#define __HAL_RCC_SDMMC1_RELEASE_RESET __HAL_RCC_SDIO_RELEASE_RESET
|
||||
|
@ -2990,7 +3247,7 @@
|
|||
/** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose
|
||||
* @{
|
||||
*/
|
||||
#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || defined (STM32WL)
|
||||
#if defined (STM32G0) || defined (STM32L412xx) || defined (STM32L422xx) || defined (STM32G4)
|
||||
#else
|
||||
#define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG
|
||||
#endif
|
||||
|
@ -3106,7 +3363,7 @@
|
|||
#define SDIO_IRQHandler SDMMC1_IRQHandler
|
||||
#endif
|
||||
|
||||
#if defined(STM32F7) || defined(STM32F4) || defined(STM32F2)
|
||||
#if defined(STM32F7) || defined(STM32F4) || defined(STM32F2) || defined(STM32L4) || defined(STM32H7)
|
||||
#define HAL_SD_CardCIDTypedef HAL_SD_CardCIDTypeDef
|
||||
#define HAL_SD_CardCSDTypedef HAL_SD_CardCSDTypeDef
|
||||
#define HAL_SD_CardStatusTypedef HAL_SD_CardStatusTypeDef
|
||||
|
@ -3312,10 +3569,7 @@
|
|||
* @{
|
||||
*/
|
||||
#define __HAL_LTDC_LAYER LTDC_LAYER
|
||||
#if defined(STM32F7)
|
||||
#else
|
||||
#define __HAL_LTDC_RELOAD_CONFIG __HAL_LTDC_RELOAD_IMMEDIATE_CONFIG
|
||||
#endif
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -3353,6 +3607,31 @@
|
|||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_HRTIM_Aliased_Functions HAL HRTIM Aliased Functions maintained for legacy purpose
|
||||
* @{
|
||||
*/
|
||||
#if defined (STM32H7) || defined (STM32G4) || defined (STM32F3)
|
||||
#define HAL_HRTIM_WaveformCounterStart_IT HAL_HRTIM_WaveformCountStart_IT
|
||||
#define HAL_HRTIM_WaveformCounterStart_DMA HAL_HRTIM_WaveformCountStart_DMA
|
||||
#define HAL_HRTIM_WaveformCounterStart HAL_HRTIM_WaveformCountStart
|
||||
#define HAL_HRTIM_WaveformCounterStop_IT HAL_HRTIM_WaveformCountStop_IT
|
||||
#define HAL_HRTIM_WaveformCounterStop_DMA HAL_HRTIM_WaveformCountStop_DMA
|
||||
#define HAL_HRTIM_WaveformCounterStop HAL_HRTIM_WaveformCountStop
|
||||
#endif
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_QSPI_Aliased_Macros HAL QSPI Aliased Macros maintained for legacy purpose
|
||||
* @{
|
||||
*/
|
||||
#if defined (STM32L4)
|
||||
#define HAL_QPSI_TIMEOUT_DEFAULT_VALUE HAL_QSPI_TIMEOUT_DEFAULT_VALUE
|
||||
#endif
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_PPP_Aliased_Macros HAL PPP Aliased Macros maintained for legacy purpose
|
||||
* @{
|
||||
*/
|
||||
|
|
|
@ -1,41 +1,25 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f3xx_hal_can.h
|
||||
* @file stm32f3xx_hal_can_legacy.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of CAN HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_CAN_H
|
||||
#define __STM32F3xx_CAN_H
|
||||
#ifndef __STM32F3xx_HAL_CAN_LEGACY_H
|
||||
#define __STM32F3xx_HAL_CAN_LEGACY_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
@ -813,7 +797,7 @@ HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef* hcan);
|
|||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F3xx_CAN_H */
|
||||
#endif /* __STM32F3xx_HAL_CAN_LEGACY_H */
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
|
@ -8,29 +8,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
@ -56,9 +40,9 @@
|
|||
* If expr is true, it returns no value.
|
||||
* @retval None
|
||||
*/
|
||||
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((char *)__FILE__, __LINE__))
|
||||
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void assert_failed(char* file, uint32_t line);
|
||||
void assert_failed(uint8_t* file, uint32_t line);
|
||||
#else
|
||||
#define assert_param(expr) ((void)0U)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
|
|
@ -7,29 +7,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
|
|
@ -6,29 +6,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
@ -128,7 +112,39 @@ typedef struct __ADC_HandleTypeDef
|
|||
/* STM32F303x8 || STM32F334x8 || STM32F328xx || */
|
||||
/* STM32F301x8 || STM32F302x8 || STM32F318xx */
|
||||
|
||||
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
|
||||
void (* ConvCpltCallback)(struct __ADC_HandleTypeDef *hadc); /*!< ADC conversion complete callback */
|
||||
void (* ConvHalfCpltCallback)(struct __ADC_HandleTypeDef *hadc); /*!< ADC conversion DMA half-transfer callback */
|
||||
void (* LevelOutOfWindowCallback)(struct __ADC_HandleTypeDef *hadc); /*!< ADC analog watchdog 1 callback */
|
||||
void (* ErrorCallback)(struct __ADC_HandleTypeDef *hadc); /*!< ADC error callback */
|
||||
void (* InjectedConvCpltCallback)(struct __ADC_HandleTypeDef *hadc); /*!< ADC group injected conversion complete callback */ /*!< ADC end of sampling callback */
|
||||
void (* MspInitCallback)(struct __ADC_HandleTypeDef *hadc); /*!< ADC Msp Init callback */
|
||||
void (* MspDeInitCallback)(struct __ADC_HandleTypeDef *hadc); /*!< ADC Msp DeInit callback */
|
||||
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
|
||||
}ADC_HandleTypeDef;
|
||||
|
||||
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
|
||||
/**
|
||||
* @brief HAL ADC Callback ID enumeration definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_ADC_CONVERSION_COMPLETE_CB_ID = 0x00U, /*!< ADC conversion complete callback ID */
|
||||
HAL_ADC_CONVERSION_HALF_CB_ID = 0x01U, /*!< ADC conversion DMA half-transfer callback ID */
|
||||
HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID = 0x02U, /*!< ADC analog watchdog 1 callback ID */
|
||||
HAL_ADC_ERROR_CB_ID = 0x03U, /*!< ADC error callback ID */
|
||||
HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID = 0x04U, /*!< ADC group injected conversion complete callback ID */
|
||||
HAL_ADC_MSPINIT_CB_ID = 0x09U, /*!< ADC Msp Init callback ID */
|
||||
HAL_ADC_MSPDEINIT_CB_ID = 0x0AU /*!< ADC Msp DeInit callback ID */
|
||||
} HAL_ADC_CallbackIDTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL ADC Callback pointer definition
|
||||
*/
|
||||
typedef void (*pADC_CallbackTypeDef)(ADC_HandleTypeDef *hadc); /*!< pointer to a ADC callback function */
|
||||
|
||||
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -143,7 +159,17 @@ typedef struct __ADC_HandleTypeDef
|
|||
* @param __HANDLE__ ADC handle
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_ADC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_ADC_STATE_RESET)
|
||||
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
|
||||
#define __HAL_ADC_RESET_HANDLE_STATE(__HANDLE__) \
|
||||
do{ \
|
||||
(__HANDLE__)->State = HAL_ADC_STATE_RESET; \
|
||||
(__HANDLE__)->MspInitCallback = NULL; \
|
||||
(__HANDLE__)->MspDeInitCallback = NULL; \
|
||||
} while(0)
|
||||
#else
|
||||
#define __HAL_ADC_RESET_HANDLE_STATE(__HANDLE__) \
|
||||
((__HANDLE__)->State = HAL_ADC_STATE_RESET)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
@ -164,6 +190,12 @@ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc);
|
|||
HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef *hadc);
|
||||
void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc);
|
||||
void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc);
|
||||
|
||||
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
|
||||
/* Callbacks Register/UnRegister functions ***********************************/
|
||||
HAL_StatusTypeDef HAL_ADC_RegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef CallbackID, pADC_CallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_ADC_UnRegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef CallbackID);
|
||||
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
|
|
@ -6,29 +6,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
@ -78,68 +62,68 @@ struct __ADC_HandleTypeDef;
|
|||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t ClockPrescaler; /*!< Select ADC clock source (synchronous clock derived from AHB clock or asynchronous clock derived from ADC dedicated PLL 72MHz) and clock prescaler.
|
||||
The clock is common for all the ADCs.
|
||||
This parameter can be a value of @ref ADCEx_ClockPrescaler
|
||||
Note: In case of usage of channels on injected group, ADC frequency should be lower than AHB clock frequency /4 for resolution 12 or 10 bits,
|
||||
AHB clock frequency /3 for resolution 8 bits, AHB clock frequency /2 for resolution 6 bits.
|
||||
Note: In case of usage of the ADC dedicated PLL clock, this clock must be preliminarily enabled and prescaler set at RCC top level.
|
||||
Note: This parameter can be modified only if all ADCs of the common ADC group are disabled (for products with several ADCs) */
|
||||
uint32_t Resolution; /*!< Configures the ADC resolution.
|
||||
This parameter can be a value of @ref ADCEx_Resolution */
|
||||
uint32_t DataAlign; /*!< Specifies ADC data alignment to right (for resolution 12 bits: MSB on register bit 11 and LSB on register bit 0U) (default setting)
|
||||
or to left (for resolution 12 bits, if offset disabled: MSB on register bit 15 and LSB on register bit 4U, if offset enabled: MSB on register bit 14 and LSB on register bit 3U).
|
||||
See reference manual for alignments with other resolutions.
|
||||
This parameter can be a value of @ref ADCEx_Data_align */
|
||||
uint32_t ScanConvMode; /*!< Configures the sequencer of regular and injected groups.
|
||||
This parameter can be associated to parameter 'DiscontinuousConvMode' to have main sequence subdivided in successive parts.
|
||||
If disabled: Conversion is performed in single mode (one channel converted, the one defined in rank 1U).
|
||||
Parameters 'NbrOfConversion' and 'InjectedNbrOfConversion' are discarded (equivalent to set to 1U).
|
||||
If enabled: Conversions are performed in sequence mode (multiple ranks defined by 'NbrOfConversion'/'InjectedNbrOfConversion' and each channel rank).
|
||||
Scan direction is upward: from rank1 to rank 'n'.
|
||||
This parameter can be a value of @ref ADCEx_Scan_mode */
|
||||
uint32_t EOCSelection; /*!< Specifies what EOC (End Of Conversion) flag is used for conversion by polling and interruption: end of conversion of each rank or complete sequence.
|
||||
This parameter can be a value of @ref ADCEx_EOCSelection. */
|
||||
uint32_t LowPowerAutoWait; /*!< Selects the dynamic low power Auto Delay: ADC conversions are performed only when necessary.
|
||||
New conversion starts only when the previous conversion (for regular group) or previous sequence (for injected group) has been treated by user software.
|
||||
This feature automatically adapts the speed of ADC to the speed of the system that reads the data. Moreover, this avoids risk of overrun for low frequency applications.
|
||||
This parameter can be set to ENABLE or DISABLE.
|
||||
Note: Do not use with interruption or DMA (HAL_ADC_Start_IT(), HAL_ADC_Start_DMA()) since they have to clear immediately the EOC flag to free the IRQ vector sequencer.
|
||||
Do use with polling: 1. Start conversion with HAL_ADC_Start(), 2. Later on, when conversion data is needed: use HAL_ADC_PollForConversion() to ensure that conversion is completed
|
||||
and use HAL_ADC_GetValue() to retrieve conversion result and trig another conversion (in case of usage of injected group, use the equivalent functions HAL_ADCExInjected_Start(), HAL_ADCEx_InjectedGetValue(), ...). */
|
||||
uint32_t ContinuousConvMode; /*!< Specifies whether the conversion is performed in single mode (one conversion) or continuous mode for regular group,
|
||||
after the selected trigger occurred (software start or external trigger).
|
||||
This parameter can be set to ENABLE or DISABLE. */
|
||||
uint32_t NbrOfConversion; /*!< Specifies the number of ranks that will be converted within the regular group sequencer.
|
||||
To use the regular group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled.
|
||||
This parameter must be a number between Min_Data = 1 and Max_Data = 16.
|
||||
Note: This parameter must be modified when no conversion is on going on regular group (ADC disabled, or ADC enabled without continuous mode or external trigger that could launch a conversion). */
|
||||
uint32_t DiscontinuousConvMode; /*!< Specifies whether the conversions sequence of regular group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts).
|
||||
Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
|
||||
Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded.
|
||||
This parameter can be set to ENABLE or DISABLE. */
|
||||
uint32_t NbrOfDiscConversion; /*!< Specifies the number of discontinuous conversions in which the main sequence of regular group (parameter NbrOfConversion) will be subdivided.
|
||||
If parameter 'DiscontinuousConvMode' is disabled, this parameter is discarded.
|
||||
This parameter must be a number between Min_Data = 1 and Max_Data = 8. */
|
||||
uint32_t ExternalTrigConv; /*!< Selects the external event used to trigger the conversion start of regular group.
|
||||
If set to ADC_SOFTWARE_START, external triggers are disabled.
|
||||
This parameter can be a value of @ref ADCEx_External_trigger_source_Regular
|
||||
Caution: For devices with several ADCs, external trigger source is common to ADC common group (for example: ADC1&ADC2, ADC3&ADC4, if available) */
|
||||
uint32_t ExternalTrigConvEdge; /*!< Selects the external trigger edge of regular group.
|
||||
If trigger is set to ADC_SOFTWARE_START, this parameter is discarded.
|
||||
This parameter can be a value of @ref ADCEx_External_trigger_edge_Regular */
|
||||
uint32_t DMAContinuousRequests; /*!< Specifies whether the DMA requests are performed in one shot mode (DMA transfer stop when number of conversions is reached)
|
||||
or in Continuous mode (DMA transfer unlimited, whatever number of conversions).
|
||||
Note: In continuous mode, DMA must be configured in circular mode. Otherwise an overrun will be triggered when DMA buffer maximum pointer is reached.
|
||||
This parameter can be set to ENABLE or DISABLE.
|
||||
Note: This parameter must be modified when no conversion is on going on both regular and injected groups (ADC disabled, or ADC enabled without continuous mode or external trigger that could launch a conversion). */
|
||||
uint32_t Overrun; /*!< Select the behaviour in case of overrun: data overwritten (default) or preserved.
|
||||
This parameter is for regular group only.
|
||||
This parameter can be a value of @ref ADCEx_Overrun
|
||||
Note: Case of overrun set to data preserved and usage with end on conversion interruption (HAL_Start_IT()): ADC IRQ handler has to clear end of conversion flags, this induces the release of the preserved data. If needed, this data can be saved into function HAL_ADC_ConvCpltCallback() (called before end of conversion flags clear).
|
||||
Note: Error reporting in function of conversion mode:
|
||||
- Usage with ADC conversion by polling for event or interruption: Error is reported only if overrun is set to data preserved. If overrun is set to data overwritten, user can willingly not read the conversion data each time, this is not considered as an erroneous case.
|
||||
- Usage with ADC conversion by DMA: Error is reported whatever overrun setting (DMA is expected to process all data from data register, any data missed would be abnormal). */
|
||||
uint32_t ClockPrescaler; /*!< Select ADC clock source (synchronous clock derived from AHB clock or asynchronous clock derived from ADC dedicated PLL 72MHz) and clock prescaler.
|
||||
The clock is common for all the ADCs.
|
||||
This parameter can be a value of @ref ADCEx_ClockPrescaler
|
||||
Note: In case of usage of channels on injected group, ADC frequency should be lower than AHB clock frequency /4 for resolution 12 or 10 bits,
|
||||
AHB clock frequency /3 for resolution 8 bits, AHB clock frequency /2 for resolution 6 bits.
|
||||
Note: In case of usage of the ADC dedicated PLL clock, this clock must be preliminarily enabled and prescaler set at RCC top level.
|
||||
Note: This parameter can be modified only if all ADCs of the common ADC group are disabled (for products with several ADCs) */
|
||||
uint32_t Resolution; /*!< Configures the ADC resolution.
|
||||
This parameter can be a value of @ref ADCEx_Resolution */
|
||||
uint32_t DataAlign; /*!< Specifies ADC data alignment to right (for resolution 12 bits: MSB on register bit 11 and LSB on register bit 0U) (default setting)
|
||||
or to left (for resolution 12 bits, if offset disabled: MSB on register bit 15 and LSB on register bit 4U, if offset enabled: MSB on register bit 14 and LSB on register bit 3U).
|
||||
See reference manual for alignments with other resolutions.
|
||||
This parameter can be a value of @ref ADCEx_Data_align */
|
||||
uint32_t ScanConvMode; /*!< Configures the sequencer of regular and injected groups.
|
||||
This parameter can be associated to parameter 'DiscontinuousConvMode' to have main sequence subdivided in successive parts.
|
||||
If disabled: Conversion is performed in single mode (one channel converted, the one defined in rank 1U).
|
||||
Parameters 'NbrOfConversion' and 'InjectedNbrOfConversion' are discarded (equivalent to set to 1U).
|
||||
If enabled: Conversions are performed in sequence mode (multiple ranks defined by 'NbrOfConversion'/'InjectedNbrOfConversion' and each channel rank).
|
||||
Scan direction is upward: from rank1 to rank 'n'.
|
||||
This parameter can be a value of @ref ADCEx_Scan_mode */
|
||||
uint32_t EOCSelection; /*!< Specifies what EOC (End Of Conversion) flag is used for conversion by polling and interruption: end of conversion of each rank or complete sequence.
|
||||
This parameter can be a value of @ref ADCEx_EOCSelection. */
|
||||
FunctionalState LowPowerAutoWait; /*!< Selects the dynamic low power Auto Delay: ADC conversions are performed only when necessary.
|
||||
New conversion starts only when the previous conversion (for regular group) or previous sequence (for injected group) has been treated by user software.
|
||||
This feature automatically adapts the speed of ADC to the speed of the system that reads the data. Moreover, this avoids risk of overrun for low frequency applications.
|
||||
This parameter can be set to ENABLE or DISABLE.
|
||||
Note: Do not use with interruption or DMA (HAL_ADC_Start_IT(), HAL_ADC_Start_DMA()) since they have to clear immediately the EOC flag to free the IRQ vector sequencer.
|
||||
Do use with polling: 1. Start conversion with HAL_ADC_Start(), 2. Later on, when conversion data is needed: use HAL_ADC_PollForConversion() to ensure that conversion is completed
|
||||
and use HAL_ADC_GetValue() to retrieve conversion result and trig another conversion (in case of usage of injected group, use the equivalent functions HAL_ADCExInjected_Start(), HAL_ADCEx_InjectedGetValue(), ...). */
|
||||
FunctionalState ContinuousConvMode; /*!< Specifies whether the conversion is performed in single mode (one conversion) or continuous mode for regular group,
|
||||
after the selected trigger occurred (software start or external trigger).
|
||||
This parameter can be set to ENABLE or DISABLE. */
|
||||
uint32_t NbrOfConversion; /*!< Specifies the number of ranks that will be converted within the regular group sequencer.
|
||||
To use the regular group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled.
|
||||
This parameter must be a number between Min_Data = 1 and Max_Data = 16.
|
||||
Note: This parameter must be modified when no conversion is on going on regular group (ADC disabled, or ADC enabled without continuous mode or external trigger that could launch a conversion). */
|
||||
FunctionalState DiscontinuousConvMode; /*!< Specifies whether the conversions sequence of regular group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts).
|
||||
Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
|
||||
Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded.
|
||||
This parameter can be set to ENABLE or DISABLE. */
|
||||
uint32_t NbrOfDiscConversion; /*!< Specifies the number of discontinuous conversions in which the main sequence of regular group (parameter NbrOfConversion) will be subdivided.
|
||||
If parameter 'DiscontinuousConvMode' is disabled, this parameter is discarded.
|
||||
This parameter must be a number between Min_Data = 1 and Max_Data = 8. */
|
||||
uint32_t ExternalTrigConv; /*!< Selects the external event used to trigger the conversion start of regular group.
|
||||
If set to ADC_SOFTWARE_START, external triggers are disabled.
|
||||
This parameter can be a value of @ref ADCEx_External_trigger_source_Regular
|
||||
Caution: For devices with several ADCs, external trigger source is common to ADC common group (for example: ADC1&ADC2, ADC3&ADC4, if available) */
|
||||
uint32_t ExternalTrigConvEdge; /*!< Selects the external trigger edge of regular group.
|
||||
If trigger is set to ADC_SOFTWARE_START, this parameter is discarded.
|
||||
This parameter can be a value of @ref ADCEx_External_trigger_edge_Regular */
|
||||
FunctionalState DMAContinuousRequests; /*!< Specifies whether the DMA requests are performed in one shot mode (DMA transfer stop when number of conversions is reached)
|
||||
or in Continuous mode (DMA transfer unlimited, whatever number of conversions).
|
||||
Note: In continuous mode, DMA must be configured in circular mode. Otherwise an overrun will be triggered when DMA buffer maximum pointer is reached.
|
||||
This parameter can be set to ENABLE or DISABLE.
|
||||
Note: This parameter must be modified when no conversion is on going on both regular and injected groups (ADC disabled, or ADC enabled without continuous mode or external trigger that could launch a conversion). */
|
||||
uint32_t Overrun; /*!< Select the behaviour in case of overrun: data overwritten (default) or preserved.
|
||||
This parameter is for regular group only.
|
||||
This parameter can be a value of @ref ADCEx_Overrun
|
||||
Note: Case of overrun set to data preserved and usage with end on conversion interruption (HAL_Start_IT()): ADC IRQ handler has to clear end of conversion flags, this induces the release of the preserved data. If needed, this data can be saved into function HAL_ADC_ConvCpltCallback() (called before end of conversion flags clear).
|
||||
Note: Error reporting in function of conversion mode:
|
||||
- Usage with ADC conversion by polling for event or interruption: Error is reported only if overrun is set to data preserved. If overrun is set to data overwritten, user can willingly not read the conversion data each time, this is not considered as an erroneous case.
|
||||
- Usage with ADC conversion by DMA: Error is reported whatever overrun setting (DMA is expected to process all data from data register, any data missed would be abnormal). */
|
||||
}ADC_InitTypeDef;
|
||||
|
||||
/**
|
||||
|
@ -205,78 +189,78 @@ typedef struct
|
|||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t InjectedChannel; /*!< Configure the ADC injected channel
|
||||
This parameter can be a value of @ref ADCEx_channels
|
||||
Note: Depending on devices, some channels may not be available on package pins. Refer to device datasheet for channels availability. */
|
||||
uint32_t InjectedRank; /*!< The rank in the regular group sequencer
|
||||
This parameter must be a value of @ref ADCEx_injected_rank
|
||||
Note: In case of need to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by the new channel setting (or parameter number of conversions can be adjusted) */
|
||||
uint32_t InjectedSamplingTime; /*!< Sampling time value to be set for the selected channel.
|
||||
Unit: ADC clock cycles
|
||||
Conversion time is the addition of sampling time and processing time (12.5 ADC clock cycles at ADC resolution 12 bits, 10.5 cycles at 10 bits, 8.5 cycles at 8 bits, 6.5 cycles at 6 bits).
|
||||
This parameter can be a value of @ref ADCEx_sampling_times
|
||||
Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups.
|
||||
If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting.
|
||||
Note: In case of usage of internal measurement channels (VrefInt/Vbat/TempSensor),
|
||||
sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting)
|
||||
Refer to device datasheet for timings values, parameters TS_vrefint, TS_vbat, TS_temp (values rough order: 2.2us min). */
|
||||
uint32_t InjectedSingleDiff; /*!< Selection of single-ended or differential input.
|
||||
In differential mode: Differential measurement is between the selected channel 'i' (positive input) and channel 'i+1' (negative input).
|
||||
Only channel 'i' has to be configured, channel 'i+1' is configured automatically.
|
||||
This parameter must be a value of @ref ADCEx_SingleDifferential
|
||||
Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups.
|
||||
If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting.
|
||||
Note: Channels 1 to 14 are available in differential mode. Channels 15U, 16U, 17U, 18 can be used only in single-ended mode.
|
||||
Note: When configuring a channel 'i' in differential mode, the channel 'i-1' is not usable separately.
|
||||
Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion).
|
||||
If ADC is enabled, this parameter setting is bypassed without error reporting (as it can be the expected behaviour in case of another parameter update on the fly) */
|
||||
uint32_t InjectedOffsetNumber; /*!< Selects the offset number
|
||||
This parameter can be a value of @ref ADCEx_OffsetNumber
|
||||
Caution: Only one channel is allowed per offset number. If another channel was on this offset number, the offset will be changed to the new channel. */
|
||||
uint32_t InjectedOffset; /*!< Defines the offset to be subtracted from the raw converted data.
|
||||
Offset value must be a positive number.
|
||||
Depending of ADC resolution selected (12U, 10U, 8 or 6 bits),
|
||||
this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFFU, 0x3FFU, 0xFF or 0x3F respectively. */
|
||||
uint32_t InjectedNbrOfConversion; /*!< Specifies the number of ranks that will be converted within the injected group sequencer.
|
||||
To use the injected group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled.
|
||||
This parameter must be a number between Min_Data = 1 and Max_Data = 4.
|
||||
Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
|
||||
configure a channel on injected group can impact the configuration of other channels previously set. */
|
||||
uint32_t InjectedDiscontinuousConvMode; /*!< Specifies whether the conversions sequence of injected group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts).
|
||||
Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
|
||||
Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded.
|
||||
This parameter can be set to ENABLE or DISABLE.
|
||||
Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion).
|
||||
Note: For injected group, number of discontinuous ranks increment is fixed to one-by-one.
|
||||
Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
|
||||
configure a channel on injected group can impact the configuration of other channels previously set. */
|
||||
uint32_t AutoInjectedConv; /*!< Enables or disables the selected ADC automatic injected group conversion after regular one
|
||||
This parameter can be set to ENABLE or DISABLE.
|
||||
Note: To use Automatic injected conversion, discontinuous mode must be disabled ('DiscontinuousConvMode' and 'InjectedDiscontinuousConvMode' set to DISABLE)
|
||||
Note: To use Automatic injected conversion, injected group external triggers must be disabled ('ExternalTrigInjecConv' set to ADC_SOFTWARE_START)
|
||||
Note: In case of DMA used with regular group: if DMA configured in normal mode (single shot) JAUTO will be stopped upon DMA transfer complete.
|
||||
To maintain JAUTO always enabled, DMA must be configured in circular mode.
|
||||
Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
|
||||
configure a channel on injected group can impact the configuration of other channels previously set. */
|
||||
uint32_t QueueInjectedContext; /*!< Specifies whether the context queue feature is enabled.
|
||||
This parameter can be set to ENABLE or DISABLE.
|
||||
If context queue is enabled, injected sequencer&channels configurations are queued on up to 2 contexts. If a
|
||||
new injected context is set when queue is full, error is triggered by interruption and through function 'HAL_ADCEx_InjectedQueueOverflowCallback'.
|
||||
Caution: This feature request that the sequence is fully configured before injected conversion start.
|
||||
Therefore, configure channels with HAL_ADCEx_InjectedConfigChannel() as many times as value of 'InjectedNbrOfConversion' parameter.
|
||||
Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
|
||||
configure a channel on injected group can impact the configuration of other channels previously set.
|
||||
Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion). */
|
||||
uint32_t ExternalTrigInjecConv; /*!< Selects the external event used to trigger the conversion start of injected group.
|
||||
If set to ADC_INJECTED_SOFTWARE_START, external triggers are disabled.
|
||||
This parameter can be a value of @ref ADCEx_External_trigger_source_Injected
|
||||
Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
|
||||
configure a channel on injected group can impact the configuration of other channels previously set. */
|
||||
uint32_t ExternalTrigInjecConvEdge; /*!< Selects the external trigger edge of injected group.
|
||||
This parameter can be a value of @ref ADCEx_External_trigger_edge_Injected.
|
||||
If trigger is set to ADC_INJECTED_SOFTWARE_START, this parameter is discarded.
|
||||
Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
|
||||
configure a channel on injected group can impact the configuration of other channels previously set. */
|
||||
uint32_t InjectedChannel; /*!< Configure the ADC injected channel
|
||||
This parameter can be a value of @ref ADCEx_channels
|
||||
Note: Depending on devices, some channels may not be available on package pins. Refer to device datasheet for channels availability. */
|
||||
uint32_t InjectedRank; /*!< The rank in the regular group sequencer
|
||||
This parameter must be a value of @ref ADCEx_injected_rank
|
||||
Note: In case of need to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by the new channel setting (or parameter number of conversions can be adjusted) */
|
||||
uint32_t InjectedSamplingTime; /*!< Sampling time value to be set for the selected channel.
|
||||
Unit: ADC clock cycles
|
||||
Conversion time is the addition of sampling time and processing time (12.5 ADC clock cycles at ADC resolution 12 bits, 10.5 cycles at 10 bits, 8.5 cycles at 8 bits, 6.5 cycles at 6 bits).
|
||||
This parameter can be a value of @ref ADCEx_sampling_times
|
||||
Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups.
|
||||
If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting.
|
||||
Note: In case of usage of internal measurement channels (VrefInt/Vbat/TempSensor),
|
||||
sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting)
|
||||
Refer to device datasheet for timings values, parameters TS_vrefint, TS_vbat, TS_temp (values rough order: 2.2us min). */
|
||||
uint32_t InjectedSingleDiff; /*!< Selection of single-ended or differential input.
|
||||
In differential mode: Differential measurement is between the selected channel 'i' (positive input) and channel 'i+1' (negative input).
|
||||
Only channel 'i' has to be configured, channel 'i+1' is configured automatically.
|
||||
This parameter must be a value of @ref ADCEx_SingleDifferential
|
||||
Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups.
|
||||
If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting.
|
||||
Note: Channels 1 to 14 are available in differential mode. Channels 15U, 16U, 17U, 18 can be used only in single-ended mode.
|
||||
Note: When configuring a channel 'i' in differential mode, the channel 'i-1' is not usable separately.
|
||||
Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion).
|
||||
If ADC is enabled, this parameter setting is bypassed without error reporting (as it can be the expected behaviour in case of another parameter update on the fly) */
|
||||
uint32_t InjectedOffsetNumber; /*!< Selects the offset number
|
||||
This parameter can be a value of @ref ADCEx_OffsetNumber
|
||||
Caution: Only one channel is allowed per offset number. If another channel was on this offset number, the offset will be changed to the new channel. */
|
||||
uint32_t InjectedOffset; /*!< Defines the offset to be subtracted from the raw converted data.
|
||||
Offset value must be a positive number.
|
||||
Depending of ADC resolution selected (12U, 10U, 8 or 6 bits),
|
||||
this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFFU, 0x3FFU, 0xFF or 0x3F respectively. */
|
||||
uint32_t InjectedNbrOfConversion; /*!< Specifies the number of ranks that will be converted within the injected group sequencer.
|
||||
To use the injected group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled.
|
||||
This parameter must be a number between Min_Data = 1 and Max_Data = 4.
|
||||
Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
|
||||
configure a channel on injected group can impact the configuration of other channels previously set. */
|
||||
FunctionalState InjectedDiscontinuousConvMode; /*!< Specifies whether the conversions sequence of injected group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts).
|
||||
Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
|
||||
Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded.
|
||||
This parameter can be set to ENABLE or DISABLE.
|
||||
Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion).
|
||||
Note: For injected group, number of discontinuous ranks increment is fixed to one-by-one.
|
||||
Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
|
||||
configure a channel on injected group can impact the configuration of other channels previously set. */
|
||||
FunctionalState AutoInjectedConv; /*!< Enables or disables the selected ADC automatic injected group conversion after regular one
|
||||
This parameter can be set to ENABLE or DISABLE.
|
||||
Note: To use Automatic injected conversion, discontinuous mode must be disabled ('DiscontinuousConvMode' and 'InjectedDiscontinuousConvMode' set to DISABLE)
|
||||
Note: To use Automatic injected conversion, injected group external triggers must be disabled ('ExternalTrigInjecConv' set to ADC_SOFTWARE_START)
|
||||
Note: In case of DMA used with regular group: if DMA configured in normal mode (single shot) JAUTO will be stopped upon DMA transfer complete.
|
||||
To maintain JAUTO always enabled, DMA must be configured in circular mode.
|
||||
Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
|
||||
configure a channel on injected group can impact the configuration of other channels previously set. */
|
||||
FunctionalState QueueInjectedContext; /*!< Specifies whether the context queue feature is enabled.
|
||||
This parameter can be set to ENABLE or DISABLE.
|
||||
If context queue is enabled, injected sequencer&channels configurations are queued on up to 2 contexts. If a
|
||||
new injected context is set when queue is full, error is triggered by interruption and through function 'HAL_ADCEx_InjectedQueueOverflowCallback'.
|
||||
Caution: This feature request that the sequence is fully configured before injected conversion start.
|
||||
Therefore, configure channels with HAL_ADCEx_InjectedConfigChannel() as many times as value of 'InjectedNbrOfConversion' parameter.
|
||||
Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
|
||||
configure a channel on injected group can impact the configuration of other channels previously set.
|
||||
Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion). */
|
||||
uint32_t ExternalTrigInjecConv; /*!< Selects the external event used to trigger the conversion start of injected group.
|
||||
If set to ADC_INJECTED_SOFTWARE_START, external triggers are disabled.
|
||||
This parameter can be a value of @ref ADCEx_External_trigger_source_Injected
|
||||
Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
|
||||
configure a channel on injected group can impact the configuration of other channels previously set. */
|
||||
uint32_t ExternalTrigInjecConvEdge; /*!< Selects the external trigger edge of injected group.
|
||||
This parameter can be a value of @ref ADCEx_External_trigger_edge_Injected.
|
||||
If trigger is set to ADC_INJECTED_SOFTWARE_START, this parameter is discarded.
|
||||
Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
|
||||
configure a channel on injected group can impact the configuration of other channels previously set. */
|
||||
}ADC_InjectionConfTypeDef;
|
||||
|
||||
/**
|
||||
|
@ -298,28 +282,28 @@ typedef struct
|
|||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t WatchdogNumber; /*!< Selects which ADC analog watchdog to apply to the selected channel.
|
||||
For Analog Watchdog 1: Only 1 channel can be monitored (or overall group of channels by setting parameter 'WatchdogMode')
|
||||
For Analog Watchdog 2 and 3: Several channels can be monitored (by successive calls of 'HAL_ADC_AnalogWDGConfig()' for each channel)
|
||||
This parameter can be a value of @ref ADCEx_analog_watchdog_number. */
|
||||
uint32_t WatchdogMode; /*!< For Analog Watchdog 1: Configures the ADC analog watchdog mode: single channel/overall group of channels, regular/injected group.
|
||||
For Analog Watchdog 2 and 3: There is no configuration for overall group of channels as AWD1. Set value 'ADC_ANALOGWATCHDOG_NONE' to reset channels group programmed with parameter 'Channel', set any other value to not use this parameter.
|
||||
This parameter can be a value of @ref ADCEx_analog_watchdog_mode. */
|
||||
uint32_t Channel; /*!< Selects which ADC channel to monitor by analog watchdog.
|
||||
For Analog Watchdog 1: this parameter has an effect only if parameter 'WatchdogMode' is configured on single channel. Only 1 channel can be monitored.
|
||||
For Analog Watchdog 2 and 3: Several channels can be monitored (successive calls of HAL_ADC_AnalogWDGConfig() must be done, one for each channel.
|
||||
Channels group reset can be done by setting WatchdogMode to 'ADC_ANALOGWATCHDOG_NONE').
|
||||
This parameter can be a value of @ref ADCEx_channels. */
|
||||
uint32_t ITMode; /*!< Specifies whether the analog watchdog is configured in interrupt or polling mode.
|
||||
This parameter can be set to ENABLE or DISABLE */
|
||||
uint32_t HighThreshold; /*!< Configures the ADC analog watchdog High threshold value.
|
||||
Depending of ADC resolution selected (12U, 10U, 8 or 6 bits), this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFFU, 0x3FFU, 0xFF or 0x3F respectively.
|
||||
Note: Analog watchdog 2 and 3 are limited to a resolution of 8 bits: if ADC resolution is 12 bits
|
||||
the 4 LSB are ignored, if ADC resolution is 10 bits the 2 LSB are ignored. */
|
||||
uint32_t LowThreshold; /*!< Configures the ADC analog watchdog High threshold value.
|
||||
Depending of ADC resolution selected (12U, 10U, 8 or 6 bits), this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFFU, 0x3FFU, 0xFF or 0x3F respectively.
|
||||
Note: Analog watchdog 2 and 3 are limited to a resolution of 8 bits: if ADC resolution is 12 bits
|
||||
the 4 LSB are ignored, if ADC resolution is 10 bits the 2 LSB are ignored. */
|
||||
uint32_t WatchdogNumber; /*!< Selects which ADC analog watchdog to apply to the selected channel.
|
||||
For Analog Watchdog 1: Only 1 channel can be monitored (or overall group of channels by setting parameter 'WatchdogMode')
|
||||
For Analog Watchdog 2 and 3: Several channels can be monitored (by successive calls of 'HAL_ADC_AnalogWDGConfig()' for each channel)
|
||||
This parameter can be a value of @ref ADCEx_analog_watchdog_number. */
|
||||
uint32_t WatchdogMode; /*!< For Analog Watchdog 1: Configures the ADC analog watchdog mode: single channel/overall group of channels, regular/injected group.
|
||||
For Analog Watchdog 2 and 3: There is no configuration for overall group of channels as AWD1. Set value 'ADC_ANALOGWATCHDOG_NONE' to reset channels group programmed with parameter 'Channel', set any other value to not use this parameter.
|
||||
This parameter can be a value of @ref ADCEx_analog_watchdog_mode. */
|
||||
uint32_t Channel; /*!< Selects which ADC channel to monitor by analog watchdog.
|
||||
For Analog Watchdog 1: this parameter has an effect only if parameter 'WatchdogMode' is configured on single channel. Only 1 channel can be monitored.
|
||||
For Analog Watchdog 2 and 3: Several channels can be monitored (successive calls of HAL_ADC_AnalogWDGConfig() must be done, one for each channel.
|
||||
Channels group reset can be done by setting WatchdogMode to 'ADC_ANALOGWATCHDOG_NONE').
|
||||
This parameter can be a value of @ref ADCEx_channels. */
|
||||
FunctionalState ITMode; /*!< Specifies whether the analog watchdog is configured in interrupt or polling mode.
|
||||
This parameter can be set to ENABLE or DISABLE */
|
||||
uint32_t HighThreshold; /*!< Configures the ADC analog watchdog High threshold value.
|
||||
Depending of ADC resolution selected (12U, 10U, 8 or 6 bits), this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFFU, 0x3FFU, 0xFF or 0x3F respectively.
|
||||
Note: Analog watchdog 2 and 3 are limited to a resolution of 8 bits: if ADC resolution is 12 bits
|
||||
the 4 LSB are ignored, if ADC resolution is 10 bits the 2 LSB are ignored. */
|
||||
uint32_t LowThreshold; /*!< Configures the ADC analog watchdog High threshold value.
|
||||
Depending of ADC resolution selected (12U, 10U, 8 or 6 bits), this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFFU, 0x3FFU, 0xFF or 0x3F respectively.
|
||||
Note: Analog watchdog 2 and 3 are limited to a resolution of 8 bits: if ADC resolution is 12 bits
|
||||
the 4 LSB are ignored, if ADC resolution is 10 bits the 2 LSB are ignored. */
|
||||
}ADC_AnalogWDGConfTypeDef;
|
||||
|
||||
/**
|
||||
|
@ -363,37 +347,37 @@ typedef struct
|
|||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t DataAlign; /*!< Specifies ADC data alignment to right (MSB on register bit 11 and LSB on register bit 0U) (default setting)
|
||||
or to left (if regular group: MSB on register bit 15 and LSB on register bit 4U, if injected group (MSB kept as signed value due to potential negative value after offset application): MSB on register bit 14 and LSB on register bit 3U).
|
||||
This parameter can be a value of @ref ADCEx_Data_align */
|
||||
uint32_t ScanConvMode; /*!< Configures the sequencer of regular and injected groups.
|
||||
This parameter can be associated to parameter 'DiscontinuousConvMode' to have main sequence subdivided in successive parts.
|
||||
If disabled: Conversion is performed in single mode (one channel converted, the one defined in rank 1U).
|
||||
Parameters 'NbrOfConversion' and 'InjectedNbrOfConversion' are discarded (equivalent to set to 1U).
|
||||
If enabled: Conversions are performed in sequence mode (multiple ranks defined by 'NbrOfConversion'/'InjectedNbrOfConversion' and each channel rank).
|
||||
Scan direction is upward: from rank1 to rank 'n'.
|
||||
This parameter can be a value of @ref ADCEx_Scan_mode
|
||||
Note: For regular group, this parameter should be enabled in conversion either by polling (HAL_ADC_Start with Discontinuous mode and NbrOfDiscConversion=1U)
|
||||
or by DMA (HAL_ADC_Start_DMA), but not by interruption (HAL_ADC_Start_IT): in scan mode, interruption is triggered only on the
|
||||
the last conversion of the sequence. All previous conversions would be overwritten by the last one.
|
||||
Injected group used with scan mode has not this constraint: each rank has its own result register, no data is overwritten. */
|
||||
uint32_t ContinuousConvMode; /*!< Specifies whether the conversion is performed in single mode (one conversion) or continuous mode for regular group,
|
||||
after the selected trigger occurred (software start or external trigger).
|
||||
This parameter can be set to ENABLE or DISABLE. */
|
||||
uint32_t NbrOfConversion; /*!< Specifies the number of ranks that will be converted within the regular group sequencer.
|
||||
To use regular group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled.
|
||||
This parameter must be a number between Min_Data = 1 and Max_Data = 16. */
|
||||
uint32_t DiscontinuousConvMode; /*!< Specifies whether the conversions sequence of regular group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts).
|
||||
Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
|
||||
Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded.
|
||||
This parameter can be set to ENABLE or DISABLE. */
|
||||
uint32_t NbrOfDiscConversion; /*!< Specifies the number of discontinuous conversions in which the main sequence of regular group (parameter NbrOfConversion) will be subdivided.
|
||||
If parameter 'DiscontinuousConvMode' is disabled, this parameter is discarded.
|
||||
This parameter must be a number between Min_Data = 1 and Max_Data = 8. */
|
||||
uint32_t ExternalTrigConv; /*!< Selects the external event used to trigger the conversion start of regular group.
|
||||
If set to ADC_SOFTWARE_START, external triggers are disabled.
|
||||
If set to external trigger source, triggering is on event rising edge.
|
||||
This parameter can be a value of @ref ADCEx_External_trigger_source_Regular */
|
||||
uint32_t DataAlign; /*!< Specifies ADC data alignment to right (MSB on register bit 11 and LSB on register bit 0U) (default setting)
|
||||
or to left (if regular group: MSB on register bit 15 and LSB on register bit 4U, if injected group (MSB kept as signed value due to potential negative value after offset application): MSB on register bit 14 and LSB on register bit 3U).
|
||||
This parameter can be a value of @ref ADCEx_Data_align */
|
||||
uint32_t ScanConvMode; /*!< Configures the sequencer of regular and injected groups.
|
||||
This parameter can be associated to parameter 'DiscontinuousConvMode' to have main sequence subdivided in successive parts.
|
||||
If disabled: Conversion is performed in single mode (one channel converted, the one defined in rank 1U).
|
||||
Parameters 'NbrOfConversion' and 'InjectedNbrOfConversion' are discarded (equivalent to set to 1U).
|
||||
If enabled: Conversions are performed in sequence mode (multiple ranks defined by 'NbrOfConversion'/'InjectedNbrOfConversion' and each channel rank).
|
||||
Scan direction is upward: from rank1 to rank 'n'.
|
||||
This parameter can be a value of @ref ADCEx_Scan_mode
|
||||
Note: For regular group, this parameter should be enabled in conversion either by polling (HAL_ADC_Start with Discontinuous mode and NbrOfDiscConversion=1U)
|
||||
or by DMA (HAL_ADC_Start_DMA), but not by interruption (HAL_ADC_Start_IT): in scan mode, interruption is triggered only on the
|
||||
the last conversion of the sequence. All previous conversions would be overwritten by the last one.
|
||||
Injected group used with scan mode has not this constraint: each rank has its own result register, no data is overwritten. */
|
||||
FunctionalState ContinuousConvMode; /*!< Specifies whether the conversion is performed in single mode (one conversion) or continuous mode for regular group,
|
||||
after the selected trigger occurred (software start or external trigger).
|
||||
This parameter can be set to ENABLE or DISABLE. */
|
||||
uint32_t NbrOfConversion; /*!< Specifies the number of ranks that will be converted within the regular group sequencer.
|
||||
To use regular group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled.
|
||||
This parameter must be a number between Min_Data = 1 and Max_Data = 16. */
|
||||
FunctionalState DiscontinuousConvMode; /*!< Specifies whether the conversions sequence of regular group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts).
|
||||
Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
|
||||
Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded.
|
||||
This parameter can be set to ENABLE or DISABLE. */
|
||||
uint32_t NbrOfDiscConversion; /*!< Specifies the number of discontinuous conversions in which the main sequence of regular group (parameter NbrOfConversion) will be subdivided.
|
||||
If parameter 'DiscontinuousConvMode' is disabled, this parameter is discarded.
|
||||
This parameter must be a number between Min_Data = 1 and Max_Data = 8. */
|
||||
uint32_t ExternalTrigConv; /*!< Selects the external event used to trigger the conversion start of regular group.
|
||||
If set to ADC_SOFTWARE_START, external triggers are disabled.
|
||||
If set to external trigger source, triggering is on event rising edge.
|
||||
This parameter can be a value of @ref ADCEx_External_trigger_source_Regular */
|
||||
}ADC_InitTypeDef;
|
||||
|
||||
/**
|
||||
|
@ -433,53 +417,53 @@ typedef struct
|
|||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t InjectedChannel; /*!< Selection of ADC channel to configure
|
||||
This parameter can be a value of @ref ADCEx_channels
|
||||
Note: Depending on devices, some channels may not be available on package pins. Refer to device datasheet for channels availability. */
|
||||
uint32_t InjectedRank; /*!< Rank in the injected group sequencer
|
||||
This parameter must be a value of @ref ADCEx_injected_rank
|
||||
Note: In case of need to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by the new channel setting (or parameter number of conversions can be adjusted) */
|
||||
uint32_t InjectedSamplingTime; /*!< Sampling time value to be set for the selected channel.
|
||||
Unit: ADC clock cycles
|
||||
Conversion time is the addition of sampling time and processing time (12.5 ADC clock cycles at ADC resolution 12 bits).
|
||||
This parameter can be a value of @ref ADCEx_sampling_times
|
||||
Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups.
|
||||
If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting.
|
||||
Note: In case of usage of internal measurement channels (VrefInt/Vbat/TempSensor),
|
||||
sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting)
|
||||
Refer to device datasheet for timings values, parameters TS_vrefint, TS_vbat, TS_temp (values rough order: 5us to 17.1us min). */
|
||||
uint32_t InjectedOffset; /*!< Defines the offset to be subtracted from the raw converted data (for channels set on injected group only).
|
||||
Offset value must be a positive number.
|
||||
Depending of ADC resolution selected (12U, 10U, 8 or 6 bits),
|
||||
this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFFU, 0x3FFU, 0xFF or 0x3F respectively. */
|
||||
uint32_t InjectedNbrOfConversion; /*!< Specifies the number of ranks that will be converted within the injected group sequencer.
|
||||
To use the injected group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled.
|
||||
This parameter must be a number between Min_Data = 1 and Max_Data = 4.
|
||||
Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
|
||||
configure a channel on injected group can impact the configuration of other channels previously set. */
|
||||
uint32_t InjectedDiscontinuousConvMode; /*!< Specifies whether the conversions sequence of injected group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts).
|
||||
Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
|
||||
Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded.
|
||||
This parameter can be set to ENABLE or DISABLE.
|
||||
Note: For injected group, number of discontinuous ranks increment is fixed to one-by-one.
|
||||
Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
|
||||
configure a channel on injected group can impact the configuration of other channels previously set. */
|
||||
uint32_t AutoInjectedConv; /*!< Enables or disables the selected ADC automatic injected group conversion after regular one
|
||||
This parameter can be set to ENABLE or DISABLE.
|
||||
Note: To use Automatic injected conversion, discontinuous mode must be disabled ('DiscontinuousConvMode' and 'InjectedDiscontinuousConvMode' set to DISABLE)
|
||||
Note: To use Automatic injected conversion, injected group external triggers must be disabled ('ExternalTrigInjecConv' set to ADC_SOFTWARE_START)
|
||||
Note: In case of DMA used with regular group: if DMA configured in normal mode (single shot) JAUTO will be stopped upon DMA transfer complete.
|
||||
To maintain JAUTO always enabled, DMA must be configured in circular mode.
|
||||
Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
|
||||
configure a channel on injected group can impact the configuration of other channels previously set. */
|
||||
uint32_t ExternalTrigInjecConv; /*!< Selects the external event used to trigger the conversion start of injected group.
|
||||
If set to ADC_INJECTED_SOFTWARE_START, external triggers are disabled.
|
||||
If set to external trigger source, triggering is on event rising edge.
|
||||
This parameter can be a value of @ref ADCEx_External_trigger_source_Injected
|
||||
Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion).
|
||||
If ADC is enabled, this parameter setting is bypassed without error reporting (as it can be the expected behaviour in case of another parameter update on the fly)
|
||||
Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
|
||||
configure a channel on injected group can impact the configuration of other channels previously set. */
|
||||
uint32_t InjectedChannel; /*!< Selection of ADC channel to configure
|
||||
This parameter can be a value of @ref ADCEx_channels
|
||||
Note: Depending on devices, some channels may not be available on package pins. Refer to device datasheet for channels availability. */
|
||||
uint32_t InjectedRank; /*!< Rank in the injected group sequencer
|
||||
This parameter must be a value of @ref ADCEx_injected_rank
|
||||
Note: In case of need to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by the new channel setting (or parameter number of conversions can be adjusted) */
|
||||
uint32_t InjectedSamplingTime; /*!< Sampling time value to be set for the selected channel.
|
||||
Unit: ADC clock cycles
|
||||
Conversion time is the addition of sampling time and processing time (12.5 ADC clock cycles at ADC resolution 12 bits).
|
||||
This parameter can be a value of @ref ADCEx_sampling_times
|
||||
Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups.
|
||||
If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting.
|
||||
Note: In case of usage of internal measurement channels (VrefInt/Vbat/TempSensor),
|
||||
sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting)
|
||||
Refer to device datasheet for timings values, parameters TS_vrefint, TS_vbat, TS_temp (values rough order: 5us to 17.1us min). */
|
||||
uint32_t InjectedOffset; /*!< Defines the offset to be subtracted from the raw converted data (for channels set on injected group only).
|
||||
Offset value must be a positive number.
|
||||
Depending of ADC resolution selected (12U, 10U, 8 or 6 bits),
|
||||
this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFFU, 0x3FFU, 0xFF or 0x3F respectively. */
|
||||
uint32_t InjectedNbrOfConversion; /*!< Specifies the number of ranks that will be converted within the injected group sequencer.
|
||||
To use the injected group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled.
|
||||
This parameter must be a number between Min_Data = 1 and Max_Data = 4.
|
||||
Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
|
||||
configure a channel on injected group can impact the configuration of other channels previously set. */
|
||||
FunctionalState InjectedDiscontinuousConvMode; /*!< Specifies whether the conversions sequence of injected group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts).
|
||||
Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
|
||||
Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded.
|
||||
This parameter can be set to ENABLE or DISABLE.
|
||||
Note: For injected group, number of discontinuous ranks increment is fixed to one-by-one.
|
||||
Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
|
||||
configure a channel on injected group can impact the configuration of other channels previously set. */
|
||||
FunctionalState AutoInjectedConv; /*!< Enables or disables the selected ADC automatic injected group conversion after regular one
|
||||
This parameter can be set to ENABLE or DISABLE.
|
||||
Note: To use Automatic injected conversion, discontinuous mode must be disabled ('DiscontinuousConvMode' and 'InjectedDiscontinuousConvMode' set to DISABLE)
|
||||
Note: To use Automatic injected conversion, injected group external triggers must be disabled ('ExternalTrigInjecConv' set to ADC_SOFTWARE_START)
|
||||
Note: In case of DMA used with regular group: if DMA configured in normal mode (single shot) JAUTO will be stopped upon DMA transfer complete.
|
||||
To maintain JAUTO always enabled, DMA must be configured in circular mode.
|
||||
Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
|
||||
configure a channel on injected group can impact the configuration of other channels previously set. */
|
||||
uint32_t ExternalTrigInjecConv; /*!< Selects the external event used to trigger the conversion start of injected group.
|
||||
If set to ADC_INJECTED_SOFTWARE_START, external triggers are disabled.
|
||||
If set to external trigger source, triggering is on event rising edge.
|
||||
This parameter can be a value of @ref ADCEx_External_trigger_source_Injected
|
||||
Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion).
|
||||
If ADC is enabled, this parameter setting is bypassed without error reporting (as it can be the expected behaviour in case of another parameter update on the fly)
|
||||
Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
|
||||
configure a channel on injected group can impact the configuration of other channels previously set. */
|
||||
}ADC_InjectionConfTypeDef;
|
||||
|
||||
/**
|
||||
|
@ -489,18 +473,18 @@ typedef struct
|
|||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t WatchdogMode; /*!< Configures the ADC analog watchdog mode: single/all channels, regular/injected group.
|
||||
This parameter can be a value of @ref ADCEx_analog_watchdog_mode. */
|
||||
uint32_t Channel; /*!< Selects which ADC channel to monitor by analog watchdog.
|
||||
This parameter has an effect only if watchdog mode is configured on single channel (parameter WatchdogMode)
|
||||
This parameter can be a value of @ref ADCEx_channels. */
|
||||
uint32_t ITMode; /*!< Specifies whether the analog watchdog is configured in interrupt or polling mode.
|
||||
This parameter can be set to ENABLE or DISABLE */
|
||||
uint32_t HighThreshold; /*!< Configures the ADC analog watchdog High threshold value.
|
||||
This parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF. */
|
||||
uint32_t LowThreshold; /*!< Configures the ADC analog watchdog High threshold value.
|
||||
This parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF. */
|
||||
uint32_t WatchdogNumber; /*!< Reserved for future use, can be set to 0U */
|
||||
uint32_t WatchdogMode; /*!< Configures the ADC analog watchdog mode: single/all channels, regular/injected group.
|
||||
This parameter can be a value of @ref ADCEx_analog_watchdog_mode. */
|
||||
uint32_t Channel; /*!< Selects which ADC channel to monitor by analog watchdog.
|
||||
This parameter has an effect only if watchdog mode is configured on single channel (parameter WatchdogMode)
|
||||
This parameter can be a value of @ref ADCEx_channels. */
|
||||
FunctionalState ITMode; /*!< Specifies whether the analog watchdog is configured in interrupt or polling mode.
|
||||
This parameter can be set to ENABLE or DISABLE */
|
||||
uint32_t HighThreshold; /*!< Configures the ADC analog watchdog High threshold value.
|
||||
This parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF. */
|
||||
uint32_t LowThreshold; /*!< Configures the ADC analog watchdog High threshold value.
|
||||
This parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF. */
|
||||
uint32_t WatchdogNumber; /*!< Reserved for future use, can be set to 0U */
|
||||
}ADC_AnalogWDGConfTypeDef;
|
||||
#endif /* STM32F373xC || STM32F378xx */
|
||||
/**
|
||||
|
@ -522,6 +506,9 @@ typedef struct
|
|||
#define HAL_ADC_ERROR_OVR (0x02U) /*!< Overrun error */
|
||||
#define HAL_ADC_ERROR_DMA (0x04U) /*!< DMA transfer error */
|
||||
#define HAL_ADC_ERROR_JQOVF (0x08U) /*!< Injected context queue overflow error */
|
||||
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
|
||||
#define HAL_ADC_ERROR_INVALID_CALLBACK (0x10U) /*!< Invalid Callback error */
|
||||
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -2056,12 +2043,6 @@ typedef struct
|
|||
#define __HAL_ADC_CLEAR_FLAG(__HANDLE__, __FLAG__) \
|
||||
(WRITE_REG((__HANDLE__)->Instance->ISR, (__FLAG__)))
|
||||
|
||||
/** @brief Reset ADC handle state
|
||||
* @param __HANDLE__ ADC handle
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_ADC_RESET_HANDLE_STATE(__HANDLE__) \
|
||||
((__HANDLE__)->State = HAL_ADC_STATE_RESET)
|
||||
#endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
|
||||
/* STM32F302xC || STM32F303xC || STM32F358xx || */
|
||||
/* STM32F303x8 || STM32F334x8 || STM32F328xx || */
|
||||
|
@ -2154,12 +2135,6 @@ typedef struct
|
|||
#define __HAL_ADC_CLEAR_FLAG(__HANDLE__, __FLAG__) \
|
||||
(WRITE_REG((__HANDLE__)->Instance->SR, ~(__FLAG__)))
|
||||
|
||||
/** @brief Reset ADC handle state
|
||||
* @param __HANDLE__ ADC handle
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_ADC_RESET_HANDLE_STATE(__HANDLE__) \
|
||||
((__HANDLE__)->State = HAL_ADC_STATE_RESET)
|
||||
#endif /* STM32F373xC || STM32F378xx */
|
||||
|
||||
/**
|
||||
|
|
|
@ -6,29 +6,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
@ -228,8 +212,58 @@ typedef struct __CAN_HandleTypeDef
|
|||
__IO uint32_t ErrorCode; /*!< CAN Error code.
|
||||
This parameter can be a value of @ref CAN_Error_Code */
|
||||
|
||||
#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
|
||||
void (* TxMailbox0CompleteCallback)(struct __CAN_HandleTypeDef *hcan);/*!< CAN Tx Mailbox 0 complete callback */
|
||||
void (* TxMailbox1CompleteCallback)(struct __CAN_HandleTypeDef *hcan);/*!< CAN Tx Mailbox 1 complete callback */
|
||||
void (* TxMailbox2CompleteCallback)(struct __CAN_HandleTypeDef *hcan);/*!< CAN Tx Mailbox 2 complete callback */
|
||||
void (* TxMailbox0AbortCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Tx Mailbox 0 abort callback */
|
||||
void (* TxMailbox1AbortCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Tx Mailbox 1 abort callback */
|
||||
void (* TxMailbox2AbortCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Tx Mailbox 2 abort callback */
|
||||
void (* RxFifo0MsgPendingCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Rx FIFO 0 msg pending callback */
|
||||
void (* RxFifo0FullCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Rx FIFO 0 full callback */
|
||||
void (* RxFifo1MsgPendingCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Rx FIFO 1 msg pending callback */
|
||||
void (* RxFifo1FullCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Rx FIFO 1 full callback */
|
||||
void (* SleepCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Sleep callback */
|
||||
void (* WakeUpFromRxMsgCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Wake Up from Rx msg callback */
|
||||
void (* ErrorCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Error callback */
|
||||
|
||||
void (* MspInitCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Msp Init callback */
|
||||
void (* MspDeInitCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Msp DeInit callback */
|
||||
|
||||
#endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */
|
||||
} CAN_HandleTypeDef;
|
||||
|
||||
#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
|
||||
/**
|
||||
* @brief HAL CAN common Callback ID enumeration definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID = 0x00U, /*!< CAN Tx Mailbox 0 complete callback ID */
|
||||
HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID = 0x01U, /*!< CAN Tx Mailbox 1 complete callback ID */
|
||||
HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID = 0x02U, /*!< CAN Tx Mailbox 2 complete callback ID */
|
||||
HAL_CAN_TX_MAILBOX0_ABORT_CB_ID = 0x03U, /*!< CAN Tx Mailbox 0 abort callback ID */
|
||||
HAL_CAN_TX_MAILBOX1_ABORT_CB_ID = 0x04U, /*!< CAN Tx Mailbox 1 abort callback ID */
|
||||
HAL_CAN_TX_MAILBOX2_ABORT_CB_ID = 0x05U, /*!< CAN Tx Mailbox 2 abort callback ID */
|
||||
HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID = 0x06U, /*!< CAN Rx FIFO 0 message pending callback ID */
|
||||
HAL_CAN_RX_FIFO0_FULL_CB_ID = 0x07U, /*!< CAN Rx FIFO 0 full callback ID */
|
||||
HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID = 0x08U, /*!< CAN Rx FIFO 1 message pending callback ID */
|
||||
HAL_CAN_RX_FIFO1_FULL_CB_ID = 0x09U, /*!< CAN Rx FIFO 1 full callback ID */
|
||||
HAL_CAN_SLEEP_CB_ID = 0x0AU, /*!< CAN Sleep callback ID */
|
||||
HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID = 0x0BU, /*!< CAN Wake Up fropm Rx msg callback ID */
|
||||
HAL_CAN_ERROR_CB_ID = 0x0CU, /*!< CAN Error callback ID */
|
||||
|
||||
HAL_CAN_MSPINIT_CB_ID = 0x0DU, /*!< CAN MspInit callback ID */
|
||||
HAL_CAN_MSPDEINIT_CB_ID = 0x0EU, /*!< CAN MspDeInit callback ID */
|
||||
|
||||
} HAL_CAN_CallbackIDTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL CAN Callback pointer definition
|
||||
*/
|
||||
typedef void (*pCAN_CallbackTypeDef)(CAN_HandleTypeDef *hcan); /*!< pointer to a CAN callback function */
|
||||
|
||||
#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -267,6 +301,9 @@ typedef struct __CAN_HandleTypeDef
|
|||
#define HAL_CAN_ERROR_NOT_STARTED (0x00100000U) /*!< Peripheral not started */
|
||||
#define HAL_CAN_ERROR_PARAM (0x00200000U) /*!< Parameter error */
|
||||
|
||||
#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
|
||||
#define HAL_CAN_ERROR_INVALID_CALLBACK (0x00400000U) /*!< Invalid Callback error */
|
||||
#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
|
||||
#define HAL_CAN_ERROR_INTERNAL (0x00800000U) /*!< Internal error */
|
||||
|
||||
/**
|
||||
|
@ -502,7 +539,15 @@ typedef struct __CAN_HandleTypeDef
|
|||
* @param __HANDLE__ CAN handle.
|
||||
* @retval None
|
||||
*/
|
||||
#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
|
||||
#define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) do{ \
|
||||
(__HANDLE__)->State = HAL_CAN_STATE_RESET; \
|
||||
(__HANDLE__)->MspInitCallback = NULL; \
|
||||
(__HANDLE__)->MspDeInitCallback = NULL; \
|
||||
} while(0)
|
||||
#else
|
||||
#define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CAN_STATE_RESET)
|
||||
#endif /*USE_HAL_CAN_REGISTER_CALLBACKS */
|
||||
|
||||
/**
|
||||
* @brief Enable the specified CAN interrupts.
|
||||
|
@ -593,6 +638,12 @@ HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef *hcan);
|
|||
void HAL_CAN_MspInit(CAN_HandleTypeDef *hcan);
|
||||
void HAL_CAN_MspDeInit(CAN_HandleTypeDef *hcan);
|
||||
|
||||
#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
|
||||
/* Callbacks Register/UnRegister functions ***********************************/
|
||||
HAL_StatusTypeDef HAL_CAN_RegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef CallbackID, void (* pCallback)(CAN_HandleTypeDef *_hcan));
|
||||
HAL_StatusTypeDef HAL_CAN_UnRegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef CallbackID);
|
||||
|
||||
#endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -738,7 +789,6 @@ HAL_StatusTypeDef HAL_CAN_ResetError(CAN_HandleTypeDef *hcan);
|
|||
((BS2) == CAN_BS2_7TQ) || ((BS2) == CAN_BS2_8TQ))
|
||||
#define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1U) && ((PRESCALER) <= 1024U))
|
||||
#define IS_CAN_FILTER_ID_HALFWORD(HALFWORD) ((HALFWORD) <= 0xFFFFU)
|
||||
#define IS_CAN_FILTER_BANK_DUAL(BANK) ((BANK) <= 27U)
|
||||
#define IS_CAN_FILTER_BANK_SINGLE(BANK) ((BANK) <= 13U)
|
||||
#define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \
|
||||
((MODE) == CAN_FILTERMODE_IDLIST))
|
||||
|
|
|
@ -6,45 +6,30 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_HAL_CEC_H
|
||||
#define __STM32F3xx_HAL_CEC_H
|
||||
#ifndef STM32F3xx_HAL_CEC_H
|
||||
#define STM32F3xx_HAL_CEC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if defined(STM32F373xC) || defined(STM32F378xx)
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f3xx_hal_def.h"
|
||||
|
||||
#if defined (CEC)
|
||||
|
||||
/** @addtogroup STM32F3xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
@ -65,9 +50,9 @@ typedef struct
|
|||
{
|
||||
uint32_t SignalFreeTime; /*!< Set SFT field, specifies the Signal Free Time.
|
||||
It can be one of @ref CEC_Signal_Free_Time
|
||||
and belongs to the set {0U,...,7} where
|
||||
and belongs to the set {0,...,7} where
|
||||
0x0 is the default configuration
|
||||
else means 0.5U + (SignalFreeTime - 1U) nominal data bit periods */
|
||||
else means 0.5 + (SignalFreeTime - 1) nominal data bit periods */
|
||||
|
||||
uint32_t Tolerance; /*!< Set RXTOL bit, specifies the tolerance accepted on the received waveforms,
|
||||
it can be a value of @ref CEC_Tolerance : it is either CEC_STANDARD_TOLERANCE
|
||||
|
@ -92,13 +77,13 @@ typedef struct
|
|||
|
||||
It supersedes BREGEN and LBPEGEN bits for a broadcast message error handling. It can take two values:
|
||||
|
||||
1U) CEC_BROADCASTERROR_ERRORBIT_GENERATION.
|
||||
1) CEC_BROADCASTERROR_ERRORBIT_GENERATION.
|
||||
a) BRE detection: error-bit generation on the CEC line if BRESTP=CEC_RX_STOP_ON_BRE
|
||||
and BREGEN=CEC_BRE_ERRORBIT_NO_GENERATION.
|
||||
b) LBPE detection: error-bit generation on the CEC line
|
||||
if LBPGEN=CEC_LBPE_ERRORBIT_NO_GENERATION.
|
||||
|
||||
2U) CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION.
|
||||
2) CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION.
|
||||
no error-bit generation in case neither a) nor b) are satisfied. Additionally,
|
||||
there is no error-bit generation in case of Short Bit Period Error detection in
|
||||
a broadcast message while LSTN bit is set. */
|
||||
|
@ -123,11 +108,11 @@ typedef struct
|
|||
uint8_t *RxBuffer; /*!< CEC Rx buffer pointeur */
|
||||
|
||||
|
||||
}CEC_InitTypeDef;
|
||||
} CEC_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL CEC State structures definition
|
||||
* @note HAL CEC State value is a combination of 2 different substates: gState and RxState.
|
||||
* @brief HAL CEC State definition
|
||||
* @note HAL CEC State value is a combination of 2 different substates: gState and RxState (see @ref CEC_State_Definition).
|
||||
* - gState contains CEC state information related to global Handle management
|
||||
* and also information related to Tx operations.
|
||||
* gState value coding follow below described bitmap :
|
||||
|
@ -164,27 +149,16 @@ typedef struct
|
|||
* b0 (not used)
|
||||
* x : Should be set to 0.
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_CEC_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized
|
||||
Value is allowed for gState and RxState */
|
||||
HAL_CEC_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use
|
||||
Value is allowed for gState and RxState */
|
||||
HAL_CEC_STATE_BUSY = 0x24U, /*!< an internal process is ongoing
|
||||
Value is allowed for gState only */
|
||||
HAL_CEC_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing
|
||||
Value is allowed for RxState only */
|
||||
HAL_CEC_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing
|
||||
Value is allowed for gState only */
|
||||
HAL_CEC_STATE_BUSY_RX_TX = 0x23U, /*!< an internal process is ongoing
|
||||
Value is allowed for gState only */
|
||||
HAL_CEC_STATE_ERROR = 0x60U /*!< Error Value is allowed for gState only */
|
||||
}HAL_CEC_StateTypeDef;
|
||||
typedef uint32_t HAL_CEC_StateTypeDef;
|
||||
|
||||
/**
|
||||
* @brief CEC handle Structure definition
|
||||
*/
|
||||
#if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
|
||||
typedef struct __CEC_HandleTypeDef
|
||||
#else
|
||||
typedef struct
|
||||
#endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
|
||||
{
|
||||
CEC_TypeDef *Instance; /*!< CEC registers base address */
|
||||
|
||||
|
@ -207,7 +181,40 @@ typedef struct
|
|||
|
||||
uint32_t ErrorCode; /*!< For errors handling purposes, copy of ISR register
|
||||
in case error is reported */
|
||||
}CEC_HandleTypeDef;
|
||||
|
||||
#if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
|
||||
void (* TxCpltCallback)(struct __CEC_HandleTypeDef
|
||||
*hcec); /*!< CEC Tx Transfer completed callback */
|
||||
void (* RxCpltCallback)(struct __CEC_HandleTypeDef *hcec,
|
||||
uint32_t RxFrameSize); /*!< CEC Rx Transfer completed callback */
|
||||
void (* ErrorCallback)(struct __CEC_HandleTypeDef *hcec); /*!< CEC error callback */
|
||||
|
||||
void (* MspInitCallback)(struct __CEC_HandleTypeDef *hcec); /*!< CEC Msp Init callback */
|
||||
void (* MspDeInitCallback)(struct __CEC_HandleTypeDef *hcec); /*!< CEC Msp DeInit callback */
|
||||
|
||||
#endif /* (USE_HAL_CEC_REGISTER_CALLBACKS) */
|
||||
} CEC_HandleTypeDef;
|
||||
|
||||
#if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
|
||||
/**
|
||||
* @brief HAL CEC Callback ID enumeration definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_CEC_TX_CPLT_CB_ID = 0x00U, /*!< CEC Tx Transfer completed callback ID */
|
||||
HAL_CEC_RX_CPLT_CB_ID = 0x01U, /*!< CEC Rx Transfer completed callback ID */
|
||||
HAL_CEC_ERROR_CB_ID = 0x02U, /*!< CEC error callback ID */
|
||||
HAL_CEC_MSPINIT_CB_ID = 0x03U, /*!< CEC Msp Init callback ID */
|
||||
HAL_CEC_MSPDEINIT_CB_ID = 0x04U /*!< CEC Msp DeInit callback ID */
|
||||
} HAL_CEC_CallbackIDTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL CEC Callback pointer definition
|
||||
*/
|
||||
typedef void (*pCEC_CallbackTypeDef)(CEC_HandleTypeDef *hcec); /*!< pointer to an CEC callback function */
|
||||
typedef void (*pCEC_RxCallbackTypeDef)(CEC_HandleTypeDef *hcec,
|
||||
uint32_t RxFrameSize); /*!< pointer to an Rx Transfer completed callback function */
|
||||
#endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -216,11 +223,29 @@ typedef struct
|
|||
/** @defgroup CEC_Exported_Constants CEC Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup CEC_State_Definition CEC State Code Definition
|
||||
* @{
|
||||
*/
|
||||
#define HAL_CEC_STATE_RESET ((uint32_t)0x00000000) /*!< Peripheral is not yet Initialized
|
||||
Value is allowed for gState and RxState */
|
||||
#define HAL_CEC_STATE_READY ((uint32_t)0x00000020) /*!< Peripheral Initialized and ready for use
|
||||
Value is allowed for gState and RxState */
|
||||
#define HAL_CEC_STATE_BUSY ((uint32_t)0x00000024) /*!< an internal process is ongoing
|
||||
Value is allowed for gState only */
|
||||
#define HAL_CEC_STATE_BUSY_RX ((uint32_t)0x00000022) /*!< Data Reception process is ongoing
|
||||
Value is allowed for RxState only */
|
||||
#define HAL_CEC_STATE_BUSY_TX ((uint32_t)0x00000021) /*!< Data Transmission process is ongoing
|
||||
Value is allowed for gState only */
|
||||
#define HAL_CEC_STATE_BUSY_RX_TX ((uint32_t)0x00000023) /*!< an internal process is ongoing
|
||||
Value is allowed for gState only */
|
||||
#define HAL_CEC_STATE_ERROR ((uint32_t)0x00000050) /*!< Error Value is allowed for gState only */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/** @defgroup CEC_Error_Code CEC Error Code
|
||||
* @{
|
||||
*/
|
||||
#define HAL_CEC_ERROR_NONE (0x00000000U) /*!< no error */
|
||||
#define HAL_CEC_ERROR_NONE (uint32_t) 0x0000U /*!< no error */
|
||||
#define HAL_CEC_ERROR_RXOVR CEC_ISR_RXOVR /*!< CEC Rx-Overrun */
|
||||
#define HAL_CEC_ERROR_BRE CEC_ISR_BRE /*!< CEC Rx Bit Rising Error */
|
||||
#define HAL_CEC_ERROR_SBPE CEC_ISR_SBPE /*!< CEC Rx Short Bit period Error */
|
||||
|
@ -230,6 +255,9 @@ typedef struct
|
|||
#define HAL_CEC_ERROR_TXUDR CEC_ISR_TXUDR /*!< CEC Tx-Buffer Underrun */
|
||||
#define HAL_CEC_ERROR_TXERR CEC_ISR_TXERR /*!< CEC Tx-Error */
|
||||
#define HAL_CEC_ERROR_TXACKE CEC_ISR_TXACKE /*!< CEC Tx Missing Acknowledge */
|
||||
#if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
|
||||
#define HAL_CEC_ERROR_INVALID_CALLBACK ((uint32_t)0x00002000U) /*!< Invalid Callback Error */
|
||||
#endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -237,14 +265,14 @@ typedef struct
|
|||
/** @defgroup CEC_Signal_Free_Time CEC Signal Free Time setting parameter
|
||||
* @{
|
||||
*/
|
||||
#define CEC_DEFAULT_SFT (0x00000000U)
|
||||
#define CEC_0_5_BITPERIOD_SFT (0x00000001U)
|
||||
#define CEC_1_5_BITPERIOD_SFT (0x00000002U)
|
||||
#define CEC_2_5_BITPERIOD_SFT (0x00000003U)
|
||||
#define CEC_3_5_BITPERIOD_SFT (0x00000004U)
|
||||
#define CEC_4_5_BITPERIOD_SFT (0x00000005U)
|
||||
#define CEC_5_5_BITPERIOD_SFT (0x00000006U)
|
||||
#define CEC_6_5_BITPERIOD_SFT (0x00000007U)
|
||||
#define CEC_DEFAULT_SFT ((uint32_t)0x00000000U)
|
||||
#define CEC_0_5_BITPERIOD_SFT ((uint32_t)0x00000001U)
|
||||
#define CEC_1_5_BITPERIOD_SFT ((uint32_t)0x00000002U)
|
||||
#define CEC_2_5_BITPERIOD_SFT ((uint32_t)0x00000003U)
|
||||
#define CEC_3_5_BITPERIOD_SFT ((uint32_t)0x00000004U)
|
||||
#define CEC_4_5_BITPERIOD_SFT ((uint32_t)0x00000005U)
|
||||
#define CEC_5_5_BITPERIOD_SFT ((uint32_t)0x00000006U)
|
||||
#define CEC_6_5_BITPERIOD_SFT ((uint32_t)0x00000007U)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -252,7 +280,7 @@ typedef struct
|
|||
/** @defgroup CEC_Tolerance CEC Receiver Tolerance
|
||||
* @{
|
||||
*/
|
||||
#define CEC_STANDARD_TOLERANCE (0x00000000U)
|
||||
#define CEC_STANDARD_TOLERANCE ((uint32_t)0x00000000U)
|
||||
#define CEC_EXTENDED_TOLERANCE ((uint32_t)CEC_CFGR_RXTOL)
|
||||
/**
|
||||
* @}
|
||||
|
@ -261,7 +289,7 @@ typedef struct
|
|||
/** @defgroup CEC_BRERxStop CEC Reception Stop on Error
|
||||
* @{
|
||||
*/
|
||||
#define CEC_NO_RX_STOP_ON_BRE (0x00000000U)
|
||||
#define CEC_NO_RX_STOP_ON_BRE ((uint32_t)0x00000000U)
|
||||
#define CEC_RX_STOP_ON_BRE ((uint32_t)CEC_CFGR_BRESTP)
|
||||
/**
|
||||
* @}
|
||||
|
@ -270,7 +298,7 @@ typedef struct
|
|||
/** @defgroup CEC_BREErrorBitGen CEC Error Bit Generation if Bit Rise Error reported
|
||||
* @{
|
||||
*/
|
||||
#define CEC_BRE_ERRORBIT_NO_GENERATION (0x00000000U)
|
||||
#define CEC_BRE_ERRORBIT_NO_GENERATION ((uint32_t)0x00000000U)
|
||||
#define CEC_BRE_ERRORBIT_GENERATION ((uint32_t)CEC_CFGR_BREGEN)
|
||||
/**
|
||||
* @}
|
||||
|
@ -279,7 +307,7 @@ typedef struct
|
|||
/** @defgroup CEC_LBPEErrorBitGen CEC Error Bit Generation if Long Bit Period Error reported
|
||||
* @{
|
||||
*/
|
||||
#define CEC_LBPE_ERRORBIT_NO_GENERATION (0x00000000U)
|
||||
#define CEC_LBPE_ERRORBIT_NO_GENERATION ((uint32_t)0x00000000U)
|
||||
#define CEC_LBPE_ERRORBIT_GENERATION ((uint32_t)CEC_CFGR_LBPEGEN)
|
||||
/**
|
||||
* @}
|
||||
|
@ -288,7 +316,7 @@ typedef struct
|
|||
/** @defgroup CEC_BroadCastMsgErrorBitGen CEC Error Bit Generation on Broadcast message
|
||||
* @{
|
||||
*/
|
||||
#define CEC_BROADCASTERROR_ERRORBIT_GENERATION (0x00000000U)
|
||||
#define CEC_BROADCASTERROR_ERRORBIT_GENERATION ((uint32_t)0x00000000U)
|
||||
#define CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION ((uint32_t)CEC_CFGR_BRDNOGEN)
|
||||
/**
|
||||
* @}
|
||||
|
@ -297,7 +325,7 @@ typedef struct
|
|||
/** @defgroup CEC_SFT_Option CEC Signal Free Time start option
|
||||
* @{
|
||||
*/
|
||||
#define CEC_SFT_START_ON_TXSOM (0x00000000U)
|
||||
#define CEC_SFT_START_ON_TXSOM ((uint32_t)0x00000000U)
|
||||
#define CEC_SFT_START_ON_TX_RX_END ((uint32_t)CEC_CFGR_SFTOPT)
|
||||
/**
|
||||
* @}
|
||||
|
@ -306,7 +334,7 @@ typedef struct
|
|||
/** @defgroup CEC_Listening_Mode CEC Listening mode option
|
||||
* @{
|
||||
*/
|
||||
#define CEC_REDUCED_LISTENING_MODE (0x00000000U)
|
||||
#define CEC_REDUCED_LISTENING_MODE ((uint32_t)0x00000000U)
|
||||
#define CEC_FULL_LISTENING_MODE ((uint32_t)CEC_CFGR_LSTN)
|
||||
/**
|
||||
* @}
|
||||
|
@ -315,7 +343,7 @@ typedef struct
|
|||
/** @defgroup CEC_OAR_Position CEC Device Own Address position in CEC CFGR register
|
||||
* @{
|
||||
*/
|
||||
#define CEC_CFGR_OAR_LSB_POS (16U)
|
||||
#define CEC_CFGR_OAR_LSB_POS ((uint32_t) 16U)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -323,7 +351,7 @@ typedef struct
|
|||
/** @defgroup CEC_Initiator_Position CEC Initiator logical address position in message header
|
||||
* @{
|
||||
*/
|
||||
#define CEC_INITIATOR_LSB_POS (4U)
|
||||
#define CEC_INITIATOR_LSB_POS ((uint32_t) 4U)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -332,21 +360,21 @@ typedef struct
|
|||
* @{
|
||||
*/
|
||||
#define CEC_OWN_ADDRESS_NONE ((uint16_t) 0x0000U) /* Reset value */
|
||||
#define CEC_OWN_ADDRESS_0 ((uint16_t) 0x0001U) /* Logical Address 0U */
|
||||
#define CEC_OWN_ADDRESS_1 ((uint16_t) 0x0002U) /* Logical Address 1U */
|
||||
#define CEC_OWN_ADDRESS_2 ((uint16_t) 0x0004U) /* Logical Address 2U */
|
||||
#define CEC_OWN_ADDRESS_3 ((uint16_t) 0x0008U) /* Logical Address 3U */
|
||||
#define CEC_OWN_ADDRESS_4 ((uint16_t) 0x0010U) /* Logical Address 4U */
|
||||
#define CEC_OWN_ADDRESS_5 ((uint16_t) 0x0020U) /* Logical Address 5U */
|
||||
#define CEC_OWN_ADDRESS_6 ((uint16_t) 0x0040U) /* Logical Address 6U */
|
||||
#define CEC_OWN_ADDRESS_7 ((uint16_t) 0x0080U) /* Logical Address 7U */
|
||||
#define CEC_OWN_ADDRESS_8 ((uint16_t) 0x0100U) /* Logical Address 9U */
|
||||
#define CEC_OWN_ADDRESS_9 ((uint16_t) 0x0200U) /* Logical Address 10U */
|
||||
#define CEC_OWN_ADDRESS_10 ((uint16_t) 0x0400U) /* Logical Address 11U */
|
||||
#define CEC_OWN_ADDRESS_11 ((uint16_t) 0x0800U) /* Logical Address 12U */
|
||||
#define CEC_OWN_ADDRESS_12 ((uint16_t) 0x1000U) /* Logical Address 13U */
|
||||
#define CEC_OWN_ADDRESS_13 ((uint16_t) 0x2000U) /* Logical Address 14U */
|
||||
#define CEC_OWN_ADDRESS_14 ((uint16_t) 0x4000U) /* Logical Address 15U */
|
||||
#define CEC_OWN_ADDRESS_0 ((uint16_t) 0x0001U) /* Logical Address 0 */
|
||||
#define CEC_OWN_ADDRESS_1 ((uint16_t) 0x0002U) /* Logical Address 1 */
|
||||
#define CEC_OWN_ADDRESS_2 ((uint16_t) 0x0004U) /* Logical Address 2 */
|
||||
#define CEC_OWN_ADDRESS_3 ((uint16_t) 0x0008U) /* Logical Address 3 */
|
||||
#define CEC_OWN_ADDRESS_4 ((uint16_t) 0x0010U) /* Logical Address 4 */
|
||||
#define CEC_OWN_ADDRESS_5 ((uint16_t) 0x0020U) /* Logical Address 5 */
|
||||
#define CEC_OWN_ADDRESS_6 ((uint16_t) 0x0040U) /* Logical Address 6 */
|
||||
#define CEC_OWN_ADDRESS_7 ((uint16_t) 0x0080U) /* Logical Address 7 */
|
||||
#define CEC_OWN_ADDRESS_8 ((uint16_t) 0x0100U) /* Logical Address 9 */
|
||||
#define CEC_OWN_ADDRESS_9 ((uint16_t) 0x0200U) /* Logical Address 10 */
|
||||
#define CEC_OWN_ADDRESS_10 ((uint16_t) 0x0400U) /* Logical Address 11 */
|
||||
#define CEC_OWN_ADDRESS_11 ((uint16_t) 0x0800U) /* Logical Address 12 */
|
||||
#define CEC_OWN_ADDRESS_12 ((uint16_t) 0x1000U) /* Logical Address 13 */
|
||||
#define CEC_OWN_ADDRESS_13 ((uint16_t) 0x2000U) /* Logical Address 14 */
|
||||
#define CEC_OWN_ADDRESS_14 ((uint16_t) 0x4000U) /* Logical Address 15 */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -395,7 +423,7 @@ typedef struct
|
|||
* @{
|
||||
*/
|
||||
#define CEC_ISR_ALL_ERROR ((uint32_t)CEC_ISR_RXOVR|CEC_ISR_BRE|CEC_ISR_SBPE|CEC_ISR_LBPE|CEC_ISR_RXACKE|\
|
||||
CEC_ISR_ARBLST|CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)
|
||||
CEC_ISR_ARBLST|CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -429,11 +457,19 @@ typedef struct
|
|||
* @param __HANDLE__ CEC handle.
|
||||
* @retval None
|
||||
*/
|
||||
#if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
|
||||
#define __HAL_CEC_RESET_HANDLE_STATE(__HANDLE__) do{ \
|
||||
(__HANDLE__)->gState = HAL_CEC_STATE_RESET; \
|
||||
(__HANDLE__)->RxState = HAL_CEC_STATE_RESET; \
|
||||
} while(0U)
|
||||
|
||||
(__HANDLE__)->MspInitCallback = NULL; \
|
||||
(__HANDLE__)->MspDeInitCallback = NULL; \
|
||||
} while(0)
|
||||
#else
|
||||
#define __HAL_CEC_RESET_HANDLE_STATE(__HANDLE__) do{ \
|
||||
(__HANDLE__)->gState = HAL_CEC_STATE_RESET; \
|
||||
(__HANDLE__)->RxState = HAL_CEC_STATE_RESET; \
|
||||
} while(0)
|
||||
#endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
|
||||
/** @brief Checks whether or not the specified CEC interrupt flag is set.
|
||||
* @param __HANDLE__ specifies the CEC Handle.
|
||||
* @param __FLAG__ specifies the flag to check.
|
||||
|
@ -454,7 +490,7 @@ typedef struct
|
|||
*/
|
||||
#define __HAL_CEC_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR & (__FLAG__))
|
||||
|
||||
/** @brief Clears the interrupt or status flag when raised (write at 1U)
|
||||
/** @brief Clears the interrupt or status flag when raised (write at 1)
|
||||
* @param __HANDLE__ specifies the CEC Handle.
|
||||
* @param __FLAG__ specifies the interrupt/status flag to clear.
|
||||
* This parameter can be one of the following values:
|
||||
|
@ -607,6 +643,15 @@ HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec);
|
|||
HAL_StatusTypeDef HAL_CEC_SetDeviceAddress(CEC_HandleTypeDef *hcec, uint16_t CEC_OwnAddress);
|
||||
void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec);
|
||||
void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec);
|
||||
|
||||
#if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
|
||||
HAL_StatusTypeDef HAL_CEC_RegisterCallback(CEC_HandleTypeDef *hcec, HAL_CEC_CallbackIDTypeDef CallbackID,
|
||||
pCEC_CallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_CEC_UnRegisterCallback(CEC_HandleTypeDef *hcec, HAL_CEC_CallbackIDTypeDef CallbackID);
|
||||
|
||||
HAL_StatusTypeDef HAL_CEC_RegisterRxCpltCallback(CEC_HandleTypeDef *hcec, pCEC_RxCallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_CEC_UnRegisterRxCpltCallback(CEC_HandleTypeDef *hcec);
|
||||
#endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -615,9 +660,10 @@ void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec);
|
|||
* @{
|
||||
*/
|
||||
/* I/O operation functions ***************************************************/
|
||||
HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t InitiatorAddress,uint8_t DestinationAddress, uint8_t *pData, uint32_t Size);
|
||||
HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t InitiatorAddress, uint8_t DestinationAddress,
|
||||
uint8_t *pData, uint32_t Size);
|
||||
uint32_t HAL_CEC_GetLastReceivedFrameSize(CEC_HandleTypeDef *hcec);
|
||||
void HAL_CEC_ChangeRxBuffer(CEC_HandleTypeDef *hcec, uint8_t* Rxbuffer);
|
||||
void HAL_CEC_ChangeRxBuffer(CEC_HandleTypeDef *hcec, uint8_t *Rxbuffer);
|
||||
void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec);
|
||||
void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec);
|
||||
void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec, uint32_t RxFrameSize);
|
||||
|
@ -716,7 +762,7 @@ uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec);
|
|||
* @param __ADDRESS__ CEC initiator or logical address.
|
||||
* @retval Test result (TRUE or FALSE).
|
||||
*/
|
||||
#define IS_CEC_ADDRESS(__ADDRESS__) ((__ADDRESS__) <= 0x0FU)
|
||||
#define IS_CEC_ADDRESS(__ADDRESS__) ((__ADDRESS__) <= 0xFU)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -737,13 +783,12 @@ uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec);
|
|||
* @}
|
||||
*/
|
||||
|
||||
#endif /* defined(STM32F373xC) || defined(STM32F378xx) */
|
||||
#endif /* CEC */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F3xx_HAL_CEC_H */
|
||||
#endif /* STM32F3xxHAL_CEC_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
||||
|
|
|
@ -6,36 +6,20 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_HAL_COMP_H
|
||||
#define __STM32F3xx_HAL_COMP_H
|
||||
#ifndef STM32F3xx_HAL_COMP_H
|
||||
#define STM32F3xx_HAL_COMP_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
@ -105,20 +89,44 @@ typedef enum
|
|||
HAL_COMP_STATE_READY = 0x01U, /*!< COMP initialized and ready for use */
|
||||
HAL_COMP_STATE_READY_LOCKED = 0x11U, /*!< COMP initialized but the configuration is locked */
|
||||
HAL_COMP_STATE_BUSY = 0x02U, /*!< COMP is running */
|
||||
HAL_COMP_STATE_BUSY_LOCKED = 0x12 /*!< COMP is running and the configuration is locked */
|
||||
HAL_COMP_STATE_BUSY_LOCKED = 0x12 /*!< COMP is running and the configuration is locked */
|
||||
} HAL_COMP_StateTypeDef;
|
||||
|
||||
/**
|
||||
* @brief COMP Handle Structure definition
|
||||
*/
|
||||
typedef struct
|
||||
typedef struct __COMP_HandleTypeDef
|
||||
{
|
||||
COMP_TypeDef *Instance; /*!< Register base address */
|
||||
COMP_InitTypeDef Init; /*!< COMP required parameters */
|
||||
HAL_LockTypeDef Lock; /*!< Locking object */
|
||||
__IO HAL_COMP_StateTypeDef State; /*!< COMP communication state */
|
||||
COMP_TypeDef *Instance; /*!< Register base address */
|
||||
COMP_InitTypeDef Init; /*!< COMP required parameters */
|
||||
HAL_LockTypeDef Lock; /*!< Locking object */
|
||||
__IO HAL_COMP_StateTypeDef State; /*!< COMP communication state */
|
||||
__IO uint32_t ErrorCode; /*!< COMP Error code */
|
||||
#if (USE_HAL_COMP_REGISTER_CALLBACKS == 1)
|
||||
void (* TriggerCallback)(struct __COMP_HandleTypeDef *hcomp); /*!< COMP trigger callback */
|
||||
void (* MspInitCallback)(struct __COMP_HandleTypeDef *hcomp); /*!< COMP Msp Init callback */
|
||||
void (* MspDeInitCallback)(struct __COMP_HandleTypeDef *hcomp); /*!< COMP Msp DeInit callback */
|
||||
#endif /* USE_HAL_COMP_REGISTER_CALLBACKS */
|
||||
} COMP_HandleTypeDef;
|
||||
|
||||
#if (USE_HAL_COMP_REGISTER_CALLBACKS == 1)
|
||||
/**
|
||||
* @brief HAL COMP Callback ID enumeration definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_COMP_TRIGGER_CB_ID = 0x00U, /*!< COMP trigger callback ID */
|
||||
HAL_COMP_MSPINIT_CB_ID = 0x01U, /*!< COMP Msp Init callback ID */
|
||||
HAL_COMP_MSPDEINIT_CB_ID = 0x02U /*!< COMP Msp DeInit callback ID */
|
||||
} HAL_COMP_CallbackIDTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL COMP Callback pointer definition
|
||||
*/
|
||||
typedef void (*pCOMP_CallbackTypeDef)(COMP_HandleTypeDef *hcomp); /*!< pointer to a COMP callback function */
|
||||
|
||||
#endif /* USE_HAL_COMP_REGISTER_CALLBACKS */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -128,6 +136,17 @@ typedef struct
|
|||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup COMP_Error_Code COMP Error Code
|
||||
* @{
|
||||
*/
|
||||
#define HAL_COMP_ERROR_NONE (0x00U) /*!< No error */
|
||||
#if (USE_HAL_COMP_REGISTER_CALLBACKS == 1)
|
||||
#define HAL_COMP_ERROR_INVALID_CALLBACK (0x01U) /*!< Invalid Callback error */
|
||||
#endif /* USE_HAL_COMP_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup COMP_OutputPolarity COMP Output Polarity
|
||||
* @{
|
||||
*/
|
||||
|
@ -185,7 +204,24 @@ typedef struct
|
|||
* @param __HANDLE__ COMP handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_COMP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_COMP_STATE_RESET)
|
||||
|
||||
#if (USE_HAL_COMP_REGISTER_CALLBACKS == 1)
|
||||
#define __HAL_COMP_RESET_HANDLE_STATE(__HANDLE__) do{ \
|
||||
(__HANDLE__)->State = HAL_COMP_STATE_RESET; \
|
||||
(__HANDLE__)->MspInitCallback = NULL; \
|
||||
(__HANDLE__)->MspDeInitCallback = NULL; \
|
||||
} while(0)
|
||||
#else
|
||||
#define __HAL_COMP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_COMP_STATE_RESET)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Clear COMP error code (set it to no error code "HAL_COMP_ERROR_NONE").
|
||||
* @param __HANDLE__ COMP handle
|
||||
* @retval None
|
||||
*/
|
||||
#define COMP_CLEAR_ERRORCODE(__HANDLE__) ((__HANDLE__)->ErrorCode = HAL_COMP_ERROR_NONE)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -205,6 +241,13 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp);
|
|||
HAL_StatusTypeDef HAL_COMP_DeInit(COMP_HandleTypeDef *hcomp);
|
||||
void HAL_COMP_MspInit(COMP_HandleTypeDef *hcomp);
|
||||
void HAL_COMP_MspDeInit(COMP_HandleTypeDef *hcomp);
|
||||
|
||||
#if (USE_HAL_COMP_REGISTER_CALLBACKS == 1)
|
||||
/* Callbacks Register/UnRegister functions ***********************************/
|
||||
HAL_StatusTypeDef HAL_COMP_RegisterCallback(COMP_HandleTypeDef *hcomp, HAL_COMP_CallbackIDTypeDef CallbackID, pCOMP_CallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_COMP_UnRegisterCallback(COMP_HandleTypeDef *hcomp, HAL_COMP_CallbackIDTypeDef CallbackID);
|
||||
#endif /* USE_HAL_COMP_REGISTER_CALLBACKS */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -239,6 +282,7 @@ uint32_t HAL_COMP_GetOutputLevel(COMP_HandleTypeDef *hcomp);
|
|||
* @{
|
||||
*/
|
||||
HAL_COMP_StateTypeDef HAL_COMP_GetState(COMP_HandleTypeDef *hcomp);
|
||||
uint32_t HAL_COMP_GetError(COMP_HandleTypeDef *hcomp);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -287,6 +331,6 @@ HAL_COMP_StateTypeDef HAL_COMP_GetState(COMP_HandleTypeDef *hcomp);
|
|||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F3xx_HAL_COMP_H */
|
||||
#endif /* STM32F3xx_HAL_COMP_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
|
@ -6,29 +6,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
@ -2503,7 +2487,7 @@ extern "C" {
|
|||
((OUTPUT) == COMP_OUTPUT_TIM8BKIN) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM1BKIN2) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM8BKIN2) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM2OCREFCLR) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM15OCREFCLR) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM20BKIN) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM20BKIN2) || \
|
||||
|
@ -2514,8 +2498,8 @@ extern "C" {
|
|||
((OUTPUT) == COMP_OUTPUT_TIM15BKIN) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM8OCREFCLR) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM3IC3) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM4IC1) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM15IC1) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM4IC2) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM15IC2) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM2IC1) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM4IC3) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM16BKIN) || \
|
||||
|
@ -2575,9 +2559,12 @@ extern "C" {
|
|||
((OUTPUT) == COMP_OUTPUT_TIM20BKIN) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM20BKIN2) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2_TIM20BKIN2) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM1OCREFCLR) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM3IC2) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM2OCREFCLR) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM4IC1) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM15IC1) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM3OCREFCLR) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM15BKIN))) \
|
||||
|| \
|
||||
(((INSTANCE) == COMP4) && \
|
||||
|
@ -2594,6 +2581,7 @@ extern "C" {
|
|||
((OUTPUT) == COMP_OUTPUT_TIM4IC2) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM8OCREFCLR) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM15IC2) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM3OCREFCLR) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM15OCREFCLR))) \
|
||||
|| \
|
||||
(((INSTANCE) == COMP5) && \
|
||||
|
@ -2607,8 +2595,10 @@ extern "C" {
|
|||
((OUTPUT) == COMP_OUTPUT_TIM20BKIN2) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2_TIM20BKIN2) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM2IC1) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM8OCREFCLR) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM4IC3) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM16BKIN) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM3OCREFCLR) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM17IC1))) \
|
||||
|| \
|
||||
(((INSTANCE) == COMP6) && \
|
||||
|
@ -2622,6 +2612,7 @@ extern "C" {
|
|||
((OUTPUT) == COMP_OUTPUT_TIM20BKIN2) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2_TIM20BKIN2) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM2IC2) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM8OCREFCLR) || \
|
||||
((OUTPUT) == COMP_OUTPUT_COMP6_TIM2OCREFCLR) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM4IC4) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM16IC1) || \
|
||||
|
@ -2634,6 +2625,8 @@ extern "C" {
|
|||
((OUTPUT) == COMP_OUTPUT_TIM8BKIN) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM8BKIN2) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM1OCREFCLR) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM8OCREFCLR) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM20BKIN) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM20BKIN2) || \
|
||||
((OUTPUT) == COMP_OUTPUT_TIM1BKIN2_TIM8BKIN2_TIM20BKIN2) || \
|
||||
|
|
|
@ -6,29 +6,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
@ -64,6 +48,7 @@
|
|||
#define HAL_NAND_MODULE_ENABLED
|
||||
#define HAL_PCCARD_MODULE_ENABLED
|
||||
#define HAL_GPIO_MODULE_ENABLED
|
||||
#define HAL_EXTI_MODULE_ENABLED
|
||||
#define HAL_HRTIM_MODULE_ENABLED
|
||||
#define HAL_I2C_MODULE_ENABLED
|
||||
#define HAL_I2S_MODULE_ENABLED
|
||||
|
@ -167,6 +152,32 @@
|
|||
#define DATA_CACHE_ENABLE 0U
|
||||
#define USE_SPI_CRC 1U
|
||||
|
||||
#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */
|
||||
#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */
|
||||
#define USE_HAL_COMP_REGISTER_CALLBACKS 0U /* COMP register callback disabled */
|
||||
#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */
|
||||
#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */
|
||||
#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */
|
||||
#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */
|
||||
#define USE_HAL_SDADC_REGISTER_CALLBACKS 0U /* SDADC register callback disabled */
|
||||
#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */
|
||||
#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */
|
||||
#define USE_HAL_PCCARD_REGISTER_CALLBACKS 0U /* PCCARD register callback disabled */
|
||||
#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U /* HRTIM register callback disabled */
|
||||
#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */
|
||||
#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */
|
||||
#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */
|
||||
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */
|
||||
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */
|
||||
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */
|
||||
#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U /* OPAMP register callback disabled */
|
||||
#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */
|
||||
#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */
|
||||
#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */
|
||||
#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */
|
||||
#define USE_HAL_TSC_REGISTER_CALLBACKS 0U /* TSC register callback disabled */
|
||||
#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */
|
||||
|
||||
/* ########################## Assert Selection ############################## */
|
||||
/**
|
||||
* @brief Uncomment the line below to expanse the "assert_param" macro in the
|
||||
|
@ -187,6 +198,10 @@
|
|||
#include "stm32f3xx_hal_gpio.h"
|
||||
#endif /* HAL_GPIO_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_EXTI_MODULE_ENABLED
|
||||
#include "stm32f3xx_hal_exti.h"
|
||||
#endif /* HAL_EXTI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DMA_MODULE_ENABLED
|
||||
#include "stm32f3xx_hal_dma.h"
|
||||
#endif /* HAL_DMA_MODULE_ENABLED */
|
||||
|
@ -325,9 +340,9 @@
|
|||
* If expr is true, it returns no value.
|
||||
* @retval None
|
||||
*/
|
||||
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((char *)__FILE__, __LINE__))
|
||||
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void assert_failed(char* file, uint32_t line);
|
||||
void assert_failed(uint8_t* file, uint32_t line);
|
||||
#else
|
||||
#define assert_param(expr) ((void)0U)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
|
|
@ -6,29 +6,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
|
|
@ -6,39 +6,23 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_HAL_CRC_H
|
||||
#define __STM32F3xx_HAL_CRC_H
|
||||
#ifndef STM32F3xx_HAL_CRC_H
|
||||
#define STM32F3xx_HAL_CRC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
|
@ -48,7 +32,7 @@
|
|||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup CRC CRC
|
||||
/** @addtogroup CRC
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
@ -56,6 +40,7 @@
|
|||
/** @defgroup CRC_Exported_Types CRC Exported Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief CRC HAL State Structure definition
|
||||
*/
|
||||
|
@ -65,9 +50,8 @@ typedef enum
|
|||
HAL_CRC_STATE_READY = 0x01U, /*!< CRC initialized and ready for use */
|
||||
HAL_CRC_STATE_BUSY = 0x02U, /*!< CRC internal process is ongoing */
|
||||
HAL_CRC_STATE_TIMEOUT = 0x03U, /*!< CRC timeout state */
|
||||
HAL_CRC_STATE_ERROR = 0x04 /*!< CRC error state */
|
||||
}HAL_CRC_StateTypeDef;
|
||||
|
||||
HAL_CRC_STATE_ERROR = 0x04U /*!< CRC error state */
|
||||
} HAL_CRC_StateTypeDef;
|
||||
|
||||
/**
|
||||
* @brief CRC Init Structure definition
|
||||
|
@ -76,7 +60,7 @@ typedef struct
|
|||
{
|
||||
uint8_t DefaultPolynomialUse; /*!< This parameter is a value of @ref CRC_Default_Polynomial and indicates if default polynomial is used.
|
||||
If set to DEFAULT_POLYNOMIAL_ENABLE, resort to default
|
||||
X^32U + X^26U + X^23U + X^22U + X^16U + X^12U + X^11U + X^10U +X^8U + X^7U + X^5U + X^4U + X^2U+ X +1.
|
||||
X^32 + X^26 + X^23 + X^22 + X^16 + X^12 + X^11 + X^10 +X^8 + X^7 + X^5 + X^4 + X^2+ X +1.
|
||||
In that case, there is no need to set GeneratingPolynomial field.
|
||||
If otherwise set to DEFAULT_POLYNOMIAL_DISABLE, GeneratingPolynomial and CRCLength fields must be set. */
|
||||
|
||||
|
@ -85,34 +69,33 @@ typedef struct
|
|||
0xFFFFFFFF value. In that case, there is no need to set InitValue field.
|
||||
If otherwise set to DEFAULT_INIT_VALUE_DISABLE, InitValue field must be set. */
|
||||
|
||||
uint32_t GeneratingPolynomial; /*!< Set CRC generating polynomial as a 7U, 8U, 16 or 32-bit long value for a polynomial degree
|
||||
respectively equal to 7U, 8U, 16 or 32. This field is written in normal representation,
|
||||
e.g., for a polynomial of degree 7U, X^7U + X^6U + X^5U + X^2U + 1 is written 0x65.
|
||||
uint32_t GeneratingPolynomial; /*!< Set CRC generating polynomial as a 7, 8, 16 or 32-bit long value for a polynomial degree
|
||||
respectively equal to 7, 8, 16 or 32. This field is written in normal representation,
|
||||
e.g., for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1 is written 0x65.
|
||||
No need to specify it if DefaultPolynomialUse is set to DEFAULT_POLYNOMIAL_ENABLE. */
|
||||
|
||||
uint32_t CRCLength; /*!< This parameter is a value of @ref CRC_Polynomial_Sizes and indicates CRC length.
|
||||
Value can be either one of
|
||||
@arg CRC_POLYLENGTH_32B (32-bit CRC),
|
||||
@arg CRC_POLYLENGTH_16B (16-bit CRC),
|
||||
@arg CRC_POLYLENGTH_8B (8-bit CRC),
|
||||
@arg CRC_POLYLENGTH_7B (7-bit CRC). */
|
||||
@arg @ref CRC_POLYLENGTH_32B (32-bit CRC),
|
||||
@arg @ref CRC_POLYLENGTH_16B (16-bit CRC),
|
||||
@arg @ref CRC_POLYLENGTH_8B (8-bit CRC),
|
||||
@arg @ref CRC_POLYLENGTH_7B (7-bit CRC). */
|
||||
|
||||
uint32_t InitValue; /*!< Init value to initiate CRC computation. No need to specify it if DefaultInitValueUse
|
||||
is set to DEFAULT_INIT_VALUE_ENABLE. */
|
||||
|
||||
uint32_t InputDataInversionMode; /*!< This parameter is a value of @ref CRCEx_Input_Data_Inversion and specifies input data inversion mode.
|
||||
Can be either one of the following values
|
||||
@arg CRC_INPUTDATA_INVERSION_NONE, no input data inversion
|
||||
@arg CRC_INPUTDATA_INVERSION_BYTE, byte-wise inversion, 0x1A2B3C4D becomes 0x58D43CB2
|
||||
@arg CRC_INPUTDATA_INVERSION_HALFWORD, halfword-wise inversion, 0x1A2B3C4D becomes 0xD458B23C
|
||||
@arg CRC_INPUTDATA_INVERSION_WORD, word-wise inversion, 0x1A2B3C4D becomes 0xB23CD458U */
|
||||
@arg @ref CRC_INPUTDATA_INVERSION_NONE no input data inversion
|
||||
@arg @ref CRC_INPUTDATA_INVERSION_BYTE byte-wise inversion, 0x1A2B3C4D becomes 0x58D43CB2
|
||||
@arg @ref CRC_INPUTDATA_INVERSION_HALFWORD halfword-wise inversion, 0x1A2B3C4D becomes 0xD458B23C
|
||||
@arg @ref CRC_INPUTDATA_INVERSION_WORD word-wise inversion, 0x1A2B3C4D becomes 0xB23CD458 */
|
||||
|
||||
uint32_t OutputDataInversionMode; /*!< This parameter is a value of @ref CRCEx_Output_Data_Inversion and specifies output data (i.e. CRC) inversion mode.
|
||||
Can be either
|
||||
@arg CRC_OUTPUTDATA_INVERSION_DISABLE: no CRC inversion,
|
||||
@arg CRC_OUTPUTDATA_INVERSION_ENABLE: CRC 0x11223344 is converted into 0x22CC4488U */
|
||||
}CRC_InitTypeDef;
|
||||
|
||||
@arg @ref CRC_OUTPUTDATA_INVERSION_DISABLE no CRC inversion,
|
||||
@arg @ref CRC_OUTPUTDATA_INVERSION_ENABLE CRC 0x11223344 is converted into 0x22CC4488 */
|
||||
} CRC_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief CRC Handle Structure definition
|
||||
|
@ -129,13 +112,13 @@ typedef struct
|
|||
|
||||
uint32_t InputDataFormat; /*!< This parameter is a value of @ref CRC_Input_Buffer_Format and specifies input data format.
|
||||
Can be either
|
||||
@arg CRC_INPUTDATA_FORMAT_BYTES, input data is a stream of bytes (8-bit data)
|
||||
@arg CRC_INPUTDATA_FORMAT_HALFWORDS, input data is a stream of half-words (16-bit data)
|
||||
@arg CRC_INPUTDATA_FORMAT_WORDS, input data is a stream of words (32-bit data)
|
||||
@arg @ref CRC_INPUTDATA_FORMAT_BYTES input data is a stream of bytes (8-bit data)
|
||||
@arg @ref CRC_INPUTDATA_FORMAT_HALFWORDS input data is a stream of half-words (16-bit data)
|
||||
@arg @ref CRC_INPUTDATA_FORMAT_WORDS input data is a stream of words (32-bit data)
|
||||
|
||||
Note that constant CRC_INPUT_FORMAT_UNDEFINED is defined but an initialization error
|
||||
must occur if InputBufferFormat is not one of the three values listed above */
|
||||
}CRC_HandleTypeDef;
|
||||
} CRC_HandleTypeDef;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -144,11 +127,11 @@ typedef struct
|
|||
/** @defgroup CRC_Exported_Constants CRC Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup CRC_Default_Polynomial_Value Default CRC generating polynomial
|
||||
* @{
|
||||
*/
|
||||
#define DEFAULT_CRC32_POLY 0x04C11DB7 /*!< X^32U + X^26U + X^23U + X^22U + X^16U + X^12U + X^11U + X^10U +X^8U + X^7U + X^5U + X^4U + X^2U+ X +1U */
|
||||
|
||||
#define DEFAULT_CRC32_POLY 0x04C11DB7U /*!< X^32 + X^26 + X^23 + X^22 + X^16 + X^12 + X^11 + X^10 +X^8 + X^7 + X^5 + X^4 + X^2+ X +1 */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -156,8 +139,7 @@ typedef struct
|
|||
/** @defgroup CRC_Default_InitValue Default CRC computation initialization value
|
||||
* @{
|
||||
*/
|
||||
#define DEFAULT_CRC_INITVALUE 0xFFFFFFFFU /*!< Initial CRC default value */
|
||||
|
||||
#define DEFAULT_CRC_INITVALUE 0xFFFFFFFFU /*!< Initial CRC default value */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -165,8 +147,8 @@ typedef struct
|
|||
/** @defgroup CRC_Default_Polynomial Indicates whether or not default polynomial is used
|
||||
* @{
|
||||
*/
|
||||
#define DEFAULT_POLYNOMIAL_ENABLE ((uint8_t)0x00U) /*!< Enable default generating polynomial 0x04C11DB7 */
|
||||
#define DEFAULT_POLYNOMIAL_DISABLE ((uint8_t)0x01U) /*!< Disable default generating polynomial 0x04C11DB7U */
|
||||
#define DEFAULT_POLYNOMIAL_ENABLE ((uint8_t)0x00U) /*!< Enable default generating polynomial 0x04C11DB7 */
|
||||
#define DEFAULT_POLYNOMIAL_DISABLE ((uint8_t)0x01U) /*!< Disable default generating polynomial 0x04C11DB7 */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -174,19 +156,19 @@ typedef struct
|
|||
/** @defgroup CRC_Default_InitValue_Use Indicates whether or not default init value is used
|
||||
* @{
|
||||
*/
|
||||
#define DEFAULT_INIT_VALUE_ENABLE ((uint8_t)0x00U) /*!< Enable initial CRC default value */
|
||||
#define DEFAULT_INIT_VALUE_DISABLE ((uint8_t)0x01U) /*!< Disable initial CRC default value */
|
||||
#define DEFAULT_INIT_VALUE_ENABLE ((uint8_t)0x00U) /*!< Enable initial CRC default value */
|
||||
#define DEFAULT_INIT_VALUE_DISABLE ((uint8_t)0x01U) /*!< Disable initial CRC default value */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CRC_Polynomial_Sizes Polynomial sizes to configure the IP
|
||||
/** @defgroup CRC_Polynomial_Sizes Polynomial sizes to configure the peripheral
|
||||
* @{
|
||||
*/
|
||||
#define CRC_POLYLENGTH_32B (0x00000000U) /*!< Resort to a 32-bit long generating polynomial */
|
||||
#define CRC_POLYLENGTH_16B ((uint32_t)CRC_CR_POLYSIZE_0) /*!< Resort to a 16-bit long generating polynomial */
|
||||
#define CRC_POLYLENGTH_8B ((uint32_t)CRC_CR_POLYSIZE_1) /*!< Resort to a 8-bit long generating polynomial */
|
||||
#define CRC_POLYLENGTH_7B ((uint32_t)CRC_CR_POLYSIZE) /*!< Resort to a 7-bit long generating polynomial */
|
||||
#define CRC_POLYLENGTH_32B 0x00000000U /*!< Resort to a 32-bit long generating polynomial */
|
||||
#define CRC_POLYLENGTH_16B CRC_CR_POLYSIZE_0 /*!< Resort to a 16-bit long generating polynomial */
|
||||
#define CRC_POLYLENGTH_8B CRC_CR_POLYSIZE_1 /*!< Resort to a 8-bit long generating polynomial */
|
||||
#define CRC_POLYLENGTH_7B CRC_CR_POLYSIZE /*!< Resort to a 7-bit long generating polynomial */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -194,11 +176,10 @@ typedef struct
|
|||
/** @defgroup CRC_Polynomial_Size_Definitions CRC polynomial possible sizes actual definitions
|
||||
* @{
|
||||
*/
|
||||
#define HAL_CRC_LENGTH_32B 32 /*!< 32-bit long CRC */
|
||||
#define HAL_CRC_LENGTH_16B 16 /*!< 16-bit long CRC */
|
||||
#define HAL_CRC_LENGTH_8B 8 /*!< 8-bit long CRC */
|
||||
#define HAL_CRC_LENGTH_7B 7 /*!< 7-bit long CRC */
|
||||
|
||||
#define HAL_CRC_LENGTH_32B 32U /*!< 32-bit long CRC */
|
||||
#define HAL_CRC_LENGTH_16B 16U /*!< 16-bit long CRC */
|
||||
#define HAL_CRC_LENGTH_8B 8U /*!< 8-bit long CRC */
|
||||
#define HAL_CRC_LENGTH_7B 7U /*!< 7-bit long CRC */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -210,10 +191,19 @@ typedef struct
|
|||
* an error is triggered in HAL_CRC_Init() if InputDataFormat field is set
|
||||
* to CRC_INPUT_FORMAT_UNDEFINED: the format MUST be defined by the user for
|
||||
* the CRC APIs to provide a correct result */
|
||||
#define CRC_INPUTDATA_FORMAT_UNDEFINED (0x00000000U) /*!< Undefined input data format */
|
||||
#define CRC_INPUTDATA_FORMAT_BYTES (0x00000001U) /*!< Input data in byte format */
|
||||
#define CRC_INPUTDATA_FORMAT_HALFWORDS (0x00000002U) /*!< Input data in half-word format */
|
||||
#define CRC_INPUTDATA_FORMAT_WORDS (0x00000003U) /*!< Input data in word format */
|
||||
#define CRC_INPUTDATA_FORMAT_UNDEFINED 0x00000000U /*!< Undefined input data format */
|
||||
#define CRC_INPUTDATA_FORMAT_BYTES 0x00000001U /*!< Input data in byte format */
|
||||
#define CRC_INPUTDATA_FORMAT_HALFWORDS 0x00000002U /*!< Input data in half-word format */
|
||||
#define CRC_INPUTDATA_FORMAT_WORDS 0x00000003U /*!< Input data in word format */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CRC_Aliases CRC API aliases
|
||||
* @{
|
||||
*/
|
||||
#define HAL_CRC_Input_Data_Reverse HAL_CRCEx_Input_Data_Reverse /*!< Aliased to HAL_CRCEx_Input_Data_Reverse for inter STM32 series compatibility */
|
||||
#define HAL_CRC_Output_Data_Reverse HAL_CRCEx_Output_Data_Reverse /*!< Aliased to HAL_CRCEx_Output_Data_Reverse for inter STM32 series compatibility */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -223,7 +213,6 @@ typedef struct
|
|||
*/
|
||||
|
||||
/* Exported macros -----------------------------------------------------------*/
|
||||
|
||||
/** @defgroup CRC_Exported_Macros CRC Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
@ -243,24 +232,26 @@ typedef struct
|
|||
|
||||
/**
|
||||
* @brief Set CRC INIT non-default value
|
||||
* @param __HANDLE__ CRC handle
|
||||
* @param __HANDLE__ CRC handle
|
||||
* @param __INIT__ 32-bit initial value
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_CRC_INITIALCRCVALUE_CONFIG(__HANDLE__, __INIT__) ((__HANDLE__)->Instance->INIT = (__INIT__))
|
||||
|
||||
/**
|
||||
* @brief Store a 8-bit data in the Independent Data(ID) register.
|
||||
* @brief Store data in the Independent Data (ID) register.
|
||||
* @param __HANDLE__ CRC handle
|
||||
* @param __VALUE__ 8-bit value to be stored in the ID register
|
||||
* @param __VALUE__ Value to be stored in the ID register
|
||||
* @note Refer to the Reference Manual to get the authorized __VALUE__ length in bits
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_CRC_SET_IDR(__HANDLE__, __VALUE__) (WRITE_REG((__HANDLE__)->Instance->IDR, (__VALUE__)))
|
||||
|
||||
/**
|
||||
* @brief Return the 8-bit data stored in the Independent Data(ID) register.
|
||||
* @brief Return the data stored in the Independent Data (ID) register.
|
||||
* @param __HANDLE__ CRC handle
|
||||
* @retval 8-bit value of the ID register
|
||||
* @note Refer to the Reference Manual to get the authorized __VALUE__ length in bits
|
||||
* @retval Value of the ID register
|
||||
*/
|
||||
#define __HAL_CRC_GET_IDR(__HANDLE__) (((__HANDLE__)->Instance->IDR) & CRC_IDR_IDR)
|
||||
/**
|
||||
|
@ -269,14 +260,13 @@ typedef struct
|
|||
|
||||
|
||||
/* Private macros --------------------------------------------------------*/
|
||||
/** @addtogroup CRC_Private_Macros CRC Private Macros
|
||||
/** @defgroup CRC_Private_Macros CRC Private Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define IS_DEFAULT_POLYNOMIAL(DEFAULT) (((DEFAULT) == DEFAULT_POLYNOMIAL_ENABLE) || \
|
||||
((DEFAULT) == DEFAULT_POLYNOMIAL_DISABLE))
|
||||
|
||||
|
||||
#define IS_DEFAULT_INIT_VALUE(VALUE) (((VALUE) == DEFAULT_INIT_VALUE_ENABLE) || \
|
||||
((VALUE) == DEFAULT_INIT_VALUE_DISABLE))
|
||||
|
||||
|
@ -285,7 +275,7 @@ typedef struct
|
|||
((LENGTH) == CRC_POLYLENGTH_8B) || \
|
||||
((LENGTH) == CRC_POLYLENGTH_7B))
|
||||
|
||||
#define IS_CRC_INPUTDATA_FORMAT(FORMAT) (((FORMAT) == CRC_INPUTDATA_FORMAT_BYTES) || \
|
||||
#define IS_CRC_INPUTDATA_FORMAT(FORMAT) (((FORMAT) == CRC_INPUTDATA_FORMAT_BYTES) || \
|
||||
((FORMAT) == CRC_INPUTDATA_FORMAT_HALFWORDS) || \
|
||||
((FORMAT) == CRC_INPUTDATA_FORMAT_WORDS))
|
||||
|
||||
|
@ -297,54 +287,41 @@ typedef struct
|
|||
#include "stm32f3xx_hal_crc_ex.h"
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @addtogroup CRC_Exported_Functions CRC Exported Functions
|
||||
/** @defgroup CRC_Exported_Functions CRC Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup CRC_Exported_Functions_Group1 Initialization and de-initialization functions
|
||||
* @brief Initialization and Configuration functions.
|
||||
* @{
|
||||
*/
|
||||
/* Initialization and de-initialization functions ****************************/
|
||||
/** @defgroup CRC_Exported_Functions_Group1 Initialization and de-initialization functions
|
||||
* @{
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc);
|
||||
HAL_StatusTypeDef HAL_CRC_DeInit (CRC_HandleTypeDef *hcrc);
|
||||
HAL_StatusTypeDef HAL_CRC_DeInit(CRC_HandleTypeDef *hcrc);
|
||||
void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc);
|
||||
void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup CRC_Exported_Functions_Group2 Peripheral Control functions
|
||||
* @brief management functions.
|
||||
* @{
|
||||
*/
|
||||
/* Peripheral Control functions ***********************************************/
|
||||
/** @defgroup CRC_Exported_Functions_Group2 Peripheral Control functions
|
||||
* @{
|
||||
*/
|
||||
uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
|
||||
uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup CRC_Exported_Functions_Group3 Peripheral State functions
|
||||
* @brief Peripheral State functions.
|
||||
* @{
|
||||
*/
|
||||
/* Peripheral State and Error functions ***************************************/
|
||||
/** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions
|
||||
* @{
|
||||
*/
|
||||
HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_CRC_Alias_Exported_Functions CRC aliases for Exported Functions
|
||||
* @{
|
||||
*/
|
||||
/* Aliases for inter STM32 series compatibility */
|
||||
#define HAL_CRC_Input_Data_Reverse HAL_CRCEx_Input_Data_Reverse
|
||||
#define HAL_CRC_Output_Data_Reverse HAL_CRCEx_Output_Data_Reverse
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -361,6 +338,6 @@ HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc);
|
|||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F3xx_HAL_CRC_H */
|
||||
#endif /* STM32F3xx_HAL_CRC_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
|
@ -2,43 +2,27 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_crc_ex.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of CRC HAL extension module.
|
||||
* @brief Header file of CRC HAL extended module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_HAL_CRC_EX_H
|
||||
#define __STM32F3xx_HAL_CRC_EX_H
|
||||
#ifndef STM32F3xx_HAL_CRC_EX_H
|
||||
#define STM32F3xx_HAL_CRC_EX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
|
@ -48,7 +32,7 @@
|
|||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup CRCEx CRCEx
|
||||
/** @addtogroup CRCEx
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
@ -58,22 +42,22 @@
|
|||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup CRCEx_Input_Data_Inversion CRC Extended Input Data Inversion Modes
|
||||
/** @defgroup CRCEx_Input_Data_Inversion Input Data Inversion Modes
|
||||
* @{
|
||||
*/
|
||||
#define CRC_INPUTDATA_INVERSION_NONE (0x00000000U) /*!< No input data inversion */
|
||||
#define CRC_INPUTDATA_INVERSION_BYTE ((uint32_t)CRC_CR_REV_IN_0) /*!< Byte-wise input data inversion */
|
||||
#define CRC_INPUTDATA_INVERSION_HALFWORD ((uint32_t)CRC_CR_REV_IN_1) /*!< HalfWord-wise input data inversion */
|
||||
#define CRC_INPUTDATA_INVERSION_WORD ((uint32_t)CRC_CR_REV_IN) /*!< Word-wise input data inversion */
|
||||
#define CRC_INPUTDATA_INVERSION_NONE 0x00000000U /*!< No input data inversion */
|
||||
#define CRC_INPUTDATA_INVERSION_BYTE CRC_CR_REV_IN_0 /*!< Byte-wise input data inversion */
|
||||
#define CRC_INPUTDATA_INVERSION_HALFWORD CRC_CR_REV_IN_1 /*!< HalfWord-wise input data inversion */
|
||||
#define CRC_INPUTDATA_INVERSION_WORD CRC_CR_REV_IN /*!< Word-wise input data inversion */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CRCEx_Output_Data_Inversion CRC Extended Output Data Inversion Modes
|
||||
/** @defgroup CRCEx_Output_Data_Inversion Output Data Inversion Modes
|
||||
* @{
|
||||
*/
|
||||
#define CRC_OUTPUTDATA_INVERSION_DISABLE (0x00000000U) /*!< No output data inversion */
|
||||
#define CRC_OUTPUTDATA_INVERSION_ENABLE ((uint32_t)CRC_CR_REV_OUT) /*!< Bit-wise output data inversion */
|
||||
#define CRC_OUTPUTDATA_INVERSION_DISABLE 0x00000000U /*!< No output data inversion */
|
||||
#define CRC_OUTPUTDATA_INVERSION_ENABLE CRC_CR_REV_OUT /*!< Bit-wise output data inversion */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -83,7 +67,6 @@
|
|||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
|
||||
/** @defgroup CRCEx_Exported_Macros CRC Extended Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
@ -91,14 +74,14 @@
|
|||
/**
|
||||
* @brief Set CRC output reversal
|
||||
* @param __HANDLE__ CRC handle
|
||||
* @retval None.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_CRC_OUTPUTREVERSAL_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_REV_OUT)
|
||||
|
||||
/**
|
||||
* @brief Unset CRC output reversal
|
||||
* @param __HANDLE__ CRC handle
|
||||
* @retval None.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_CRC_OUTPUTREVERSAL_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(CRC_CR_REV_OUT))
|
||||
|
||||
|
@ -106,7 +89,7 @@
|
|||
* @brief Set CRC non-default polynomial
|
||||
* @param __HANDLE__ CRC handle
|
||||
* @param __POLYNOMIAL__ 7, 8, 16 or 32-bit polynomial
|
||||
* @retval None.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_CRC_POLYNOMIAL_CONFIG(__HANDLE__, __POLYNOMIAL__) ((__HANDLE__)->Instance->POL = (__POLYNOMIAL__))
|
||||
|
||||
|
@ -115,16 +98,15 @@
|
|||
*/
|
||||
|
||||
/* Private macros --------------------------------------------------------*/
|
||||
/** @addtogroup CRCEx_Private_Macros CRCEx Private Macros
|
||||
/** @defgroup CRCEx_Private_Macros CRC Extended Private Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define IS_CRC_INPUTDATA_INVERSION_MODE(MODE) (((MODE) == CRC_INPUTDATA_INVERSION_NONE) || \
|
||||
((MODE) == CRC_INPUTDATA_INVERSION_BYTE) || \
|
||||
#define IS_CRC_INPUTDATA_INVERSION_MODE(MODE) (((MODE) == CRC_INPUTDATA_INVERSION_NONE) || \
|
||||
((MODE) == CRC_INPUTDATA_INVERSION_BYTE) || \
|
||||
((MODE) == CRC_INPUTDATA_INVERSION_HALFWORD) || \
|
||||
((MODE) == CRC_INPUTDATA_INVERSION_WORD))
|
||||
|
||||
|
||||
#define IS_CRC_OUTPUTDATA_INVERSION_MODE(MODE) (((MODE) == CRC_OUTPUTDATA_INVERSION_DISABLE) || \
|
||||
((MODE) == CRC_OUTPUTDATA_INVERSION_ENABLE))
|
||||
|
||||
|
@ -133,25 +115,23 @@
|
|||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @addtogroup CRCEx_Exported_Functions CRC Extended Exported Functions
|
||||
|
||||
/** @addtogroup CRCEx_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup CRCEx_Exported_Functions_Group1 CRC Extended Initialization and de-initialization functions
|
||||
* @brief Extended Initialization and Configuration functions.
|
||||
/** @addtogroup CRCEx_Exported_Functions_Group1
|
||||
* @{
|
||||
*/
|
||||
/* Initialization and de-initialization functions ****************************/
|
||||
HAL_StatusTypeDef HAL_CRCEx_Polynomial_Set(CRC_HandleTypeDef *hcrc, uint32_t Pol, uint32_t PolyLength);
|
||||
HAL_StatusTypeDef HAL_CRCEx_Input_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t InputReverseMode);
|
||||
HAL_StatusTypeDef HAL_CRCEx_Output_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t OutputReverseMode);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Peripheral Control functions ***********************************************/
|
||||
/* Peripheral State and Error functions ***************************************/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -168,6 +148,6 @@ HAL_StatusTypeDef HAL_CRCEx_Output_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_
|
|||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F3xx_HAL_CRC_EX_H */
|
||||
#endif /* STM32F3xx_HAL_CRC_EX_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
|
@ -6,36 +6,20 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_HAL_DAC_H
|
||||
#define __STM32F3xx_HAL_DAC_H
|
||||
#ifndef STM32F3xx_HAL_DAC_H
|
||||
#define STM32F3xx_HAL_DAC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
@ -67,7 +51,7 @@ typedef enum
|
|||
HAL_DAC_STATE_READY = 0x01U, /*!< DAC initialized and ready for use */
|
||||
HAL_DAC_STATE_BUSY = 0x02U, /*!< DAC internal processing is ongoing */
|
||||
HAL_DAC_STATE_TIMEOUT = 0x03U, /*!< DAC timeout state */
|
||||
HAL_DAC_STATE_ERROR = 0x04 /*!< DAC error state */
|
||||
HAL_DAC_STATE_ERROR = 0x04U /*!< DAC error state */
|
||||
|
||||
}HAL_DAC_StateTypeDef;
|
||||
|
||||
|
@ -108,7 +92,47 @@ typedef struct __DAC_HandleTypeDef
|
|||
|
||||
__IO uint32_t ErrorCode; /*!< DAC Error code */
|
||||
|
||||
#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
|
||||
void (* ConvCpltCallbackCh1) (struct __DAC_HandleTypeDef *hdac);
|
||||
void (* ConvHalfCpltCallbackCh1) (struct __DAC_HandleTypeDef *hdac);
|
||||
void (* ErrorCallbackCh1) (struct __DAC_HandleTypeDef *hdac);
|
||||
void (* DMAUnderrunCallbackCh1) (struct __DAC_HandleTypeDef *hdac);
|
||||
void (* ConvCpltCallbackCh2) (struct __DAC_HandleTypeDef* hdac);
|
||||
void (* ConvHalfCpltCallbackCh2) (struct __DAC_HandleTypeDef* hdac);
|
||||
void (* ErrorCallbackCh2) (struct __DAC_HandleTypeDef* hdac);
|
||||
void (* DMAUnderrunCallbackCh2) (struct __DAC_HandleTypeDef* hdac);
|
||||
|
||||
void (* MspInitCallback) (struct __DAC_HandleTypeDef *hdac);
|
||||
void (* MspDeInitCallback ) (struct __DAC_HandleTypeDef *hdac);
|
||||
#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
|
||||
|
||||
}DAC_HandleTypeDef;
|
||||
|
||||
#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
|
||||
/**
|
||||
* @brief HAL DAC Callback ID enumeration definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_DAC_CH1_COMPLETE_CB_ID = 0x00U, /*!< DAC CH1 Complete Callback ID */
|
||||
HAL_DAC_CH1_HALF_COMPLETE_CB_ID = 0x01U, /*!< DAC CH1 half Complete Callback ID */
|
||||
HAL_DAC_CH1_ERROR_ID = 0x02U, /*!< DAC CH1 error Callback ID */
|
||||
HAL_DAC_CH1_UNDERRUN_CB_ID = 0x03U, /*!< DAC CH1 underrun Callback ID */
|
||||
HAL_DAC_CH2_COMPLETE_CB_ID = 0x04U, /*!< DAC CH2 Complete Callback ID */
|
||||
HAL_DAC_CH2_HALF_COMPLETE_CB_ID = 0x05U, /*!< DAC CH2 half Complete Callback ID */
|
||||
HAL_DAC_CH2_ERROR_ID = 0x06U, /*!< DAC CH2 error Callback ID */
|
||||
HAL_DAC_CH2_UNDERRUN_CB_ID = 0x07U, /*!< DAC CH2 underrun Callback ID */
|
||||
HAL_DAC_MSP_INIT_CB_ID = 0x08U, /*!< DAC MspInit Callback ID */
|
||||
HAL_DAC_MSP_DEINIT_CB_ID = 0x09U, /*!< DAC MspDeInit Callback ID */
|
||||
HAL_DAC_ALL_CB_ID = 0x0AU /*!< DAC All ID */
|
||||
}HAL_DAC_CallbackIDTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL DAC Callback pointer definition
|
||||
*/
|
||||
typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac);
|
||||
#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -121,10 +145,13 @@ typedef struct __DAC_HandleTypeDef
|
|||
/** @defgroup DAC_Error_Code DAC Error Code
|
||||
* @{
|
||||
*/
|
||||
#define HAL_DAC_ERROR_NONE 0x00 /*!< No error */
|
||||
#define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01 /*!< DAC channel1 DMA underrun error */
|
||||
#define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02 /*!< DAC channel2 DMA underrun error */
|
||||
#define HAL_DAC_ERROR_DMA 0x04 /*!< DMA error */
|
||||
#define HAL_DAC_ERROR_NONE 0x00U /*!< No error */
|
||||
#define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01U /*!< DAC channel1 DMA underrun error */
|
||||
#define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02U /*!< DAC channel2 DMA underrun error */
|
||||
#define HAL_DAC_ERROR_DMA 0x04U /*!< DMA error */
|
||||
#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
|
||||
#define HAL_DAC_ERROR_INVALID_CALLBACK 0x10U /*!< Invalid callback error */
|
||||
#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -171,7 +198,7 @@ typedef struct __DAC_HandleTypeDef
|
|||
* @}
|
||||
*/
|
||||
|
||||
#if defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx)
|
||||
#if defined(DAC_CR_OUTEN1)
|
||||
/** @defgroup DAC_output_switch DAC output switch
|
||||
* @{
|
||||
*/
|
||||
|
@ -182,7 +209,7 @@ typedef struct __DAC_HandleTypeDef
|
|||
* @}
|
||||
*/
|
||||
|
||||
#endif /* STM32F303x8 || STM32F334x8 || STM32F328xx || */
|
||||
#endif /* DAC_CR_OUTEN1 */
|
||||
/** @defgroup DAC_data_alignement DAC data alignement
|
||||
* @{
|
||||
*/
|
||||
|
@ -227,7 +254,15 @@ typedef struct __DAC_HandleTypeDef
|
|||
* @param __HANDLE__ specifies the DAC handle.
|
||||
* @retval None
|
||||
*/
|
||||
#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
|
||||
#define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) do { \
|
||||
(__HANDLE__)->State = HAL_DAC_STATE_RESET; \
|
||||
(__HANDLE__)->MspInitCallback = NULL; \
|
||||
(__HANDLE__)->MspDeInitCallback = NULL; \
|
||||
} while(0)
|
||||
#else
|
||||
#define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET)
|
||||
#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
|
||||
|
||||
/** @brief Enable the DAC channel
|
||||
* @param __HANDLE__ specifies the DAC handle.
|
||||
|
@ -351,11 +386,11 @@ typedef struct __DAC_HandleTypeDef
|
|||
#define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \
|
||||
((STATE) == DAC_OUTPUTBUFFER_DISABLE))
|
||||
|
||||
#if defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx)
|
||||
#if defined(DAC_CR_OUTEN1)
|
||||
#define IS_DAC_OUTPUT_SWITCH_STATE(STATE) (((STATE) == DAC_OUTPUTSWITCH_DISABLE) || \
|
||||
((STATE) == DAC_OUTPUTSWITCH_ENABLE))
|
||||
|
||||
#endif /* STM32F303x8 || STM32F334x8 || STM32F328xx || */
|
||||
#endif /* DAC_CR_OUTEN1 */
|
||||
#define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \
|
||||
((ALIGN) == DAC_ALIGN_12B_L) || \
|
||||
((ALIGN) == DAC_ALIGN_8B_R))
|
||||
|
@ -408,6 +443,12 @@ void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac);
|
|||
void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac);
|
||||
void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac);
|
||||
|
||||
#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
|
||||
/* DAC callback registering/unregistering */
|
||||
HAL_StatusTypeDef HAL_DAC_RegisterCallback (DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackId, pDAC_CallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_DAC_UnRegisterCallback (DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackId);
|
||||
#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -449,6 +490,6 @@ uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac);
|
|||
}
|
||||
#endif
|
||||
|
||||
#endif /*__STM32F3xx_HAL_DAC_H */
|
||||
#endif /* STM32F3xx_HAL_DAC_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
|
@ -6,36 +6,20 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_HAL_DAC_EX_H
|
||||
#define __STM32F3xx_HAL_DAC_EX_H
|
||||
#ifndef STM32F3xx_HAL_DAC_EX_H
|
||||
#define STM32F3xx_HAL_DAC_EX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
@ -354,6 +338,6 @@ void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef *hdac);
|
|||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F3xx_HAL_HAL_EX_H */
|
||||
#endif /* STM32F3xx_HAL_HAL_EX_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
|
@ -7,29 +7,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
@ -47,7 +31,7 @@
|
|||
#if defined USE_LEGACY
|
||||
#include "Legacy/stm32_hal_legacy.h"
|
||||
#endif
|
||||
#include <stdio.h>
|
||||
#include <stddef.h>
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
|
|
|
@ -6,29 +6,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
|
|
@ -6,29 +6,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
|
|
@ -0,0 +1,404 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f3xx_hal_exti.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of EXTI HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32F3xx_HAL_EXTI_H
|
||||
#define STM32F3xx_HAL_EXTI_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f3xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32F3xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup EXTI EXTI
|
||||
* @brief EXTI HAL module driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/** @defgroup EXTI_Exported_Types EXTI Exported Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief HAL EXTI common Callback ID enumeration definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_EXTI_COMMON_CB_ID = 0x00U
|
||||
} EXTI_CallbackIDTypeDef;
|
||||
|
||||
/**
|
||||
* @brief EXTI Handle structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t Line; /*!< Exti line number */
|
||||
void (* PendingCallback)(void); /*!< Exti pending callback */
|
||||
} EXTI_HandleTypeDef;
|
||||
|
||||
/**
|
||||
* @brief EXTI Configuration structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t Line; /*!< The Exti line to be configured. This parameter
|
||||
can be a value of @ref EXTI_Line */
|
||||
uint32_t Mode; /*!< The Exit Mode to be configured for a core.
|
||||
This parameter can be a combination of @ref EXTI_Mode */
|
||||
uint32_t Trigger; /*!< The Exti Trigger to be configured. This parameter
|
||||
can be a value of @ref EXTI_Trigger */
|
||||
uint32_t GPIOSel; /*!< The Exti GPIO multiplexer selection to be configured.
|
||||
This parameter is only possible for line 0 to 15. It
|
||||
can be a value of @ref EXTI_GPIOSel */
|
||||
} EXTI_ConfigTypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup EXTI_Exported_Constants EXTI Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup EXTI_Line EXTI Line
|
||||
* @{
|
||||
*/
|
||||
#define EXTI_LINE_0 (EXTI_GPIO | EXTI_REG1 | 0x00u) /*!< External interrupt line 0 */
|
||||
#define EXTI_LINE_1 (EXTI_GPIO | EXTI_REG1 | 0x01u) /*!< External interrupt line 1 */
|
||||
#define EXTI_LINE_2 (EXTI_GPIO | EXTI_REG1 | 0x02u) /*!< External interrupt line 2 */
|
||||
#define EXTI_LINE_3 (EXTI_GPIO | EXTI_REG1 | 0x03u) /*!< External interrupt line 3 */
|
||||
#define EXTI_LINE_4 (EXTI_GPIO | EXTI_REG1 | 0x04u) /*!< External interrupt line 4 */
|
||||
#define EXTI_LINE_5 (EXTI_GPIO | EXTI_REG1 | 0x05u) /*!< External interrupt line 5 */
|
||||
#define EXTI_LINE_6 (EXTI_GPIO | EXTI_REG1 | 0x06u) /*!< External interrupt line 6 */
|
||||
#define EXTI_LINE_7 (EXTI_GPIO | EXTI_REG1 | 0x07u) /*!< External interrupt line 7 */
|
||||
#define EXTI_LINE_8 (EXTI_GPIO | EXTI_REG1 | 0x08u) /*!< External interrupt line 8 */
|
||||
#define EXTI_LINE_9 (EXTI_GPIO | EXTI_REG1 | 0x09u) /*!< External interrupt line 9 */
|
||||
#define EXTI_LINE_10 (EXTI_GPIO | EXTI_REG1 | 0x0Au) /*!< External interrupt line 10 */
|
||||
#define EXTI_LINE_11 (EXTI_GPIO | EXTI_REG1 | 0x0Bu) /*!< External interrupt line 11 */
|
||||
#define EXTI_LINE_12 (EXTI_GPIO | EXTI_REG1 | 0x0Cu) /*!< External interrupt line 12 */
|
||||
#define EXTI_LINE_13 (EXTI_GPIO | EXTI_REG1 | 0x0Du) /*!< External interrupt line 13 */
|
||||
#define EXTI_LINE_14 (EXTI_GPIO | EXTI_REG1 | 0x0Eu) /*!< External interrupt line 14 */
|
||||
#define EXTI_LINE_15 (EXTI_GPIO | EXTI_REG1 | 0x0Fu) /*!< External interrupt line 15 */
|
||||
#define EXTI_LINE_16 (EXTI_CONFIG | EXTI_REG1 | 0x10u) /*!< External interrupt line 16 Connected to the PVD Output */
|
||||
#define EXTI_LINE_17 (EXTI_CONFIG | EXTI_REG1 | 0x11u) /*!< External interrupt line 17 Connected to the RTC Alarm event */
|
||||
|
||||
#if defined(EXTI_IMR_MR18)
|
||||
#define EXTI_LINE_18 (EXTI_CONFIG | EXTI_REG1 | 0x12u) /*!< External interrupt line 18 Connected to the USB OTG FS Wakeup from suspend event */
|
||||
#else
|
||||
#define EXTI_LINE_18 (EXTI_RESERVED | EXTI_REG1 | 0x12u)
|
||||
#endif /* EXTI_IMR_MR18 */
|
||||
|
||||
#define EXTI_LINE_19 (EXTI_CONFIG | EXTI_REG1 | 0x13u) /*!< External interrupt line 19 Connected to the RTC tamper and Timestamps */
|
||||
#define EXTI_LINE_20 (EXTI_CONFIG | EXTI_REG1 | 0x14u) /*!< External interrupt line 20 Connected to the RTC wakeup timer */
|
||||
|
||||
#if defined(EXTI_IMR_MR21)
|
||||
#define EXTI_LINE_21 (EXTI_CONFIG | EXTI_REG1 | 0x15u) /*!< External interrupt line 21 Connected to the Comparator 1 output */
|
||||
#else
|
||||
#define EXTI_LINE_21 (EXTI_RESERVED | EXTI_REG1 | 0x15u)
|
||||
#endif /* EXTI_IMR_MR21 */
|
||||
|
||||
#define EXTI_LINE_22 (EXTI_CONFIG | EXTI_REG1 | 0x16u) /*!< External interrupt line 22 Connected to the Comparator 2 output */
|
||||
#define EXTI_LINE_23 (EXTI_DIRECT | EXTI_REG1 | 0x17u) /*!< External interrupt line 23 Connected to the internal I2C1 wakeup event */
|
||||
|
||||
#if defined(EXTI_IMR_MR24)
|
||||
#define EXTI_LINE_24 (EXTI_DIRECT | EXTI_REG1 | 0x18u) /*!< External interrupt line 24 Connected to the internal I2C2 wakeup event */
|
||||
#else
|
||||
#define EXTI_LINE_24 (EXTI_RESERVED | EXTI_REG1 | 0x18u)
|
||||
#endif /* EXTI_IMR_MR24 */
|
||||
|
||||
#define EXTI_LINE_25 (EXTI_DIRECT | EXTI_REG1 | 0x19u) /*!< External interrupt line 25 Connected to the internal USART1 wakeup event */
|
||||
|
||||
#if defined(EXTI_IMR_MR26)
|
||||
#define EXTI_LINE_26 (EXTI_DIRECT | EXTI_REG1 | 0x1Au) /*!< External interrupt line 26 Connected to the internal USART2 wakeup event */
|
||||
#else
|
||||
#define EXTI_LINE_26 (EXTI_RESERVED | EXTI_REG1 | 0x1Au)
|
||||
#endif /* EXTI_IMR_MR26 */
|
||||
|
||||
#if defined(EXTI_IMR_MR27)
|
||||
#define EXTI_LINE_27 (EXTI_DIRECT | EXTI_REG1 | 0x1Bu) /*!< External interrupt line 27 Connected to the internal I2C3 wakeup event */
|
||||
#else
|
||||
#define EXTI_LINE_27 (EXTI_RESERVED | EXTI_REG1 | 0x1Bu)
|
||||
#endif /* EXTI_IMR_MR27 */
|
||||
|
||||
#if defined(EXTI_IMR_MR28)
|
||||
#define EXTI_LINE_28 (EXTI_DIRECT | EXTI_REG1 | 0x1Cu) /*!< External interrupt line 28 Connected to the internal USART3 wakeup event */
|
||||
#else
|
||||
#define EXTI_LINE_28 (EXTI_RESERVED | EXTI_REG1 | 0x1Cu)
|
||||
#endif /* EXTI_IMR_MR28 */
|
||||
|
||||
#if defined(EXTI_32_63_SUPPORT)
|
||||
|
||||
#if defined(EXTI_IMR_MR29)
|
||||
#define EXTI_LINE_29 (EXTI_CONFIG | EXTI_REG1 | 0x1Du) /*!< External interrupt line 29 Connected to the Comparator 3 output */
|
||||
#else
|
||||
#define EXTI_LINE_29 (EXTI_RESERVED | EXTI_REG1 | 0x1Cu)
|
||||
#endif /* EXTI_IMR_MR29 */
|
||||
|
||||
#if defined(EXTI_IMR_MR30)
|
||||
#define EXTI_LINE_30 (EXTI_CONFIG | EXTI_REG1 | 0x1Eu) /*!< External interrupt line 30 Connected to the Comparator 4 output */
|
||||
#else
|
||||
#define EXTI_LINE_30 (EXTI_RESERVED | EXTI_REG1 | 0x1Eu)
|
||||
#endif /* EXTI_IMR_MR30 */
|
||||
|
||||
#if defined(EXTI_IMR_MR31)
|
||||
#define EXTI_LINE_31 (EXTI_CONFIG | EXTI_REG1 | 0x1Fu) /*!< External interrupt line 31 Connected to the Comparator 5 output */
|
||||
#else
|
||||
#define EXTI_LINE_31 (EXTI_RESERVED | EXTI_REG1 | 0x1Fu)
|
||||
#endif /* EXTI_IMR_MR31 */
|
||||
|
||||
#define EXTI_LINE_32 (EXTI_CONFIG | EXTI_REG2 | 0x00u) /*!< External interrupt line 32 Connected to the Comparator 6 output */
|
||||
|
||||
#if defined(EXTI_IMR2_MR33)
|
||||
#define EXTI_LINE_33 (EXTI_CONFIG | EXTI_REG2 | 0x01u) /*!< External interrupt line 33 Connected to the Comparator 7 output */
|
||||
#else
|
||||
#define EXTI_LINE_33 (EXTI_RESERVED | EXTI_REG2 | 0x01u)
|
||||
#endif /* EXTI_IMR2_MR33 */
|
||||
|
||||
#if defined(EXTI_IMR2_MR34)
|
||||
#define EXTI_LINE_34 (EXTI_DIRECT | EXTI_REG2 | 0x02u) /*!< External interrupt line 34 Connected to the USART4 output */
|
||||
#else
|
||||
#define EXTI_LINE_34 (EXTI_RESERVED | EXTI_REG2 | 0x02u)
|
||||
#endif /* EXTI_IMR2_MR34 */
|
||||
|
||||
#if defined(EXTI_IMR2_MR35)
|
||||
#define EXTI_LINE_35 (EXTI_DIRECT | EXTI_REG2 | 0x03u) /*!< External interrupt line 35 Connected to the USART5 output */
|
||||
#else
|
||||
#define EXTI_LINE_35 (EXTI_RESERVED | EXTI_REG2 | 0x03u)
|
||||
#endif /* EXTI_IMR2_MR35 */
|
||||
|
||||
#endif /* EXTI_32_63_SUPPORT */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup EXTI_Mode EXTI Mode
|
||||
* @{
|
||||
*/
|
||||
#define EXTI_MODE_NONE 0x00000000u
|
||||
#define EXTI_MODE_INTERRUPT 0x00000001u
|
||||
#define EXTI_MODE_EVENT 0x00000002u
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup EXTI_Trigger EXTI Trigger
|
||||
* @{
|
||||
*/
|
||||
#define EXTI_TRIGGER_NONE 0x00000000u
|
||||
#define EXTI_TRIGGER_RISING 0x00000001u
|
||||
#define EXTI_TRIGGER_FALLING 0x00000002u
|
||||
#define EXTI_TRIGGER_RISING_FALLING (EXTI_TRIGGER_RISING | EXTI_TRIGGER_FALLING)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup EXTI_GPIOSel EXTI GPIOSel
|
||||
* @brief
|
||||
* @{
|
||||
*/
|
||||
#define EXTI_GPIOA 0x00000000u
|
||||
#define EXTI_GPIOB 0x00000001u
|
||||
#define EXTI_GPIOC 0x00000002u
|
||||
#define EXTI_GPIOD 0x00000003u
|
||||
#if defined(GPIOE)
|
||||
#define EXTI_GPIOE 0x00000004u
|
||||
#endif /* GPIOE */
|
||||
#define EXTI_GPIOF 0x00000005u
|
||||
#if defined(GPIOG)
|
||||
#define EXTI_GPIOG 0x00000006u
|
||||
#endif /* GPIOG */
|
||||
#if defined(GPIOH)
|
||||
#define EXTI_GPIOH 0x00000007u
|
||||
#endif /* GPIOH */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/** @defgroup EXTI_Exported_Macros EXTI Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private constants --------------------------------------------------------*/
|
||||
/** @defgroup EXTI_Private_Constants EXTI Private Constants
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief EXTI Line property definition
|
||||
*/
|
||||
#define EXTI_PROPERTY_SHIFT 24u
|
||||
#define EXTI_DIRECT (0x01uL << EXTI_PROPERTY_SHIFT)
|
||||
#define EXTI_CONFIG (0x02uL << EXTI_PROPERTY_SHIFT)
|
||||
#define EXTI_GPIO ((0x04uL << EXTI_PROPERTY_SHIFT) | EXTI_CONFIG)
|
||||
#define EXTI_RESERVED (0x08uL << EXTI_PROPERTY_SHIFT)
|
||||
#define EXTI_PROPERTY_MASK (EXTI_DIRECT | EXTI_CONFIG | EXTI_GPIO)
|
||||
|
||||
/**
|
||||
* @brief EXTI Register and bit usage
|
||||
*/
|
||||
#define EXTI_REG_SHIFT 16u
|
||||
#define EXTI_REG1 (0x00uL << EXTI_REG_SHIFT)
|
||||
#define EXTI_REG2 (0x01uL << EXTI_REG_SHIFT)
|
||||
#define EXTI_REG_MASK (EXTI_REG1 | EXTI_REG2)
|
||||
#define EXTI_PIN_MASK 0x0000001Fu
|
||||
|
||||
/**
|
||||
* @brief EXTI Mask for interrupt & event mode
|
||||
*/
|
||||
#define EXTI_MODE_MASK (EXTI_MODE_EVENT | EXTI_MODE_INTERRUPT)
|
||||
|
||||
/**
|
||||
* @brief EXTI Mask for trigger possibilities
|
||||
*/
|
||||
#define EXTI_TRIGGER_MASK (EXTI_TRIGGER_RISING | EXTI_TRIGGER_FALLING)
|
||||
|
||||
/**
|
||||
* @brief EXTI Line number
|
||||
*/
|
||||
#if defined(EXTI_32_63_SUPPORT)
|
||||
#define EXTI_LINE_NB 36uL
|
||||
#else
|
||||
#define EXTI_LINE_NB 29uL
|
||||
#endif /* EXTI_32_63_SUPPORT */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/** @defgroup EXTI_Private_Macros EXTI Private Macros
|
||||
* @{
|
||||
*/
|
||||
#define IS_EXTI_LINE(__LINE__) ((((__LINE__) & ~(EXTI_PROPERTY_MASK | EXTI_REG_MASK | EXTI_PIN_MASK)) == 0x00u) && \
|
||||
((((__LINE__) & EXTI_PROPERTY_MASK) == EXTI_DIRECT) || \
|
||||
(((__LINE__) & EXTI_PROPERTY_MASK) == EXTI_CONFIG) || \
|
||||
(((__LINE__) & EXTI_PROPERTY_MASK) == EXTI_GPIO)) && \
|
||||
(((__LINE__) & (EXTI_REG_MASK | EXTI_PIN_MASK)) < \
|
||||
(((EXTI_LINE_NB / 32u) << EXTI_REG_SHIFT) | (EXTI_LINE_NB % 32u))))
|
||||
|
||||
#define IS_EXTI_MODE(__LINE__) ((((__LINE__) & EXTI_MODE_MASK) != 0x00u) && \
|
||||
(((__LINE__) & ~EXTI_MODE_MASK) == 0x00u))
|
||||
|
||||
#define IS_EXTI_TRIGGER(__LINE__) (((__LINE__) & ~EXTI_TRIGGER_MASK) == 0x00u)
|
||||
|
||||
#define IS_EXTI_PENDING_EDGE(__LINE__) ((__LINE__) == EXTI_TRIGGER_RISING_FALLING)
|
||||
|
||||
#define IS_EXTI_CONFIG_LINE(__LINE__) (((__LINE__) & EXTI_CONFIG) != 0x00u)
|
||||
|
||||
#if defined(GPIOH)
|
||||
#define IS_EXTI_GPIO_PORT(__PORT__) (((__PORT__) == EXTI_GPIOA) || \
|
||||
((__PORT__) == EXTI_GPIOB) || \
|
||||
((__PORT__) == EXTI_GPIOC) || \
|
||||
((__PORT__) == EXTI_GPIOD) || \
|
||||
((__PORT__) == EXTI_GPIOE) || \
|
||||
((__PORT__) == EXTI_GPIOF) || \
|
||||
((__PORT__) == EXTI_GPIOG) || \
|
||||
((__PORT__) == EXTI_GPIOH))
|
||||
#elif defined(GPIOE)
|
||||
#define IS_EXTI_GPIO_PORT(__PORT__) (((__PORT__) == EXTI_GPIOA) || \
|
||||
((__PORT__) == EXTI_GPIOB) || \
|
||||
((__PORT__) == EXTI_GPIOC) || \
|
||||
((__PORT__) == EXTI_GPIOD) || \
|
||||
((__PORT__) == EXTI_GPIOE) || \
|
||||
((__PORT__) == EXTI_GPIOF))
|
||||
#else
|
||||
#define IS_EXTI_GPIO_PORT(__PORT__) (((__PORT__) == EXTI_GPIOA) || \
|
||||
((__PORT__) == EXTI_GPIOB) || \
|
||||
((__PORT__) == EXTI_GPIOC) || \
|
||||
((__PORT__) == EXTI_GPIOD) || \
|
||||
((__PORT__) == EXTI_GPIOF))
|
||||
#endif /* GPIOE */
|
||||
|
||||
#define IS_EXTI_GPIO_PIN(__PIN__) ((__PIN__) < 16u)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @defgroup EXTI_Exported_Functions EXTI Exported Functions
|
||||
* @brief EXTI Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup EXTI_Exported_Functions_Group1 Configuration functions
|
||||
* @brief Configuration functions
|
||||
* @{
|
||||
*/
|
||||
/* Configuration functions ****************************************************/
|
||||
HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig);
|
||||
HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig);
|
||||
HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef *hexti);
|
||||
HAL_StatusTypeDef HAL_EXTI_RegisterCallback(EXTI_HandleTypeDef *hexti, EXTI_CallbackIDTypeDef CallbackID, void (*pPendingCbfn)(void));
|
||||
HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLine);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup EXTI_Exported_Functions_Group2 IO operation functions
|
||||
* @brief IO operation functions
|
||||
* @{
|
||||
*/
|
||||
/* IO operation functions *****************************************************/
|
||||
void HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti);
|
||||
uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge);
|
||||
void HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge);
|
||||
void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32F3xx_HAL_EXTI_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
|
@ -6,29 +6,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
|
|
@ -6,29 +6,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
@ -322,17 +306,10 @@ typedef struct
|
|||
#endif /* STM32F302xC || STM32F303xC || STM32F358xx || */
|
||||
/* STM32F373xC || STM32F378xx */
|
||||
|
||||
#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)
|
||||
#if defined(STM32F302xE) || defined(STM32F303xE)
|
||||
#define OB_WRP_PAGES32TO47MASK (0x00FF0000U)
|
||||
#define OB_WRP_PAGES48TO255MASK (0xFF000000U)
|
||||
#endif /* STM32F302xE || STM32F303xE || STM32F398xx */
|
||||
|
||||
#if defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) \
|
||||
|| defined(STM32F373xC) || defined(STM32F378xx)
|
||||
#define OB_WRP_PAGES32TO47MASK (0x00FF0000U)
|
||||
#define OB_WRP_PAGES48TO127MASK (0xFF000000U)
|
||||
#endif /* STM32F302xC || STM32F303xC || STM32F358xx || */
|
||||
/* STM32F373xC || STM32F378xx */
|
||||
#endif /* STM32F302xE || STM32F303xE */
|
||||
|
||||
#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) \
|
||||
|| defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) \
|
||||
|
|
|
@ -6,29 +6,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
@ -227,8 +211,8 @@ typedef enum
|
|||
*/
|
||||
#define IS_GPIO_PIN_ACTION(ACTION) (((ACTION) == GPIO_PIN_RESET) || ((ACTION) == GPIO_PIN_SET))
|
||||
|
||||
#define IS_GPIO_PIN(__PIN__) ((((__PIN__) & GPIO_PIN_MASK) != 0x00U) &&\
|
||||
(((__PIN__) & ~GPIO_PIN_MASK) == 0x00U))
|
||||
#define IS_GPIO_PIN(__PIN__) (((((uint32_t)__PIN__) & GPIO_PIN_MASK) != 0x00U) &&\
|
||||
((((uint32_t)__PIN__) & ~GPIO_PIN_MASK) == 0x00U))
|
||||
|
||||
#define IS_GPIO_MODE(__MODE__) (((__MODE__) == GPIO_MODE_INPUT) ||\
|
||||
((__MODE__) == GPIO_MODE_OUTPUT_PP) ||\
|
||||
|
|
|
@ -6,29 +6,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -6,36 +6,20 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_HAL_I2C_H
|
||||
#define __STM32F3xx_HAL_I2C_H
|
||||
#ifndef STM32F3xx_HAL_I2C_H
|
||||
#define STM32F3xx_HAL_I2C_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
@ -102,17 +86,17 @@ typedef struct
|
|||
* 01 : Abort (Abort user request on going)\n
|
||||
* 10 : Timeout\n
|
||||
* 11 : Error\n
|
||||
* b5 IP initilisation status\n
|
||||
* 0 : Reset (IP not initialized)\n
|
||||
* 1 : Init done (IP initialized and ready to use. HAL I2C Init function called)\n
|
||||
* b5 Peripheral initialization status\n
|
||||
* 0 : Reset (peripheral not initialized)\n
|
||||
* 1 : Init done (peripheral initialized and ready to use. HAL I2C Init function called)\n
|
||||
* b4 (not used)\n
|
||||
* x : Should be set to 0\n
|
||||
* b3\n
|
||||
* 0 : Ready or Busy (No Listen mode ongoing)\n
|
||||
* 1 : Listen (IP in Address Listen Mode)\n
|
||||
* 1 : Listen (peripheral in Address Listen Mode)\n
|
||||
* b2 Intrinsic process state\n
|
||||
* 0 : Ready\n
|
||||
* 1 : Busy (IP busy with some configuration or internal operations)\n
|
||||
* 1 : Busy (peripheral busy with some configuration or internal operations)\n
|
||||
* b1 Rx state\n
|
||||
* 0 : Ready (no Rx operation ongoing)\n
|
||||
* 1 : Busy (Rx operation ongoing)\n
|
||||
|
@ -186,6 +170,11 @@ typedef enum
|
|||
#define HAL_I2C_ERROR_DMA (0x00000010U) /*!< DMA transfer error */
|
||||
#define HAL_I2C_ERROR_TIMEOUT (0x00000020U) /*!< Timeout error */
|
||||
#define HAL_I2C_ERROR_SIZE (0x00000040U) /*!< Size Management error */
|
||||
#define HAL_I2C_ERROR_DMA_PARAM (0x00000080U) /*!< DMA Parameter Error */
|
||||
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
|
||||
#define HAL_I2C_ERROR_INVALID_CALLBACK (0x00000100U) /*!< Invalid Callback error */
|
||||
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
|
||||
#define HAL_I2C_ERROR_INVALID_PARAM (0x00000200U) /*!< Invalid Parameters error */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -226,7 +215,54 @@ typedef struct __I2C_HandleTypeDef
|
|||
__IO uint32_t ErrorCode; /*!< I2C Error code */
|
||||
|
||||
__IO uint32_t AddrEventCount; /*!< I2C Address Event counter */
|
||||
|
||||
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
|
||||
void (* MasterTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Master Tx Transfer completed callback */
|
||||
void (* MasterRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Master Rx Transfer completed callback */
|
||||
void (* SlaveTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Slave Tx Transfer completed callback */
|
||||
void (* SlaveRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Slave Rx Transfer completed callback */
|
||||
void (* ListenCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Listen Complete callback */
|
||||
void (* MemTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Memory Tx Transfer completed callback */
|
||||
void (* MemRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Memory Rx Transfer completed callback */
|
||||
void (* ErrorCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Error callback */
|
||||
void (* AbortCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Abort callback */
|
||||
|
||||
void (* AddrCallback)(struct __I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< I2C Slave Address Match callback */
|
||||
|
||||
void (* MspInitCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Msp Init callback */
|
||||
void (* MspDeInitCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Msp DeInit callback */
|
||||
|
||||
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
|
||||
} I2C_HandleTypeDef;
|
||||
|
||||
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
|
||||
/**
|
||||
* @brief HAL I2C Callback ID enumeration definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_I2C_MASTER_TX_COMPLETE_CB_ID = 0x00U, /*!< I2C Master Tx Transfer completed callback ID */
|
||||
HAL_I2C_MASTER_RX_COMPLETE_CB_ID = 0x01U, /*!< I2C Master Rx Transfer completed callback ID */
|
||||
HAL_I2C_SLAVE_TX_COMPLETE_CB_ID = 0x02U, /*!< I2C Slave Tx Transfer completed callback ID */
|
||||
HAL_I2C_SLAVE_RX_COMPLETE_CB_ID = 0x03U, /*!< I2C Slave Rx Transfer completed callback ID */
|
||||
HAL_I2C_LISTEN_COMPLETE_CB_ID = 0x04U, /*!< I2C Listen Complete callback ID */
|
||||
HAL_I2C_MEM_TX_COMPLETE_CB_ID = 0x05U, /*!< I2C Memory Tx Transfer callback ID */
|
||||
HAL_I2C_MEM_RX_COMPLETE_CB_ID = 0x06U, /*!< I2C Memory Rx Transfer completed callback ID */
|
||||
HAL_I2C_ERROR_CB_ID = 0x07U, /*!< I2C Error callback ID */
|
||||
HAL_I2C_ABORT_CB_ID = 0x08U, /*!< I2C Abort callback ID */
|
||||
|
||||
HAL_I2C_MSPINIT_CB_ID = 0x09U, /*!< I2C Msp Init callback ID */
|
||||
HAL_I2C_MSPDEINIT_CB_ID = 0x0AU /*!< I2C Msp DeInit callback ID */
|
||||
|
||||
} HAL_I2C_CallbackIDTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL I2C Callback pointer definition
|
||||
*/
|
||||
typedef void (*pI2C_CallbackTypeDef)(I2C_HandleTypeDef *hi2c); /*!< pointer to an I2C callback function */
|
||||
typedef void (*pI2C_AddrCallbackTypeDef)(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< pointer to an I2C Address Match callback function */
|
||||
|
||||
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -249,6 +285,12 @@ typedef struct __I2C_HandleTypeDef
|
|||
#define I2C_FIRST_AND_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
|
||||
#define I2C_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
|
||||
#define I2C_LAST_FRAME_NO_STOP ((uint32_t)I2C_SOFTEND_MODE)
|
||||
|
||||
/* List of XferOptions in usage of :
|
||||
* 1- Restart condition in all use cases (direction change or not)
|
||||
*/
|
||||
#define I2C_OTHER_FRAME (0x000000AAU)
|
||||
#define I2C_OTHER_AND_LAST_FRAME (0x0000AA00U)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -397,7 +439,15 @@ typedef struct __I2C_HandleTypeDef
|
|||
* @param __HANDLE__ specifies the I2C Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
|
||||
#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) do{ \
|
||||
(__HANDLE__)->State = HAL_I2C_STATE_RESET; \
|
||||
(__HANDLE__)->MspInitCallback = NULL; \
|
||||
(__HANDLE__)->MspDeInitCallback = NULL; \
|
||||
} while(0)
|
||||
#else
|
||||
#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
|
||||
#endif
|
||||
|
||||
/** @brief Enable the specified I2C interrupt.
|
||||
* @param __HANDLE__ specifies the I2C Handle.
|
||||
|
@ -470,6 +520,7 @@ typedef struct __I2C_HandleTypeDef
|
|||
*
|
||||
* @retval The new state of __FLAG__ (SET or RESET).
|
||||
*/
|
||||
#define I2C_FLAG_MASK (0x0001FFFFU)
|
||||
#define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) ? SET : RESET)
|
||||
|
||||
/** @brief Clear the I2C pending flags which are cleared by writing 1 in a specific bit.
|
||||
|
@ -529,6 +580,15 @@ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c);
|
|||
HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c);
|
||||
void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c);
|
||||
void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);
|
||||
|
||||
/* Callbacks Register/UnRegister functions ***********************************/
|
||||
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
|
||||
HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID, pI2C_CallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID);
|
||||
|
||||
HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c);
|
||||
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -554,10 +614,10 @@ HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pDa
|
|||
HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
|
||||
|
||||
HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
||||
HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
||||
HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
||||
HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
||||
HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
||||
HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
||||
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
||||
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
||||
HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c);
|
||||
HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c);
|
||||
HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress);
|
||||
|
@ -569,6 +629,11 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *p
|
|||
HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
|
||||
|
||||
HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
||||
HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
||||
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
||||
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -661,15 +726,19 @@ uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
|
|||
((REQUEST) == I2C_NEXT_FRAME) || \
|
||||
((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \
|
||||
((REQUEST) == I2C_LAST_FRAME) || \
|
||||
((REQUEST) == I2C_LAST_FRAME_NO_STOP))
|
||||
((REQUEST) == I2C_LAST_FRAME_NO_STOP) || \
|
||||
IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST))
|
||||
|
||||
#define IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_OTHER_FRAME) || \
|
||||
((REQUEST) == I2C_OTHER_AND_LAST_FRAME))
|
||||
|
||||
#define I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN)))
|
||||
|
||||
#define I2C_GET_ADDR_MATCH(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 16U)
|
||||
#define I2C_GET_DIR(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16U)
|
||||
#define I2C_GET_ADDR_MATCH(__HANDLE__) ((uint16_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 16U))
|
||||
#define I2C_GET_DIR(__HANDLE__) ((uint8_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16U))
|
||||
#define I2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND)
|
||||
#define I2C_GET_OWN_ADDRESS1(__HANDLE__) ((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1)
|
||||
#define I2C_GET_OWN_ADDRESS2(__HANDLE__) ((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2)
|
||||
#define I2C_GET_OWN_ADDRESS1(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1))
|
||||
#define I2C_GET_OWN_ADDRESS2(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2))
|
||||
|
||||
#define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU)
|
||||
#define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU)
|
||||
|
@ -679,6 +748,9 @@ uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
|
|||
|
||||
#define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \
|
||||
(uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN)))
|
||||
|
||||
#define I2C_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET)
|
||||
#define I2C_CHECK_IT_SOURCE(__CR1__, __IT__) ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -705,6 +777,6 @@ uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
|
|||
#endif
|
||||
|
||||
|
||||
#endif /* __STM32F3xx_HAL_I2C_H */
|
||||
#endif /* STM32F3xx_HAL_I2C_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
|
@ -6,36 +6,20 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_HAL_I2C_EX_H
|
||||
#define __STM32F3xx_HAL_I2C_EX_H
|
||||
#ifndef STM32F3xx_HAL_I2C_EX_H
|
||||
#define STM32F3xx_HAL_I2C_EX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
@ -141,6 +125,9 @@ void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus);
|
|||
(((__CONFIG__) & (I2C_FASTMODEPLUS_I2C1)) == I2C_FASTMODEPLUS_I2C1) || \
|
||||
(((__CONFIG__) & (I2C_FASTMODEPLUS_I2C2)) == I2C_FASTMODEPLUS_I2C2) || \
|
||||
(((__CONFIG__) & (I2C_FASTMODEPLUS_I2C3)) == I2C_FASTMODEPLUS_I2C3)))
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -174,6 +161,6 @@ void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus);
|
|||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F3xx_HAL_I2C_EX_H */
|
||||
#endif /* STM32F3xx_HAL_I2C_EX_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
|
@ -6,49 +6,29 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_HAL_I2S_H
|
||||
#define __STM32F3xx_HAL_I2S_H
|
||||
#ifndef STM32F3xx_HAL_I2S_H
|
||||
#define STM32F3xx_HAL_I2S_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
|
||||
defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \
|
||||
defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || \
|
||||
defined(STM32F373xC) || defined(STM32F378xx)
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f3xx_hal_def.h"
|
||||
|
||||
#if defined(SPI_I2S_SUPPORT)
|
||||
/** @addtogroup STM32F3xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
@ -85,13 +65,11 @@ typedef struct
|
|||
uint32_t CPOL; /*!< Specifies the idle state of the I2S clock.
|
||||
This parameter can be a value of @ref I2S_Clock_Polarity */
|
||||
|
||||
uint32_t ClockSource; /*!< Specifies the I2S Clock Source.
|
||||
This parameter can be a value of @ref I2S_Clock_Source */
|
||||
|
||||
uint32_t ClockSource; /*!< Specifies the I2S Clock Source.
|
||||
This parameter can be a value of @ref I2S_Clock_Source */
|
||||
uint32_t FullDuplexMode; /*!< Specifies the I2S FullDuplex mode.
|
||||
This parameter can be a value of @ref I2S_FullDuplex_Mode */
|
||||
|
||||
}I2S_InitTypeDef;
|
||||
} I2S_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL State structures definition
|
||||
|
@ -105,13 +83,13 @@ typedef enum
|
|||
HAL_I2S_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */
|
||||
HAL_I2S_STATE_BUSY_TX_RX = 0x05U, /*!< Data Transmission and Reception process is ongoing */
|
||||
HAL_I2S_STATE_TIMEOUT = 0x06U, /*!< I2S timeout state */
|
||||
HAL_I2S_STATE_ERROR = 0x07 /*!< I2S error state */
|
||||
}HAL_I2S_StateTypeDef;
|
||||
HAL_I2S_STATE_ERROR = 0x07U /*!< I2S error state */
|
||||
} HAL_I2S_StateTypeDef;
|
||||
|
||||
/**
|
||||
* @brief I2S handle Structure definition
|
||||
*/
|
||||
typedef struct
|
||||
typedef struct __I2S_HandleTypeDef
|
||||
{
|
||||
SPI_TypeDef *Instance; /*!< I2S registers base address */
|
||||
|
||||
|
@ -131,8 +109,9 @@ typedef struct
|
|||
(This field is initialized at the
|
||||
same value as transfer size at the
|
||||
beginning of the transfer and
|
||||
decremented when a sample is received.
|
||||
decremented when a sample is received
|
||||
NbSamplesReceived = RxBufferSize-RxBufferCount) */
|
||||
void (*IrqHandlerISR)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S function pointer on IrqHandler */
|
||||
|
||||
DMA_HandleTypeDef *hdmatx; /*!< I2S Tx DMA handle parameters */
|
||||
|
||||
|
@ -145,7 +124,44 @@ typedef struct
|
|||
__IO uint32_t ErrorCode; /*!< I2S Error code
|
||||
This parameter can be a value of @ref I2S_Error */
|
||||
|
||||
}I2S_HandleTypeDef;
|
||||
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
|
||||
void (* TxCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Tx Completed callback */
|
||||
void (* RxCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Rx Completed callback */
|
||||
void (* TxRxCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S TxRx Completed callback */
|
||||
void (* TxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Tx Half Completed callback */
|
||||
void (* RxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Rx Half Completed callback */
|
||||
void (* TxRxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S TxRx Half Completed callback */
|
||||
void (* ErrorCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Error callback */
|
||||
void (* MspInitCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Msp Init callback */
|
||||
void (* MspDeInitCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Msp DeInit callback */
|
||||
|
||||
#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
|
||||
} I2S_HandleTypeDef;
|
||||
|
||||
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
|
||||
/**
|
||||
* @brief HAL I2S Callback ID enumeration definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_I2S_TX_COMPLETE_CB_ID = 0x00U, /*!< I2S Tx Completed callback ID */
|
||||
HAL_I2S_RX_COMPLETE_CB_ID = 0x01U, /*!< I2S Rx Completed callback ID */
|
||||
HAL_I2S_TX_RX_COMPLETE_CB_ID = 0x02U, /*!< I2S TxRx Completed callback ID */
|
||||
HAL_I2S_TX_HALF_COMPLETE_CB_ID = 0x03U, /*!< I2S Tx Half Completed callback ID */
|
||||
HAL_I2S_RX_HALF_COMPLETE_CB_ID = 0x04U, /*!< I2S Rx Half Completed callback ID */
|
||||
HAL_I2S_TX_RX_HALF_COMPLETE_CB_ID = 0x05U, /*!< I2S TxRx Half Completed callback ID */
|
||||
HAL_I2S_ERROR_CB_ID = 0x06U, /*!< I2S Error callback ID */
|
||||
HAL_I2S_MSPINIT_CB_ID = 0x07U, /*!< I2S Msp Init callback ID */
|
||||
HAL_I2S_MSPDEINIT_CB_ID = 0x08U /*!< I2S Msp DeInit callback ID */
|
||||
|
||||
} HAL_I2S_CallbackIDTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL I2S Callback pointer definition
|
||||
*/
|
||||
typedef void (*pI2S_CallbackTypeDef)(I2S_HandleTypeDef *hi2s); /*!< pointer to an I2S callback function */
|
||||
|
||||
#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -157,24 +173,15 @@ typedef struct
|
|||
/** @defgroup I2S_Error I2S Error
|
||||
* @{
|
||||
*/
|
||||
#define HAL_I2S_ERROR_NONE (0x00000000U) /*!< No error */
|
||||
#define HAL_I2S_ERROR_TIMEOUT (0x00000001U) /*!< Timeout error */
|
||||
#define HAL_I2S_ERROR_OVR (0x00000002U) /*!< OVR error */
|
||||
#define HAL_I2S_ERROR_UDR (0x00000004U) /*!< UDR error */
|
||||
#define HAL_I2S_ERROR_DMA (0x00000008U) /*!< DMA transfer error */
|
||||
#define HAL_I2S_ERROR_UNKNOW (0x00000010U) /*!< Unknow Error error */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2S_Clock_Source I2S Clock Source
|
||||
* @{
|
||||
*/
|
||||
#define I2S_CLOCK_EXTERNAL (0x00000001U)
|
||||
#define I2S_CLOCK_SYSCLK (0x00000002U)
|
||||
|
||||
#define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) || \
|
||||
((CLOCK) == I2S_CLOCK_SYSCLK))
|
||||
#define HAL_I2S_ERROR_NONE (0x00000000U) /*!< No error */
|
||||
#define HAL_I2S_ERROR_TIMEOUT (0x00000001U) /*!< Timeout error */
|
||||
#define HAL_I2S_ERROR_OVR (0x00000002U) /*!< OVR error */
|
||||
#define HAL_I2S_ERROR_UDR (0x00000004U) /*!< UDR error */
|
||||
#define HAL_I2S_ERROR_DMA (0x00000008U) /*!< DMA transfer error */
|
||||
#define HAL_I2S_ERROR_PRESCALER (0x00000010U) /*!< Prescaler Calculation error */
|
||||
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
|
||||
#define HAL_I2S_ERROR_INVALID_CALLBACK (0x00000020U) /*!< Invalid Callback error */
|
||||
#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -183,14 +190,9 @@ typedef struct
|
|||
* @{
|
||||
*/
|
||||
#define I2S_MODE_SLAVE_TX (0x00000000U)
|
||||
#define I2S_MODE_SLAVE_RX (0x00000100U)
|
||||
#define I2S_MODE_MASTER_TX (0x00000200U)
|
||||
#define I2S_MODE_MASTER_RX (0x00000300U)
|
||||
|
||||
#define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \
|
||||
((MODE) == I2S_MODE_SLAVE_RX) || \
|
||||
((MODE) == I2S_MODE_MASTER_TX)|| \
|
||||
((MODE) == I2S_MODE_MASTER_RX))
|
||||
#define I2S_MODE_SLAVE_RX (SPI_I2SCFGR_I2SCFG_0)
|
||||
#define I2S_MODE_MASTER_TX (SPI_I2SCFGR_I2SCFG_1)
|
||||
#define I2S_MODE_MASTER_RX ((SPI_I2SCFGR_I2SCFG_0 | SPI_I2SCFGR_I2SCFG_1))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -199,16 +201,10 @@ typedef struct
|
|||
* @{
|
||||
*/
|
||||
#define I2S_STANDARD_PHILIPS (0x00000000U)
|
||||
#define I2S_STANDARD_MSB (0x00000010U)
|
||||
#define I2S_STANDARD_LSB (0x00000020U)
|
||||
#define I2S_STANDARD_PCM_SHORT (0x00000030U)
|
||||
#define I2S_STANDARD_PCM_LONG (0x000000B0U)
|
||||
|
||||
#define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS) || \
|
||||
((STANDARD) == I2S_STANDARD_MSB) || \
|
||||
((STANDARD) == I2S_STANDARD_LSB) || \
|
||||
((STANDARD) == I2S_STANDARD_PCM_SHORT) || \
|
||||
((STANDARD) == I2S_STANDARD_PCM_LONG))
|
||||
#define I2S_STANDARD_MSB (SPI_I2SCFGR_I2SSTD_0)
|
||||
#define I2S_STANDARD_LSB (SPI_I2SCFGR_I2SSTD_1)
|
||||
#define I2S_STANDARD_PCM_SHORT ((SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1))
|
||||
#define I2S_STANDARD_PCM_LONG ((SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1 | SPI_I2SCFGR_PCMSYNC))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -217,14 +213,9 @@ typedef struct
|
|||
* @{
|
||||
*/
|
||||
#define I2S_DATAFORMAT_16B (0x00000000U)
|
||||
#define I2S_DATAFORMAT_16B_EXTENDED (0x00000001U)
|
||||
#define I2S_DATAFORMAT_24B (0x00000003U)
|
||||
#define I2S_DATAFORMAT_32B (0x00000005U)
|
||||
|
||||
#define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B) || \
|
||||
((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \
|
||||
((FORMAT) == I2S_DATAFORMAT_24B) || \
|
||||
((FORMAT) == I2S_DATAFORMAT_32B))
|
||||
#define I2S_DATAFORMAT_16B_EXTENDED (SPI_I2SCFGR_CHLEN)
|
||||
#define I2S_DATAFORMAT_24B ((SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_0))
|
||||
#define I2S_DATAFORMAT_32B ((SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_1))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -232,11 +223,8 @@ typedef struct
|
|||
/** @defgroup I2S_MCLK_Output I2S MCLK Output
|
||||
* @{
|
||||
*/
|
||||
#define I2S_MCLKOUTPUT_ENABLE ((uint32_t)SPI_I2SPR_MCKOE)
|
||||
#define I2S_MCLKOUTPUT_DISABLE (0x00000000U)
|
||||
|
||||
#define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \
|
||||
((OUTPUT) == I2S_MCLKOUTPUT_DISABLE))
|
||||
#define I2S_MCLKOUTPUT_ENABLE (SPI_I2SPR_MCKOE)
|
||||
#define I2S_MCLKOUTPUT_DISABLE (0x00000000U)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -254,22 +242,15 @@ typedef struct
|
|||
#define I2S_AUDIOFREQ_11K (11025U)
|
||||
#define I2S_AUDIOFREQ_8K (8000U)
|
||||
#define I2S_AUDIOFREQ_DEFAULT (2U)
|
||||
|
||||
#define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K) && \
|
||||
((FREQ) <= I2S_AUDIOFREQ_192K)) || \
|
||||
((FREQ) == I2S_AUDIOFREQ_DEFAULT))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2S_FullDuplex_Mode I2S Full Duplex Mode
|
||||
/** @defgroup I2S_FullDuplex_Mode I2S FullDuplex Mode
|
||||
* @{
|
||||
*/
|
||||
#define I2S_FULLDUPLEXMODE_DISABLE (0x00000000U)
|
||||
#define I2S_FULLDUPLEXMODE_ENABLE (0x00000001U)
|
||||
|
||||
#define IS_I2S_FULLDUPLEX_MODE(MODE) (((MODE) == I2S_FULLDUPLEXMODE_DISABLE) || \
|
||||
((MODE) == I2S_FULLDUPLEXMODE_ENABLE))
|
||||
#define I2S_FULLDUPLEXMODE_DISABLE (0x00000000U)
|
||||
#define I2S_FULLDUPLEXMODE_ENABLE (0x00000001U)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -277,74 +258,105 @@ typedef struct
|
|||
/** @defgroup I2S_Clock_Polarity I2S Clock Polarity
|
||||
* @{
|
||||
*/
|
||||
#define I2S_CPOL_LOW (0x00000000U)
|
||||
#define I2S_CPOL_HIGH ((uint32_t)SPI_I2SCFGR_CKPOL)
|
||||
|
||||
#define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \
|
||||
((CPOL) == I2S_CPOL_HIGH))
|
||||
#define I2S_CPOL_LOW (0x00000000U)
|
||||
#define I2S_CPOL_HIGH (SPI_I2SCFGR_CKPOL)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2S_Interrupt_configuration_definition I2S Interrupt configuration definition
|
||||
/** @defgroup I2S_Interrupts_Definition I2S Interrupts Definition
|
||||
* @{
|
||||
*/
|
||||
#define I2S_IT_TXE SPI_CR2_TXEIE
|
||||
#define I2S_IT_RXNE SPI_CR2_RXNEIE
|
||||
#define I2S_IT_ERR SPI_CR2_ERRIE
|
||||
#define I2S_IT_TXE SPI_CR2_TXEIE
|
||||
#define I2S_IT_RXNE SPI_CR2_RXNEIE
|
||||
#define I2S_IT_ERR SPI_CR2_ERRIE
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2S_Flag_definition I2S Flag definition
|
||||
/** @defgroup I2S_Flags_Definition I2S Flags Definition
|
||||
* @{
|
||||
*/
|
||||
#define I2S_FLAG_TXE SPI_SR_TXE
|
||||
#define I2S_FLAG_RXNE SPI_SR_RXNE
|
||||
#define I2S_FLAG_TXE SPI_SR_TXE
|
||||
#define I2S_FLAG_RXNE SPI_SR_RXNE
|
||||
|
||||
#define I2S_FLAG_UDR SPI_SR_UDR
|
||||
#define I2S_FLAG_OVR SPI_SR_OVR
|
||||
#define I2S_FLAG_FRE SPI_SR_FRE
|
||||
#define I2S_FLAG_UDR SPI_SR_UDR
|
||||
#define I2S_FLAG_OVR SPI_SR_OVR
|
||||
#define I2S_FLAG_FRE SPI_SR_FRE
|
||||
|
||||
#define I2S_FLAG_CHSIDE SPI_SR_CHSIDE
|
||||
#define I2S_FLAG_BSY SPI_SR_BSY
|
||||
#define I2S_FLAG_CHSIDE SPI_SR_CHSIDE
|
||||
#define I2S_FLAG_BSY SPI_SR_BSY
|
||||
|
||||
#define I2S_FLAG_MASK (SPI_SR_RXNE\
|
||||
| SPI_SR_TXE | SPI_SR_UDR | SPI_SR_OVR | SPI_SR_FRE | SPI_SR_CHSIDE | SPI_SR_BSY)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2S_Clock_Source I2S Clock Source Definition
|
||||
* @{
|
||||
*/
|
||||
#define I2S_CLOCK_EXTERNAL (0x00000001U)
|
||||
#define I2S_CLOCK_SYSCLK (0x00000002U)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macros -----------------------------------------------------------*/
|
||||
/** @defgroup I2S_Exported_Macros I2S Exported Macros
|
||||
/** @defgroup I2S_Exported_macros I2S Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @brief Reset I2S handle state
|
||||
* @param __HANDLE__ I2S handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET)
|
||||
|
||||
/** @brief Enable or disable the specified SPI peripheral (in I2S mode).
|
||||
* @param __HANDLE__ specifies the I2S Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_I2S_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR |= SPI_I2SCFGR_I2SE)
|
||||
#define __HAL_I2S_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR &= (uint16_t)(~SPI_I2SCFGR_I2SE))
|
||||
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
|
||||
#define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) do{ \
|
||||
(__HANDLE__)->State = HAL_I2S_STATE_RESET; \
|
||||
(__HANDLE__)->MspInitCallback = NULL; \
|
||||
(__HANDLE__)->MspDeInitCallback = NULL; \
|
||||
} while(0)
|
||||
#else
|
||||
#define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET)
|
||||
#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
|
||||
|
||||
/** @brief Enable or disable the specified I2S interrupts.
|
||||
/** @brief Enable the specified SPI peripheral (in I2S mode).
|
||||
* @param __HANDLE__ specifies the I2S Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_I2S_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
|
||||
|
||||
/** @brief Disable the specified SPI peripheral (in I2S mode).
|
||||
* @param __HANDLE__ specifies the I2S Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_I2S_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
|
||||
|
||||
/** @brief Enable the specified I2S interrupts.
|
||||
* @param __HANDLE__ specifies the I2S Handle.
|
||||
* @param __INTERRUPT__ specifies the interrupt source to enable or disable.
|
||||
* This parameter can be one of the following values:
|
||||
* This parameter can be one of the following values:
|
||||
* @arg I2S_IT_TXE: Tx buffer empty interrupt enable
|
||||
* @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
|
||||
* @arg I2S_IT_ERR: Error interrupt enable
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
|
||||
#define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (uint16_t)(~(__INTERRUPT__)))
|
||||
#define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) (SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__)))
|
||||
|
||||
/** @brief Disable the specified I2S interrupts.
|
||||
* @param __HANDLE__ specifies the I2S Handle.
|
||||
* @param __INTERRUPT__ specifies the interrupt source to enable or disable.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg I2S_IT_TXE: Tx buffer empty interrupt enable
|
||||
* @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
|
||||
* @arg I2S_IT_ERR: Error interrupt enable
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) (CLEAR_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__)))
|
||||
|
||||
/** @brief Checks if the specified I2S interrupt source is enabled or disabled.
|
||||
* @param __HANDLE__ specifies the I2S Handle.
|
||||
|
@ -356,12 +368,13 @@ typedef struct
|
|||
* @arg I2S_IT_ERR: Error interrupt enable
|
||||
* @retval The new state of __IT__ (TRUE or FALSE).
|
||||
*/
|
||||
#define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
|
||||
#define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2\
|
||||
& (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
|
||||
|
||||
/** @brief Checks whether the specified I2S flag is set or not.
|
||||
* @param __HANDLE__ specifies the I2S Handle.
|
||||
* @param __FLAG__ specifies the flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* This parameter can be one of the following values:
|
||||
* @arg I2S_FLAG_RXNE: Receive buffer not empty flag
|
||||
* @arg I2S_FLAG_TXE: Transmit buffer empty flag
|
||||
* @arg I2S_FLAG_UDR: Underrun flag
|
||||
|
@ -378,25 +391,25 @@ typedef struct
|
|||
* @retval None
|
||||
*/
|
||||
#define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) do{ \
|
||||
__IO uint32_t tmpreg; \
|
||||
tmpreg = (__HANDLE__)->Instance->DR; \
|
||||
tmpreg = (__HANDLE__)->Instance->SR; \
|
||||
UNUSED(tmpreg); \
|
||||
__IO uint32_t tmpreg_ovr = 0x00U; \
|
||||
tmpreg_ovr = (__HANDLE__)->Instance->DR; \
|
||||
tmpreg_ovr = (__HANDLE__)->Instance->SR; \
|
||||
UNUSED(tmpreg_ovr); \
|
||||
}while(0U)
|
||||
/** @brief Clears the I2S UDR pending flag.
|
||||
* @param __HANDLE__ specifies the I2S Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) do{\
|
||||
__IO uint32_t tmpreg;\
|
||||
tmpreg = ((__HANDLE__)->Instance->SR);\
|
||||
UNUSED(tmpreg); \
|
||||
__IO uint32_t tmpreg_udr = 0x00U;\
|
||||
tmpreg_udr = ((__HANDLE__)->Instance->SR);\
|
||||
UNUSED(tmpreg_udr); \
|
||||
}while(0U)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Include I2S HAL Extended module */
|
||||
/* Include I2S Extension module */
|
||||
#include "stm32f3xx_hal_i2s_ex.h"
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
|
@ -407,12 +420,18 @@ typedef struct
|
|||
/** @addtogroup I2S_Exported_Functions_Group1
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Initialization and de-initialization functions *****************************/
|
||||
/* Initialization/de-initialization functions ********************************/
|
||||
HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s);
|
||||
HAL_StatusTypeDef HAL_I2S_DeInit (I2S_HandleTypeDef *hi2s);
|
||||
HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s);
|
||||
void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s);
|
||||
void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s);
|
||||
|
||||
/* Callbacks Register/UnRegister functions ***********************************/
|
||||
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
|
||||
HAL_StatusTypeDef HAL_I2S_RegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID,
|
||||
pI2S_CallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_I2S_UnRegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID);
|
||||
#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -421,11 +440,11 @@ void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s);
|
|||
* @{
|
||||
*/
|
||||
/* I/O operation functions ***************************************************/
|
||||
/* Blocking mode: Polling */
|
||||
/* Blocking mode: Polling */
|
||||
HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
|
||||
|
||||
/* Non-Blocking mode: Interrupt */
|
||||
/* Non-Blocking mode: Interrupt */
|
||||
HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
|
||||
void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s);
|
||||
|
@ -462,7 +481,82 @@ uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s);
|
|||
* @}
|
||||
*/
|
||||
|
||||
/* Private types -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private constants ---------------------------------------------------------*/
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/** @defgroup I2S_Private_Macros I2S Private Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @brief Check whether the specified SPI flag is set or not.
|
||||
* @param __SR__ copy of I2S SR regsiter.
|
||||
* @param __FLAG__ specifies the flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg I2S_FLAG_RXNE: Receive buffer not empty flag
|
||||
* @arg I2S_FLAG_TXE: Transmit buffer empty flag
|
||||
* @arg I2S_FLAG_UDR: Underrun error flag
|
||||
* @arg I2S_FLAG_OVR: Overrun flag
|
||||
* @arg I2S_FLAG_CHSIDE: Channel side flag
|
||||
* @arg I2S_FLAG_BSY: Busy flag
|
||||
* @retval SET or RESET.
|
||||
*/
|
||||
#define I2S_CHECK_FLAG(__SR__, __FLAG__) ((((__SR__)\
|
||||
& ((__FLAG__) & I2S_FLAG_MASK)) == ((__FLAG__) & I2S_FLAG_MASK)) ? SET : RESET)
|
||||
|
||||
/** @brief Check whether the specified SPI Interrupt is set or not.
|
||||
* @param __CR2__ copy of I2S CR2 regsiter.
|
||||
* @param __INTERRUPT__ specifies the SPI interrupt source to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg I2S_IT_TXE: Tx buffer empty interrupt enable
|
||||
* @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
|
||||
* @arg I2S_IT_ERR: Error interrupt enable
|
||||
* @retval SET or RESET.
|
||||
*/
|
||||
#define I2S_CHECK_IT_SOURCE(__CR2__, __INTERRUPT__) ((((__CR2__)\
|
||||
& (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
|
||||
|
||||
/** @brief Checks if I2S Mode parameter is in allowed range.
|
||||
* @param __MODE__ specifies the I2S Mode.
|
||||
* This parameter can be a value of @ref I2S_Mode
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_I2S_MODE(__MODE__) (((__MODE__) == I2S_MODE_SLAVE_TX) || \
|
||||
((__MODE__) == I2S_MODE_SLAVE_RX) || \
|
||||
((__MODE__) == I2S_MODE_MASTER_TX) || \
|
||||
((__MODE__) == I2S_MODE_MASTER_RX))
|
||||
|
||||
#define IS_I2S_STANDARD(__STANDARD__) (((__STANDARD__) == I2S_STANDARD_PHILIPS) || \
|
||||
((__STANDARD__) == I2S_STANDARD_MSB) || \
|
||||
((__STANDARD__) == I2S_STANDARD_LSB) || \
|
||||
((__STANDARD__) == I2S_STANDARD_PCM_SHORT) || \
|
||||
((__STANDARD__) == I2S_STANDARD_PCM_LONG))
|
||||
|
||||
#define IS_I2S_DATA_FORMAT(__FORMAT__) (((__FORMAT__) == I2S_DATAFORMAT_16B) || \
|
||||
((__FORMAT__) == I2S_DATAFORMAT_16B_EXTENDED) || \
|
||||
((__FORMAT__) == I2S_DATAFORMAT_24B) || \
|
||||
((__FORMAT__) == I2S_DATAFORMAT_32B))
|
||||
|
||||
#define IS_I2S_MCLK_OUTPUT(__OUTPUT__) (((__OUTPUT__) == I2S_MCLKOUTPUT_ENABLE) || \
|
||||
((__OUTPUT__) == I2S_MCLKOUTPUT_DISABLE))
|
||||
|
||||
#define IS_I2S_AUDIO_FREQ(__FREQ__) ((((__FREQ__) >= I2S_AUDIOFREQ_8K) && \
|
||||
((__FREQ__) <= I2S_AUDIOFREQ_192K)) || \
|
||||
((__FREQ__) == I2S_AUDIOFREQ_DEFAULT))
|
||||
|
||||
#define IS_I2S_FULLDUPLEX_MODE(MODE) (((MODE) == I2S_FULLDUPLEXMODE_DISABLE) || \
|
||||
((MODE) == I2S_FULLDUPLEXMODE_ENABLE))
|
||||
|
||||
/** @brief Checks if I2S Serial clock steady state parameter is in allowed range.
|
||||
* @param __CPOL__ specifies the I2S serial clock steady state.
|
||||
* This parameter can be a value of @ref I2S_Clock_Polarity
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_I2S_CPOL(__CPOL__) (((__CPOL__) == I2S_CPOL_LOW) || \
|
||||
((__CPOL__) == I2S_CPOL_HIGH))
|
||||
|
||||
#define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) || \
|
||||
((CLOCK) == I2S_CLOCK_SYSCLK))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -471,16 +565,15 @@ uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s);
|
|||
* @}
|
||||
*/
|
||||
|
||||
#endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
|
||||
/* STM32F302xC || STM32F303xC || STM32F358xx || */
|
||||
/* STM32F301x8 || STM32F302x8 || STM32F318xx || */
|
||||
/* STM32F373xC || STM32F378xx */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* SPI_I2S_SUPPORT */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* __STM32F3xx_HAL_I2S_H */
|
||||
#endif /* STM32F3xx_HAL_I2S_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
|
@ -2,68 +2,47 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_i2s_ex.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of I2S HAL Extended module.
|
||||
* @brief Header file of I2S HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_HAL_I2S_EX_H
|
||||
#define __STM32F3xx_HAL_I2S_EX_H
|
||||
#ifndef STM32F3xx_HAL_I2S_EX_H
|
||||
#define STM32F3xx_HAL_I2S_EX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
|
||||
defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \
|
||||
defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || \
|
||||
defined(STM32F373xC) || defined(STM32F378xx)
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f3xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32F3xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if defined(SPI_I2S_FULLDUPLEX_SUPPORT)
|
||||
/** @addtogroup I2SEx I2SEx
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* Exported macros ------------------------------------------------------------*/
|
||||
/* Exported macros -----------------------------------------------------------*/
|
||||
/** @defgroup I2SEx_Exported_Macros I2S Extended Exported Macros
|
||||
* @{
|
||||
*/
|
||||
#if defined(SPI_I2S_FULLDUPLEX_SUPPORT)
|
||||
|
||||
#define I2SxEXT(__INSTANCE__) ((__INSTANCE__) == (SPI2)? (SPI_TypeDef *)(I2S2ext_BASE): (SPI_TypeDef *)(I2S3ext_BASE))
|
||||
|
||||
/** @brief Enable or disable the specified I2SExt peripheral.
|
||||
|
@ -95,7 +74,8 @@
|
|||
* @arg I2S_IT_ERR: Error interrupt enable
|
||||
* @retval The new state of __IT__ (TRUE or FALSE).
|
||||
*/
|
||||
#define __HAL_I2SEXT_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((I2SxEXT((__HANDLE__)->Instance)->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
|
||||
#define __HAL_I2SEXT_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((I2SxEXT((__HANDLE__)->Instance)->CR2\
|
||||
& (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
|
||||
|
||||
/** @brief Checks whether the specified I2SExt flag is set or not.
|
||||
* @param __HANDLE__ specifies the I2S Handle.
|
||||
|
@ -116,104 +96,80 @@
|
|||
* @param __HANDLE__ specifies the I2S Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_I2SEXT_CLEAR_OVRFLAG(__HANDLE__) do{(I2SxEXT((__HANDLE__)->Instance)->DR;\
|
||||
(I2SxEXT((__HANDLE__)->Instance)->SR;}while(0U)
|
||||
#define __HAL_I2SEXT_CLEAR_OVRFLAG(__HANDLE__) do{ \
|
||||
__IO uint32_t tmpreg_ovr = 0x00U; \
|
||||
tmpreg_ovr = I2SxEXT((__HANDLE__)->Instance)->DR;\
|
||||
tmpreg_ovr = I2SxEXT((__HANDLE__)->Instance)->SR;\
|
||||
UNUSED(tmpreg_ovr); \
|
||||
}while(0U)
|
||||
/** @brief Clears the I2SExt UDR pending flag.
|
||||
* @param __HANDLE__ specifies the I2S Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_I2SEXT_CLEAR_UDRFLAG(__HANDLE__)(I2SxEXT((__HANDLE__)->Instance)->SR)
|
||||
#endif /* SPI_I2S_FULLDUPLEX_SUPPORT */
|
||||
/**
|
||||
#define __HAL_I2SEXT_CLEAR_UDRFLAG(__HANDLE__) do{ \
|
||||
__IO uint32_t tmpreg_udr = 0x00U; \
|
||||
tmpreg_udr = I2SxEXT((__HANDLE__)->Instance)->SR;\
|
||||
UNUSED(tmpreg_udr); \
|
||||
}while(0U)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/* Initialization/de-initialization functions ********************************/
|
||||
/** @addtogroup I2SEx_Exported_Functions I2S Extended Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if defined(SPI_I2S_FULLDUPLEX_SUPPORT)
|
||||
/** @addtogroup I2SEx_Exported_Functions_Group1 I2S Extended Features Functions
|
||||
/** @addtogroup I2SEx_Exported_Functions_Group1 I2S Extended IO operation functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Extended features functions ************************************************/
|
||||
/* Blocking mode: Polling */
|
||||
HAL_StatusTypeDef HAL_I2SEx_TransmitReceive(I2S_HandleTypeDef *hi2s, uint16_t *pTxData, uint16_t *pRxData, uint16_t Size, uint32_t Timeout);
|
||||
/* Extended features functions *************************************************/
|
||||
/* Blocking mode: Polling */
|
||||
HAL_StatusTypeDef HAL_I2SEx_TransmitReceive(I2S_HandleTypeDef *hi2s, uint16_t *pTxData, uint16_t *pRxData,
|
||||
uint16_t Size, uint32_t Timeout);
|
||||
/* Non-Blocking mode: Interrupt */
|
||||
HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pTxData, uint16_t *pRxData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pTxData, uint16_t *pRxData,
|
||||
uint16_t Size);
|
||||
/* Non-Blocking mode: DMA */
|
||||
HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pTxData, uint16_t *pRxData, uint16_t Size);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* SPI_I2S_FULLDUPLEX_SUPPORT */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup I2S I2S
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup I2S_Exported_Functions I2S Exported Functions
|
||||
* @{
|
||||
*/
|
||||
#if defined(SPI_I2S_FULLDUPLEX_SUPPORT)
|
||||
/** @addtogroup I2S_Exported_Functions_Group2 IO operation functions
|
||||
* @{
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pTxData, uint16_t *pRxData,
|
||||
uint16_t Size);
|
||||
/* I2S IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
|
||||
void HAL_I2S_FullDuplex_IRQHandler(I2S_HandleTypeDef *hi2s);
|
||||
void HAL_I2S_TxRxCpltCallback(I2S_HandleTypeDef *hi2s);
|
||||
/* Callback used in non blocking modes (DMA only) */
|
||||
void HAL_I2S_TxRxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
|
||||
void HAL_I2SEx_FullDuplex_IRQHandler(I2S_HandleTypeDef *hi2s);
|
||||
void HAL_I2SEx_TxRxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
|
||||
void HAL_I2SEx_TxRxCpltCallback(I2S_HandleTypeDef *hi2s);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/* Private types -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private constants ---------------------------------------------------------*/
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* SPI_I2S_FULLDUPLEX_SUPPORT */
|
||||
|
||||
/** @addtogroup I2S_Exported_Functions_Group3 Peripheral State and Errors functions
|
||||
* @{
|
||||
*/
|
||||
/* Peripheral Control and State functions ************************************/
|
||||
HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s);
|
||||
HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s);
|
||||
HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
|
||||
/* STM32F302xC || STM32F303xC || STM32F358xx || */
|
||||
/* STM32F301x8 || STM32F302x8 || STM32F318xx || */
|
||||
/* STM32F373xC || STM32F378xx */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* __STM32F3xx_HAL_I2S_EX_H */
|
||||
#endif /* STM32F3xx_HAL_I2S_EX_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
|
@ -2,44 +2,27 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_irda.h
|
||||
* @author MCD Application Team
|
||||
* @brief This file contains all the functions prototypes for the IRDA
|
||||
* firmware library.
|
||||
* @brief Header file of IRDA HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_HAL_IRDA_H
|
||||
#define __STM32F3xx_HAL_IRDA_H
|
||||
#ifndef STM32F3xx_HAL_IRDA_H
|
||||
#define STM32F3xx_HAL_IRDA_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
|
@ -65,7 +48,8 @@ typedef struct
|
|||
{
|
||||
uint32_t BaudRate; /*!< This member configures the IRDA communication baud rate.
|
||||
The baud rate register is computed using the following formula:
|
||||
Baud Rate Register = ((PCLKx) / ((hirda->Init.BaudRate))) */
|
||||
Baud Rate Register = ((usart_ker_clk) / ((hirda->Init.BaudRate)))
|
||||
where usart_ker_clk is the IRDA input clock */
|
||||
|
||||
uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
|
||||
This parameter can be a value of @ref IRDAEx_Word_Length */
|
||||
|
@ -86,11 +70,12 @@ typedef struct
|
|||
|
||||
uint16_t PowerMode; /*!< Specifies the IRDA power mode.
|
||||
This parameter can be a value of @ref IRDA_Low_Power */
|
||||
}IRDA_InitTypeDef;
|
||||
|
||||
} IRDA_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL IRDA State structures definition
|
||||
* @note HAL IRDA State value is a combination of 2 different substates: gState and RxState.
|
||||
* @brief HAL IRDA State definition
|
||||
* @note HAL IRDA State value is a combination of 2 different substates: gState and RxState (see @ref IRDA_State_Definition).
|
||||
* - gState contains IRDA state information related to global Handle management
|
||||
* and also information related to Tx operations.
|
||||
* gState value coding follow below described bitmap :
|
||||
|
@ -99,14 +84,14 @@ typedef struct
|
|||
* 01 : (Not Used)
|
||||
* 10 : Timeout
|
||||
* 11 : Error
|
||||
* b5 IP initilisation status
|
||||
* 0 : Reset (IP not initialized)
|
||||
* 1 : Init done (IP not initialized. HAL IRDA Init function already called)
|
||||
* b5 Peripheral initialization status
|
||||
* 0 : Reset (Peripheral not initialized)
|
||||
* 1 : Init done (Peripheral not initialized. HAL IRDA Init function already called)
|
||||
* b4-b3 (not used)
|
||||
* xx : Should be set to 00
|
||||
* b2 Intrinsic process state
|
||||
* 0 : Ready
|
||||
* 1 : Busy (IP busy with some configuration or internal operations)
|
||||
* 1 : Busy (Peripheral busy with some configuration or internal operations)
|
||||
* b1 (not used)
|
||||
* x : Should be set to 0
|
||||
* b0 Tx state
|
||||
|
@ -116,9 +101,9 @@ typedef struct
|
|||
* RxState value coding follow below described bitmap :
|
||||
* b7-b6 (not used)
|
||||
* xx : Should be set to 00
|
||||
* b5 IP initilisation status
|
||||
* 0 : Reset (IP not initialized)
|
||||
* 1 : Init done (IP not initialized)
|
||||
* b5 Peripheral initialization status
|
||||
* 0 : Reset (Peripheral not initialized)
|
||||
* 1 : Init done (Peripheral not initialized)
|
||||
* b4-b2 (not used)
|
||||
* xxx : Should be set to 000
|
||||
* b1 Rx state
|
||||
|
@ -127,46 +112,31 @@ typedef struct
|
|||
* b0 (not used)
|
||||
* x : Should be set to 0.
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_IRDA_STATE_RESET = 0x00U, /*!< Peripheral is not initialized
|
||||
Value is allowed for gState and RxState */
|
||||
HAL_IRDA_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use
|
||||
Value is allowed for gState and RxState */
|
||||
HAL_IRDA_STATE_BUSY = 0x24U, /*!< an internal process is ongoing
|
||||
Value is allowed for gState only */
|
||||
HAL_IRDA_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing
|
||||
Value is allowed for gState only */
|
||||
HAL_IRDA_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing
|
||||
Value is allowed for RxState only */
|
||||
HAL_IRDA_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing
|
||||
Not to be used for neither gState nor RxState.
|
||||
Value is result of combination (Or) between gState and RxState values */
|
||||
HAL_IRDA_STATE_TIMEOUT = 0xA0U, /*!< Timeout state
|
||||
Value is allowed for gState only */
|
||||
HAL_IRDA_STATE_ERROR = 0xE0U /*!< Error
|
||||
Value is allowed for gState only */
|
||||
}HAL_IRDA_StateTypeDef;
|
||||
typedef uint32_t HAL_IRDA_StateTypeDef;
|
||||
|
||||
/**
|
||||
* @brief IRDA clock sources definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
IRDA_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */
|
||||
IRDA_CLOCKSOURCE_PCLK2 = 0x01U, /*!< PCLK2 clock source */
|
||||
IRDA_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */
|
||||
IRDA_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */
|
||||
IRDA_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */
|
||||
IRDA_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */
|
||||
}IRDA_ClockSourceTypeDef;
|
||||
IRDA_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */
|
||||
IRDA_CLOCKSOURCE_PCLK2 = 0x01U, /*!< PCLK2 clock source */
|
||||
IRDA_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */
|
||||
IRDA_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */
|
||||
IRDA_CLOCKSOURCE_LSE = 0x10U, /*!< LSE clock source */
|
||||
IRDA_CLOCKSOURCE_UNDEFINED = 0x20U /*!< Undefined clock source */
|
||||
} IRDA_ClockSourceTypeDef;
|
||||
|
||||
/**
|
||||
* @brief IRDA handle Structure definition
|
||||
*/
|
||||
#if (USE_HAL_IRDA_REGISTER_CALLBACKS == 1)
|
||||
typedef struct __IRDA_HandleTypeDef
|
||||
#else
|
||||
typedef struct
|
||||
#endif /* USE_HAL_IRDA_REGISTER_CALLBACKS */
|
||||
{
|
||||
USART_TypeDef *Instance; /*!< IRDA registers base address */
|
||||
USART_TypeDef *Instance; /*!< USART registers base address */
|
||||
|
||||
IRDA_InitTypeDef Init; /*!< IRDA communication parameters */
|
||||
|
||||
|
@ -182,7 +152,7 @@ typedef struct
|
|||
|
||||
__IO uint16_t RxXferCount; /*!< IRDA Rx Transfer Counter */
|
||||
|
||||
uint16_t Mask; /*!< IRDA RX RDR register mask */
|
||||
uint16_t Mask; /*!< USART RX RDR register mask */
|
||||
|
||||
DMA_HandleTypeDef *hdmatx; /*!< IRDA Tx DMA Handle parameters */
|
||||
|
||||
|
@ -197,23 +167,59 @@ typedef struct
|
|||
__IO HAL_IRDA_StateTypeDef RxState; /*!< IRDA state information related to Rx operations.
|
||||
This parameter can be a value of @ref HAL_IRDA_StateTypeDef */
|
||||
|
||||
__IO uint32_t ErrorCode; /*!< IRDA Error code
|
||||
This parameter can be a value of @ref IRDA_Error */
|
||||
__IO uint32_t ErrorCode; /*!< IRDA Error code */
|
||||
|
||||
}IRDA_HandleTypeDef;
|
||||
#if (USE_HAL_IRDA_REGISTER_CALLBACKS == 1)
|
||||
void (* TxHalfCpltCallback)(struct __IRDA_HandleTypeDef *hirda); /*!< IRDA Tx Half Complete Callback */
|
||||
|
||||
void (* TxCpltCallback)(struct __IRDA_HandleTypeDef *hirda); /*!< IRDA Tx Complete Callback */
|
||||
|
||||
void (* RxHalfCpltCallback)(struct __IRDA_HandleTypeDef *hirda); /*!< IRDA Rx Half Complete Callback */
|
||||
|
||||
void (* RxCpltCallback)(struct __IRDA_HandleTypeDef *hirda); /*!< IRDA Rx Complete Callback */
|
||||
|
||||
void (* ErrorCallback)(struct __IRDA_HandleTypeDef *hirda); /*!< IRDA Error Callback */
|
||||
|
||||
void (* AbortCpltCallback)(struct __IRDA_HandleTypeDef *hirda); /*!< IRDA Abort Complete Callback */
|
||||
|
||||
void (* AbortTransmitCpltCallback)(struct __IRDA_HandleTypeDef *hirda); /*!< IRDA Abort Transmit Complete Callback */
|
||||
|
||||
void (* AbortReceiveCpltCallback)(struct __IRDA_HandleTypeDef *hirda); /*!< IRDA Abort Receive Complete Callback */
|
||||
|
||||
|
||||
void (* MspInitCallback)(struct __IRDA_HandleTypeDef *hirda); /*!< IRDA Msp Init callback */
|
||||
|
||||
void (* MspDeInitCallback)(struct __IRDA_HandleTypeDef *hirda); /*!< IRDA Msp DeInit callback */
|
||||
#endif /* USE_HAL_IRDA_REGISTER_CALLBACKS */
|
||||
|
||||
} IRDA_HandleTypeDef;
|
||||
|
||||
#if (USE_HAL_IRDA_REGISTER_CALLBACKS == 1)
|
||||
/**
|
||||
* @brief IRDA Configuration enumeration values definition
|
||||
* @brief HAL IRDA Callback ID enumeration definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
IRDA_BAUDRATE = 0x00U, /*!< IRDA Baud rate */
|
||||
IRDA_PARITY = 0x01U, /*!< IRDA frame parity */
|
||||
IRDA_WORDLENGTH = 0x02U, /*!< IRDA frame length */
|
||||
IRDA_MODE = 0x03U, /*!< IRDA communication mode */
|
||||
IRDA_PRESCALER = 0x04U, /*!< IRDA prescaling */
|
||||
IRDA_POWERMODE = 0x05U /*!< IRDA power mode */
|
||||
}IRDA_ControlTypeDef;
|
||||
HAL_IRDA_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< IRDA Tx Half Complete Callback ID */
|
||||
HAL_IRDA_TX_COMPLETE_CB_ID = 0x01U, /*!< IRDA Tx Complete Callback ID */
|
||||
HAL_IRDA_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< IRDA Rx Half Complete Callback ID */
|
||||
HAL_IRDA_RX_COMPLETE_CB_ID = 0x03U, /*!< IRDA Rx Complete Callback ID */
|
||||
HAL_IRDA_ERROR_CB_ID = 0x04U, /*!< IRDA Error Callback ID */
|
||||
HAL_IRDA_ABORT_COMPLETE_CB_ID = 0x05U, /*!< IRDA Abort Complete Callback ID */
|
||||
HAL_IRDA_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< IRDA Abort Transmit Complete Callback ID */
|
||||
HAL_IRDA_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< IRDA Abort Receive Complete Callback ID */
|
||||
|
||||
HAL_IRDA_MSPINIT_CB_ID = 0x08U, /*!< IRDA MspInit callback ID */
|
||||
HAL_IRDA_MSPDEINIT_CB_ID = 0x09U /*!< IRDA MspDeInit callback ID */
|
||||
|
||||
} HAL_IRDA_CallbackIDTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL IRDA Callback pointer definition
|
||||
*/
|
||||
typedef void (*pIRDA_CallbackTypeDef)(IRDA_HandleTypeDef *hirda); /*!< pointer to an IRDA callback function */
|
||||
|
||||
#endif /* USE_HAL_IRDA_REGISTER_CALLBACKS */
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
@ -224,16 +230,43 @@ typedef enum
|
|||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup IRDA_Error IRDA Error
|
||||
/** @defgroup IRDA_State_Definition IRDA State Code Definition
|
||||
* @{
|
||||
*/
|
||||
#define HAL_IRDA_ERROR_NONE (0x00000000U) /*!< No error */
|
||||
#define HAL_IRDA_ERROR_PE (0x00000001U) /*!< Parity error */
|
||||
#define HAL_IRDA_ERROR_NE (0x00000002U) /*!< Noise error */
|
||||
#define HAL_IRDA_ERROR_FE (0x00000004U) /*!< frame error */
|
||||
#define HAL_IRDA_ERROR_ORE (0x00000008U) /*!< Overrun error */
|
||||
#define HAL_IRDA_ERROR_DMA (0x00000010U) /*!< DMA transfer error */
|
||||
#define HAL_IRDA_ERROR_BUSY (0x00000020U) /*!< Busy Error */
|
||||
#define HAL_IRDA_STATE_RESET 0x00000000U /*!< Peripheral is not initialized
|
||||
Value is allowed for gState and RxState */
|
||||
#define HAL_IRDA_STATE_READY 0x00000020U /*!< Peripheral Initialized and ready for use
|
||||
Value is allowed for gState and RxState */
|
||||
#define HAL_IRDA_STATE_BUSY 0x00000024U /*!< An internal process is ongoing
|
||||
Value is allowed for gState only */
|
||||
#define HAL_IRDA_STATE_BUSY_TX 0x00000021U /*!< Data Transmission process is ongoing
|
||||
Value is allowed for gState only */
|
||||
#define HAL_IRDA_STATE_BUSY_RX 0x00000022U /*!< Data Reception process is ongoing
|
||||
Value is allowed for RxState only */
|
||||
#define HAL_IRDA_STATE_BUSY_TX_RX 0x00000023U /*!< Data Transmission and Reception process is ongoing
|
||||
Not to be used for neither gState nor RxState.
|
||||
Value is result of combination (Or) between gState and RxState values */
|
||||
#define HAL_IRDA_STATE_TIMEOUT 0x000000A0U /*!< Timeout state
|
||||
Value is allowed for gState only */
|
||||
#define HAL_IRDA_STATE_ERROR 0x000000E0U /*!< Error
|
||||
Value is allowed for gState only */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup IRDA_Error_Definition IRDA Error Code Definition
|
||||
* @{
|
||||
*/
|
||||
#define HAL_IRDA_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */
|
||||
#define HAL_IRDA_ERROR_PE ((uint32_t)0x00000001U) /*!< Parity error */
|
||||
#define HAL_IRDA_ERROR_NE ((uint32_t)0x00000002U) /*!< Noise error */
|
||||
#define HAL_IRDA_ERROR_FE ((uint32_t)0x00000004U) /*!< frame error */
|
||||
#define HAL_IRDA_ERROR_ORE ((uint32_t)0x00000008U) /*!< Overrun error */
|
||||
#define HAL_IRDA_ERROR_DMA ((uint32_t)0x00000010U) /*!< DMA transfer error */
|
||||
#define HAL_IRDA_ERROR_BUSY ((uint32_t)0x00000020U) /*!< Busy Error */
|
||||
#if (USE_HAL_IRDA_REGISTER_CALLBACKS == 1)
|
||||
#define HAL_IRDA_ERROR_INVALID_CALLBACK ((uint32_t)0x00000040U) /*!< Invalid Callback error */
|
||||
#endif /* USE_HAL_IRDA_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -241,9 +274,9 @@ typedef enum
|
|||
/** @defgroup IRDA_Parity IRDA Parity
|
||||
* @{
|
||||
*/
|
||||
#define IRDA_PARITY_NONE (0x00000000U) /*!< No parity */
|
||||
#define IRDA_PARITY_EVEN ((uint32_t)USART_CR1_PCE) /*!< Even parity */
|
||||
#define IRDA_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) /*!< Odd parity */
|
||||
#define IRDA_PARITY_NONE 0x00000000U /*!< No parity */
|
||||
#define IRDA_PARITY_EVEN USART_CR1_PCE /*!< Even parity */
|
||||
#define IRDA_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -251,9 +284,9 @@ typedef enum
|
|||
/** @defgroup IRDA_Transfer_Mode IRDA Transfer Mode
|
||||
* @{
|
||||
*/
|
||||
#define IRDA_MODE_RX ((uint32_t)USART_CR1_RE) /*!< RX mode */
|
||||
#define IRDA_MODE_TX ((uint32_t)USART_CR1_TE) /*!< TX mode */
|
||||
#define IRDA_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE)) /*!< RX and TX mode */
|
||||
#define IRDA_MODE_RX USART_CR1_RE /*!< RX mode */
|
||||
#define IRDA_MODE_TX USART_CR1_TE /*!< TX mode */
|
||||
#define IRDA_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -261,8 +294,8 @@ typedef enum
|
|||
/** @defgroup IRDA_Low_Power IRDA Low Power
|
||||
* @{
|
||||
*/
|
||||
#define IRDA_POWERMODE_NORMAL (0x00000000U) /*!< IRDA normal power mode */
|
||||
#define IRDA_POWERMODE_LOWPOWER ((uint32_t)USART_CR3_IRLP) /*!< IRDA low power mode */
|
||||
#define IRDA_POWERMODE_NORMAL 0x00000000U /*!< IRDA normal power mode */
|
||||
#define IRDA_POWERMODE_LOWPOWER USART_CR3_IRLP /*!< IRDA low power mode */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -270,26 +303,26 @@ typedef enum
|
|||
/** @defgroup IRDA_State IRDA State
|
||||
* @{
|
||||
*/
|
||||
#define IRDA_STATE_DISABLE (0x00000000U) /*!< IRDA disabled */
|
||||
#define IRDA_STATE_ENABLE ((uint32_t)USART_CR1_UE) /*!< IRDA enabled */
|
||||
#define IRDA_STATE_DISABLE 0x00000000U /*!< IRDA disabled */
|
||||
#define IRDA_STATE_ENABLE USART_CR1_UE /*!< IRDA enabled */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup IRDA_Mode IRDA Mode
|
||||
/** @defgroup IRDA_Mode IRDA Mode
|
||||
* @{
|
||||
*/
|
||||
#define IRDA_MODE_DISABLE (0x00000000U) /*!< Associated UART disabled in IRDA mode */
|
||||
#define IRDA_MODE_ENABLE ((uint32_t)USART_CR3_IREN) /*!< Associated UART enabled in IRDA mode */
|
||||
#define IRDA_MODE_DISABLE 0x00000000U /*!< Associated UART disabled in IRDA mode */
|
||||
#define IRDA_MODE_ENABLE USART_CR3_IREN /*!< Associated UART enabled in IRDA mode */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup IRDA_One_Bit IRDA One Bit Sampling
|
||||
/** @defgroup IRDA_One_Bit IRDA One Bit Sampling
|
||||
* @{
|
||||
*/
|
||||
#define IRDA_ONE_BIT_SAMPLE_DISABLE (0x00000000U) /*!< One-bit sampling disabled */
|
||||
#define IRDA_ONE_BIT_SAMPLE_ENABLE ((uint32_t)USART_CR3_ONEBIT) /*!< One-bit sampling enabled */
|
||||
#define IRDA_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disabled */
|
||||
#define IRDA_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enabled */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -297,17 +330,17 @@ typedef enum
|
|||
/** @defgroup IRDA_DMA_Tx IRDA DMA Tx
|
||||
* @{
|
||||
*/
|
||||
#define IRDA_DMA_TX_DISABLE (0x00000000U) /*!< IRDA DMA TX disabled */
|
||||
#define IRDA_DMA_TX_ENABLE ((uint32_t)USART_CR3_DMAT) /*!< IRDA DMA TX enabled */
|
||||
#define IRDA_DMA_TX_DISABLE 0x00000000U /*!< IRDA DMA TX disabled */
|
||||
#define IRDA_DMA_TX_ENABLE USART_CR3_DMAT /*!< IRDA DMA TX enabled */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup IRDA_DMA_Rx IRDA DMA Rx
|
||||
/** @defgroup IRDA_DMA_Rx IRDA DMA Rx
|
||||
* @{
|
||||
*/
|
||||
#define IRDA_DMA_RX_DISABLE (0x00000000U) /*!< IRDA DMA RX disabled */
|
||||
#define IRDA_DMA_RX_ENABLE ((uint32_t)USART_CR3_DMAR) /*!< IRDA DMA RX enabled */
|
||||
#define IRDA_DMA_RX_DISABLE 0x00000000U /*!< IRDA DMA RX disabled */
|
||||
#define IRDA_DMA_RX_ENABLE USART_CR3_DMAR /*!< IRDA DMA RX enabled */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -315,9 +348,9 @@ typedef enum
|
|||
/** @defgroup IRDA_Request_Parameters IRDA Request Parameters
|
||||
* @{
|
||||
*/
|
||||
#define IRDA_AUTOBAUD_REQUEST ((uint32_t)USART_RQR_ABRRQ) /*!< Auto-Baud Rate Request */
|
||||
#define IRDA_RXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_RXFRQ) /*!< Receive Data flush Request */
|
||||
#define IRDA_TXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_TXFRQ) /*!< Transmit data flush Request */
|
||||
#define IRDA_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */
|
||||
#define IRDA_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */
|
||||
#define IRDA_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -327,18 +360,18 @@ typedef enum
|
|||
* - 0xXXXX : Flag mask in the ISR register
|
||||
* @{
|
||||
*/
|
||||
#define IRDA_FLAG_REACK (0x00400000U) /*!< IRDA Receive enable acknowledge flag */
|
||||
#define IRDA_FLAG_TEACK (0x00200000U) /*!< IRDA Transmit enable acknowledge flag */
|
||||
#define IRDA_FLAG_BUSY (0x00010000U) /*!< IRDA Busy flag */
|
||||
#define IRDA_FLAG_ABRF (0x00008000U) /*!< IRDA Auto baud rate flag */
|
||||
#define IRDA_FLAG_ABRE (0x00004000U) /*!< IRDA Auto baud rate error */
|
||||
#define IRDA_FLAG_TXE (0x00000080U) /*!< IRDA Transmit data register empty */
|
||||
#define IRDA_FLAG_TC (0x00000040U) /*!< IRDA Transmission complete */
|
||||
#define IRDA_FLAG_RXNE (0x00000020U) /*!< IRDA Read data register not empty */
|
||||
#define IRDA_FLAG_ORE (0x00000008U) /*!< IRDA Overrun error */
|
||||
#define IRDA_FLAG_NE (0x00000004U) /*!< IRDA Noise error */
|
||||
#define IRDA_FLAG_FE (0x00000002U) /*!< IRDA Framing error */
|
||||
#define IRDA_FLAG_PE (0x00000001U) /*!< IRDA Parity error */
|
||||
#define IRDA_FLAG_REACK USART_ISR_REACK /*!< IRDA receive enable acknowledge flag */
|
||||
#define IRDA_FLAG_TEACK USART_ISR_TEACK /*!< IRDA transmit enable acknowledge flag */
|
||||
#define IRDA_FLAG_BUSY USART_ISR_BUSY /*!< IRDA busy flag */
|
||||
#define IRDA_FLAG_ABRF USART_ISR_ABRF /*!< IRDA auto Baud rate flag */
|
||||
#define IRDA_FLAG_ABRE USART_ISR_ABRE /*!< IRDA auto Baud rate error */
|
||||
#define IRDA_FLAG_TXE USART_ISR_TXE /*!< IRDA transmit data register empty */
|
||||
#define IRDA_FLAG_TC USART_ISR_TC /*!< IRDA transmission complete */
|
||||
#define IRDA_FLAG_RXNE USART_ISR_RXNE /*!< IRDA read data register not empty */
|
||||
#define IRDA_FLAG_ORE USART_ISR_ORE /*!< IRDA overrun error */
|
||||
#define IRDA_FLAG_NE USART_ISR_NE /*!< IRDA noise error */
|
||||
#define IRDA_FLAG_FE USART_ISR_FE /*!< IRDA frame error */
|
||||
#define IRDA_FLAG_PE USART_ISR_PE /*!< IRDA parity error */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -353,25 +386,35 @@ typedef enum
|
|||
* - ZZZZ : Flag position in the ISR register(4bits)
|
||||
* @{
|
||||
*/
|
||||
#define IRDA_IT_PE ((uint16_t)0x0028U) /*!< IRDA Parity error interruption */
|
||||
#define IRDA_IT_TXE ((uint16_t)0x0727U) /*!< IRDA Transmit data register empty interruption */
|
||||
#define IRDA_IT_TC ((uint16_t)0x0626U) /*!< IRDA Transmission complete interruption */
|
||||
#define IRDA_IT_RXNE ((uint16_t)0x0525U) /*!< IRDA Read data register not empty interruption */
|
||||
#define IRDA_IT_IDLE ((uint16_t)0x0424U) /*!< IRDA Idle interruption */
|
||||
#define IRDA_IT_ERR ((uint16_t)0x0060U) /*!< IRDA Error interruption */
|
||||
#define IRDA_IT_ORE ((uint16_t)0x0300U) /*!< IRDA Overrun error interruption */
|
||||
#define IRDA_IT_NE ((uint16_t)0x0200U) /*!< IRDA Noise error interruption */
|
||||
#define IRDA_IT_FE ((uint16_t)0x0100U) /*!< IRDA Frame error interruption */
|
||||
#define IRDA_IT_PE 0x0028U /*!< IRDA Parity error interruption */
|
||||
#define IRDA_IT_TXE 0x0727U /*!< IRDA Transmit data register empty interruption */
|
||||
#define IRDA_IT_TC 0x0626U /*!< IRDA Transmission complete interruption */
|
||||
#define IRDA_IT_RXNE 0x0525U /*!< IRDA Read data register not empty interruption */
|
||||
#define IRDA_IT_IDLE 0x0424U /*!< IRDA Idle interruption */
|
||||
|
||||
/* Elements values convention: 000000000XXYYYYYb
|
||||
- YYYYY : Interrupt source position in the XX register (5bits)
|
||||
- XX : Interrupt source register (2bits)
|
||||
- 01: CR1 register
|
||||
- 10: CR2 register
|
||||
- 11: CR3 register */
|
||||
#define IRDA_IT_ERR 0x0060U /*!< IRDA Error interruption */
|
||||
|
||||
/* Elements values convention: 0000ZZZZ00000000b
|
||||
- ZZZZ : Flag position in the ISR register(4bits) */
|
||||
#define IRDA_IT_ORE 0x0300U /*!< IRDA Overrun error interruption */
|
||||
#define IRDA_IT_NE 0x0200U /*!< IRDA Noise error interruption */
|
||||
#define IRDA_IT_FE 0x0100U /*!< IRDA Frame error interruption */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup IRDA_IT_CLEAR_Flags IRDA Interruption Clear Flags
|
||||
/** @defgroup IRDA_IT_CLEAR_Flags IRDA Interruption Clear Flags
|
||||
* @{
|
||||
*/
|
||||
#define IRDA_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */
|
||||
#define IRDA_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */
|
||||
#define IRDA_CLEAR_NEF USART_ICR_NCF /*!< Noise detected Clear Flag */
|
||||
#define IRDA_CLEAR_NEF USART_ICR_NCF /*!< Noise Error detected Clear Flag */
|
||||
#define IRDA_CLEAR_OREF USART_ICR_ORECF /*!< OverRun Error Clear Flag */
|
||||
#define IRDA_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */
|
||||
#define IRDA_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */
|
||||
|
@ -379,18 +422,21 @@ typedef enum
|
|||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup IRDA_Interruption_Mask IRDA interruptions flags mask
|
||||
/** @defgroup IRDA_Interruption_Mask IRDA interruptions flags mask
|
||||
* @{
|
||||
*/
|
||||
#define IRDA_IT_MASK ((uint16_t)0x001FU) /*!< IRDA Interruptions flags mask */
|
||||
#define IRDA_IT_MASK 0x001FU /*!< IRDA Interruptions flags mask */
|
||||
#define IRDA_CR_MASK 0x00E0U /*!< IRDA control register mask */
|
||||
#define IRDA_CR_POS 5U /*!< IRDA control register position */
|
||||
#define IRDA_ISR_MASK 0x1F00U /*!< IRDA ISR register mask */
|
||||
#define IRDA_ISR_POS 8U /*!< IRDA ISR register position */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macros -----------------------------------------------------------*/
|
||||
/** @defgroup IRDA_Exported_Macros IRDA Exported Macros
|
||||
|
@ -401,20 +447,29 @@ typedef enum
|
|||
* @param __HANDLE__ IRDA handle.
|
||||
* @retval None
|
||||
*/
|
||||
#if USE_HAL_IRDA_REGISTER_CALLBACKS == 1
|
||||
#define __HAL_IRDA_RESET_HANDLE_STATE(__HANDLE__) do{ \
|
||||
(__HANDLE__)->gState = HAL_IRDA_STATE_RESET; \
|
||||
(__HANDLE__)->RxState = HAL_IRDA_STATE_RESET; \
|
||||
(__HANDLE__)->MspInitCallback = NULL; \
|
||||
(__HANDLE__)->MspDeInitCallback = NULL; \
|
||||
} while(0U)
|
||||
#else
|
||||
#define __HAL_IRDA_RESET_HANDLE_STATE(__HANDLE__) do{ \
|
||||
(__HANDLE__)->gState = HAL_IRDA_STATE_RESET; \
|
||||
(__HANDLE__)->RxState = HAL_IRDA_STATE_RESET; \
|
||||
} while(0U)
|
||||
#endif /*USE_HAL_IRDA_REGISTER_CALLBACKS */
|
||||
|
||||
/** @brief Flush the IRDA DR register.
|
||||
* @param __HANDLE__ specifies the IRDA Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_IRDA_FLUSH_DRREGISTER(__HANDLE__) \
|
||||
do{ \
|
||||
SET_BIT((__HANDLE__)->Instance->RQR, IRDA_RXDATA_FLUSH_REQUEST); \
|
||||
SET_BIT((__HANDLE__)->Instance->RQR, IRDA_TXDATA_FLUSH_REQUEST); \
|
||||
} while(0U)
|
||||
do{ \
|
||||
SET_BIT((__HANDLE__)->Instance->RQR, IRDA_RXDATA_FLUSH_REQUEST); \
|
||||
SET_BIT((__HANDLE__)->Instance->RQR, IRDA_TXDATA_FLUSH_REQUEST); \
|
||||
} while(0U)
|
||||
|
||||
/** @brief Clear the specified IRDA pending flag.
|
||||
* @param __HANDLE__ specifies the IRDA Handle.
|
||||
|
@ -494,9 +549,9 @@ typedef enum
|
|||
* @arg @ref IRDA_IT_ERR Error interrupt(Frame error, noise error, overrun error)
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_IRDA_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & IRDA_IT_MASK))): \
|
||||
((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & IRDA_IT_MASK))): \
|
||||
((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & IRDA_IT_MASK))))
|
||||
#define __HAL_IRDA_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((__INTERRUPT__) & IRDA_CR_MASK) >> IRDA_CR_POS) == 1U)? ((__HANDLE__)->Instance->CR1 |= ((uint32_t)1U << ((__INTERRUPT__) & IRDA_IT_MASK))): \
|
||||
((((__INTERRUPT__) & IRDA_CR_MASK) >> IRDA_CR_POS) == 2U)? ((__HANDLE__)->Instance->CR2 |= ((uint32_t)1U << ((__INTERRUPT__) & IRDA_IT_MASK))): \
|
||||
((__HANDLE__)->Instance->CR3 |= ((uint32_t)1U << ((__INTERRUPT__) & IRDA_IT_MASK))))
|
||||
|
||||
/** @brief Disable the specified IRDA interrupt.
|
||||
* @param __HANDLE__ specifies the IRDA Handle.
|
||||
|
@ -510,14 +565,14 @@ typedef enum
|
|||
* @arg @ref IRDA_IT_ERR Error interrupt(Frame error, noise error, overrun error)
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_IRDA_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & IRDA_IT_MASK))): \
|
||||
((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & IRDA_IT_MASK))): \
|
||||
((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & IRDA_IT_MASK))))
|
||||
#define __HAL_IRDA_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((__INTERRUPT__) & IRDA_CR_MASK) >> IRDA_CR_POS) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ ((uint32_t)1U << ((__INTERRUPT__) & IRDA_IT_MASK))): \
|
||||
((((__INTERRUPT__) & IRDA_CR_MASK) >> IRDA_CR_POS) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ ((uint32_t)1U << ((__INTERRUPT__) & IRDA_IT_MASK))): \
|
||||
((__HANDLE__)->Instance->CR3 &= ~ ((uint32_t)1U << ((__INTERRUPT__) & IRDA_IT_MASK))))
|
||||
|
||||
|
||||
/** @brief Check whether the specified IRDA interrupt has occurred or not.
|
||||
* @param __HANDLE__ specifies the IRDA Handle.
|
||||
* @param __IT__ specifies the IRDA interrupt source to check.
|
||||
* @param __INTERRUPT__ specifies the IRDA interrupt source to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg @ref IRDA_IT_TXE Transmit Data Register empty interrupt
|
||||
* @arg @ref IRDA_IT_TC Transmission complete interrupt
|
||||
|
@ -527,13 +582,14 @@ typedef enum
|
|||
* @arg @ref IRDA_IT_NE Noise Error interrupt
|
||||
* @arg @ref IRDA_IT_FE Framing Error interrupt
|
||||
* @arg @ref IRDA_IT_PE Parity Error interrupt
|
||||
* @retval The new state of __IT__ (TRUE or FALSE).
|
||||
* @retval The new state of __IT__ (SET or RESET).
|
||||
*/
|
||||
#define __HAL_IRDA_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & (1U << ((__IT__)>> 0x08U)))
|
||||
#define __HAL_IRDA_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR\
|
||||
& (0x01U << (((__INTERRUPT__) & IRDA_ISR_MASK)>> IRDA_ISR_POS))) != 0U) ? SET : RESET)
|
||||
|
||||
/** @brief Check whether the specified IRDA interrupt source is enabled or not.
|
||||
* @param __HANDLE__ specifies the IRDA Handle.
|
||||
* @param __IT__ specifies the IRDA interrupt source to check.
|
||||
* @param __INTERRUPT__ specifies the IRDA interrupt source to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg @ref IRDA_IT_TXE Transmit Data Register empty interrupt
|
||||
* @arg @ref IRDA_IT_TC Transmission complete interrupt
|
||||
|
@ -541,11 +597,11 @@ typedef enum
|
|||
* @arg @ref IRDA_IT_IDLE Idle line detection interrupt
|
||||
* @arg @ref IRDA_IT_ERR Framing, overrun or noise error interrupt
|
||||
* @arg @ref IRDA_IT_PE Parity Error interrupt
|
||||
* @retval The new state of __IT__ (TRUE or FALSE).
|
||||
* @retval The new state of __IT__ (SET or RESET).
|
||||
*/
|
||||
#define __HAL_IRDA_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5U) == 1U)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5U) == 2U)? \
|
||||
(__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (1U << (((uint16_t)(__IT__)) & IRDA_IT_MASK)))
|
||||
|
||||
#define __HAL_IRDA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((__INTERRUPT__) & IRDA_CR_MASK) >> IRDA_CR_POS) == 0x01U)? (__HANDLE__)->Instance->CR1 : \
|
||||
(((((__INTERRUPT__) & IRDA_CR_MASK) >> IRDA_CR_POS) == 0x02U)? (__HANDLE__)->Instance->CR2 : \
|
||||
(__HANDLE__)->Instance->CR3)) & ((uint32_t)0x01U << (((uint16_t)(__INTERRUPT__)) & IRDA_IT_MASK))) != 0U) ? SET : RESET)
|
||||
|
||||
/** @brief Clear the specified IRDA ISR flag, in setting the proper ICR register flag.
|
||||
* @param __HANDLE__ specifies the IRDA Handle.
|
||||
|
@ -569,7 +625,6 @@ typedef enum
|
|||
* @arg @ref IRDA_AUTOBAUD_REQUEST Auto-Baud Rate Request
|
||||
* @arg @ref IRDA_RXDATA_FLUSH_REQUEST Receive Data flush Request
|
||||
* @arg @ref IRDA_TXDATA_FLUSH_REQUEST Transmit data flush Request
|
||||
*
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_IRDA_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__))
|
||||
|
@ -584,7 +639,8 @@ typedef enum
|
|||
* @param __HANDLE__ specifies the IRDA Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_IRDA_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_ONEBIT))
|
||||
#define __HAL_IRDA_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3\
|
||||
&= (uint32_t)~((uint32_t)USART_CR3_ONEBIT))
|
||||
|
||||
/** @brief Enable UART/USART associated to IRDA Handle.
|
||||
* @param __HANDLE__ specifies the IRDA Handle.
|
||||
|
@ -603,7 +659,7 @@ typedef enum
|
|||
*/
|
||||
|
||||
/* Private macros --------------------------------------------------------*/
|
||||
/** @defgroup IRDA_Private_Macros IRDA Private Macros
|
||||
/** @addtogroup IRDA_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
@ -619,8 +675,7 @@ typedef enum
|
|||
*/
|
||||
#define IS_IRDA_PRESCALER(__PRESCALER__) ((__PRESCALER__) > 0U)
|
||||
|
||||
/**
|
||||
* @brief Ensure that IRDA frame parity is valid.
|
||||
/** @brief Ensure that IRDA frame parity is valid.
|
||||
* @param __PARITY__ IRDA frame parity.
|
||||
* @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid)
|
||||
*/
|
||||
|
@ -628,63 +683,56 @@ typedef enum
|
|||
((__PARITY__) == IRDA_PARITY_EVEN) || \
|
||||
((__PARITY__) == IRDA_PARITY_ODD))
|
||||
|
||||
/**
|
||||
* @brief Ensure that IRDA communication mode is valid.
|
||||
/** @brief Ensure that IRDA communication mode is valid.
|
||||
* @param __MODE__ IRDA communication mode.
|
||||
* @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
|
||||
*/
|
||||
#define IS_IRDA_TX_RX_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(IRDA_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U))
|
||||
#define IS_IRDA_TX_RX_MODE(__MODE__) ((((__MODE__)\
|
||||
& (~((uint32_t)(IRDA_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U))
|
||||
|
||||
/**
|
||||
* @brief Ensure that IRDA power mode is valid.
|
||||
/** @brief Ensure that IRDA power mode is valid.
|
||||
* @param __MODE__ IRDA power mode.
|
||||
* @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
|
||||
*/
|
||||
#define IS_IRDA_POWERMODE(__MODE__) (((__MODE__) == IRDA_POWERMODE_LOWPOWER) || \
|
||||
((__MODE__) == IRDA_POWERMODE_NORMAL))
|
||||
|
||||
/**
|
||||
* @brief Ensure that IRDA state is valid.
|
||||
/** @brief Ensure that IRDA state is valid.
|
||||
* @param __STATE__ IRDA state mode.
|
||||
* @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid)
|
||||
*/
|
||||
#define IS_IRDA_STATE(__STATE__) (((__STATE__) == IRDA_STATE_DISABLE) || \
|
||||
((__STATE__) == IRDA_STATE_ENABLE))
|
||||
|
||||
/**
|
||||
* @brief Ensure that IRDA associated UART/USART mode is valid.
|
||||
/** @brief Ensure that IRDA associated UART/USART mode is valid.
|
||||
* @param __MODE__ IRDA associated UART/USART mode.
|
||||
* @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
|
||||
*/
|
||||
#define IS_IRDA_MODE(__MODE__) (((__MODE__) == IRDA_MODE_DISABLE) || \
|
||||
((__MODE__) == IRDA_MODE_ENABLE))
|
||||
|
||||
/**
|
||||
* @brief Ensure that IRDA sampling rate is valid.
|
||||
/** @brief Ensure that IRDA sampling rate is valid.
|
||||
* @param __ONEBIT__ IRDA sampling rate.
|
||||
* @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid)
|
||||
*/
|
||||
#define IS_IRDA_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == IRDA_ONE_BIT_SAMPLE_DISABLE) || \
|
||||
((__ONEBIT__) == IRDA_ONE_BIT_SAMPLE_ENABLE))
|
||||
|
||||
/**
|
||||
* @brief Ensure that IRDA DMA TX mode is valid.
|
||||
/** @brief Ensure that IRDA DMA TX mode is valid.
|
||||
* @param __DMATX__ IRDA DMA TX mode.
|
||||
* @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid)
|
||||
*/
|
||||
#define IS_IRDA_DMA_TX(__DMATX__) (((__DMATX__) == IRDA_DMA_TX_DISABLE) || \
|
||||
((__DMATX__) == IRDA_DMA_TX_ENABLE))
|
||||
|
||||
/**
|
||||
* @brief Ensure that IRDA DMA RX mode is valid.
|
||||
/** @brief Ensure that IRDA DMA RX mode is valid.
|
||||
* @param __DMARX__ IRDA DMA RX mode.
|
||||
* @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid)
|
||||
*/
|
||||
#define IS_IRDA_DMA_RX(__DMARX__) (((__DMARX__) == IRDA_DMA_RX_DISABLE) || \
|
||||
((__DMARX__) == IRDA_DMA_RX_ENABLE))
|
||||
|
||||
/**
|
||||
* @brief Ensure that IRDA request is valid.
|
||||
/** @brief Ensure that IRDA request is valid.
|
||||
* @param __PARAM__ IRDA request.
|
||||
* @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid)
|
||||
*/
|
||||
|
@ -692,8 +740,8 @@ typedef enum
|
|||
((__PARAM__) == IRDA_RXDATA_FLUSH_REQUEST) || \
|
||||
((__PARAM__) == IRDA_TXDATA_FLUSH_REQUEST))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Include IRDA HAL Extended module */
|
||||
#include "stm32f3xx_hal_irda_ex.h"
|
||||
|
@ -713,6 +761,13 @@ HAL_StatusTypeDef HAL_IRDA_DeInit(IRDA_HandleTypeDef *hirda);
|
|||
void HAL_IRDA_MspInit(IRDA_HandleTypeDef *hirda);
|
||||
void HAL_IRDA_MspDeInit(IRDA_HandleTypeDef *hirda);
|
||||
|
||||
#if (USE_HAL_IRDA_REGISTER_CALLBACKS == 1)
|
||||
/* Callbacks Register/UnRegister functions ***********************************/
|
||||
HAL_StatusTypeDef HAL_IRDA_RegisterCallback(IRDA_HandleTypeDef *hirda, HAL_IRDA_CallbackIDTypeDef CallbackID,
|
||||
pIRDA_CallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_IRDA_UnRegisterCallback(IRDA_HandleTypeDef *hirda, HAL_IRDA_CallbackIDTypeDef CallbackID);
|
||||
#endif /* USE_HAL_IRDA_REGISTER_CALLBACKS */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -745,9 +800,9 @@ void HAL_IRDA_RxCpltCallback(IRDA_HandleTypeDef *hirda);
|
|||
void HAL_IRDA_TxHalfCpltCallback(IRDA_HandleTypeDef *hirda);
|
||||
void HAL_IRDA_RxHalfCpltCallback(IRDA_HandleTypeDef *hirda);
|
||||
void HAL_IRDA_ErrorCallback(IRDA_HandleTypeDef *hirda);
|
||||
void HAL_IRDA_AbortCpltCallback (IRDA_HandleTypeDef *hirda);
|
||||
void HAL_IRDA_AbortTransmitCpltCallback (IRDA_HandleTypeDef *hirda);
|
||||
void HAL_IRDA_AbortReceiveCpltCallback (IRDA_HandleTypeDef *hirda);
|
||||
void HAL_IRDA_AbortCpltCallback(IRDA_HandleTypeDef *hirda);
|
||||
void HAL_IRDA_AbortTransmitCpltCallback(IRDA_HandleTypeDef *hirda);
|
||||
void HAL_IRDA_AbortReceiveCpltCallback(IRDA_HandleTypeDef *hirda);
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
@ -755,7 +810,7 @@ void HAL_IRDA_AbortReceiveCpltCallback (IRDA_HandleTypeDef *hirda);
|
|||
|
||||
/* Peripheral Control functions ************************************************/
|
||||
|
||||
/** @addtogroup IRDA_Exported_Functions_Group3 Peripheral State and Error functions
|
||||
/** @addtogroup IRDA_Exported_Functions_Group4 Peripheral State and Error functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
@ -783,6 +838,6 @@ uint32_t HAL_IRDA_GetError(IRDA_HandleTypeDef *hirda);
|
|||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F3xx_HAL_IRDA_H */
|
||||
#endif /* STM32F3xx_HAL_IRDA_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
|
@ -6,39 +6,23 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_HAL_IRDA_EX_H
|
||||
#define __STM32F3xx_HAL_IRDA_EX_H
|
||||
#ifndef STM32F3xx_HAL_IRDA_EX_H
|
||||
#define STM32F3xx_HAL_IRDA_EX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
|
@ -48,31 +32,28 @@
|
|||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup IRDAEx
|
||||
/** @defgroup IRDAEx IRDAEx
|
||||
* @brief IRDA Extended HAL module driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup IRDAEx_Exported_Constants IRDAEx Exported Constants
|
||||
/** @defgroup IRDAEx_Extended_Exported_Constants IRDAEx Extended Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup IRDAEx_Word_Length IRDA Word Length
|
||||
/** @defgroup IRDAEx_Word_Length IRDAEx Word Length
|
||||
* @{
|
||||
*/
|
||||
#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
|
||||
defined(STM32F334x8) || \
|
||||
defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
|
||||
#define IRDA_WORDLENGTH_7B ((uint32_t)USART_CR1_M1) /*!< 7-bit long frame */
|
||||
#define IRDA_WORDLENGTH_8B (0x00000000U) /*!< 8-bit long frame */
|
||||
#define IRDA_WORDLENGTH_9B ((uint32_t)USART_CR1_M0) /*!< 9-bit long frame */
|
||||
#else
|
||||
#if defined(USART_CR1_M1)&&defined(USART_CR1_M0)
|
||||
#define IRDA_WORDLENGTH_7B USART_CR1_M1 /*!< 7-bit long frame */
|
||||
#define IRDA_WORDLENGTH_8B 0x00000000U /*!< 8-bit long frame */
|
||||
#define IRDA_WORDLENGTH_9B USART_CR1_M0 /*!< 9-bit long frame */
|
||||
#elif defined(USART_CR1_M)
|
||||
#define IRDA_WORDLENGTH_8B (0x00000000U) /*!< 8-bit long frame */
|
||||
#define IRDA_WORDLENGTH_9B ((uint32_t)USART_CR1_M) /*!< 9-bit long frame */
|
||||
#endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
|
||||
/* STM32F334x8 || */
|
||||
/* STM32F301x8 || STM32F302x8 || STM32F318xx */
|
||||
#endif
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -82,7 +63,6 @@
|
|||
*/
|
||||
|
||||
/* Exported macros -----------------------------------------------------------*/
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
|
||||
|
@ -95,8 +75,7 @@
|
|||
* @param __CLOCKSOURCE__ output variable.
|
||||
* @retval IRDA clocking source, written in __CLOCKSOURCE__.
|
||||
*/
|
||||
#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
|
||||
defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)
|
||||
#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)
|
||||
#define IRDA_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
|
||||
do { \
|
||||
if((__HANDLE__)->Instance == USART1) \
|
||||
|
@ -183,7 +162,7 @@
|
|||
break; \
|
||||
} \
|
||||
} \
|
||||
else if ((__HANDLE__)->Instance == UART5) \
|
||||
else if((__HANDLE__)->Instance == UART5) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_UART5_SOURCE()) \
|
||||
{ \
|
||||
|
@ -209,8 +188,7 @@
|
|||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
|
||||
} \
|
||||
} while(0U)
|
||||
#elif defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
|
||||
defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
|
||||
#elif defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
|
||||
#define IRDA_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
|
||||
do { \
|
||||
if((__HANDLE__)->Instance == USART1) \
|
||||
|
@ -318,59 +296,55 @@
|
|||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
|
||||
} \
|
||||
} while(0U)
|
||||
#endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
|
||||
/* STM32F302xC || STM32F303xC || STM32F358xx || */
|
||||
|
||||
#endif /* STM32F302xE || STM32F303xE || STM32F398xx || STM32F302xC || STM32F303xC || STM32F358xx */
|
||||
|
||||
/** @brief Compute the mask to apply to retrieve the received data
|
||||
* according to the word length and to the parity bits activation.
|
||||
* @note If PCE = 1, the parity bit is not included in the data extracted
|
||||
* by the reception API().
|
||||
* This masking operation is not carried out in the case of
|
||||
* DMA transfers.
|
||||
* @param __HANDLE__ specifies the IRDA Handle.
|
||||
* @retval None, the mask to apply to the associated UART RDR register is stored in (__HANDLE__)->Mask field.
|
||||
*/
|
||||
#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
|
||||
defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || \
|
||||
defined(STM32F334x8)
|
||||
#if defined(USART_CR1_M1)&&defined(USART_CR1_M0)
|
||||
#define IRDA_MASK_COMPUTATION(__HANDLE__) \
|
||||
do { \
|
||||
if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_9B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_9B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x01FFU ; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x00FFU ; \
|
||||
} \
|
||||
} \
|
||||
else if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_8B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \
|
||||
{ \
|
||||
} \
|
||||
} \
|
||||
else if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_8B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x00FFU ; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x007FU ; \
|
||||
} \
|
||||
} \
|
||||
else if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_7B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \
|
||||
{ \
|
||||
} \
|
||||
} \
|
||||
else if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_7B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x007FU ; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x003FU ; \
|
||||
} \
|
||||
} \
|
||||
} while(0U)
|
||||
#else
|
||||
} \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x0000U; \
|
||||
} \
|
||||
} while(0U)
|
||||
#elif defined(USART_CR1_M)
|
||||
#define IRDA_MASK_COMPUTATION(__HANDLE__) \
|
||||
do { \
|
||||
if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_9B) \
|
||||
|
@ -396,26 +370,20 @@
|
|||
} \
|
||||
} \
|
||||
} while(0U)
|
||||
#endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
|
||||
/* STM32F301x8 || STM32F302x8 || STM32F318xx || */
|
||||
/* STM32F334x8 */
|
||||
/**
|
||||
* @brief Ensure that IRDA frame length is valid.
|
||||
#endif
|
||||
|
||||
/** @brief Ensure that IRDA frame length is valid.
|
||||
* @param __LENGTH__ IRDA frame length.
|
||||
* @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
|
||||
*/
|
||||
#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
|
||||
defined(STM32F334x8) || \
|
||||
defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
|
||||
#if defined(USART_CR1_M1)&&defined(USART_CR1_M0)
|
||||
#define IS_IRDA_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == IRDA_WORDLENGTH_7B) || \
|
||||
((__LENGTH__) == IRDA_WORDLENGTH_8B) || \
|
||||
((__LENGTH__) == IRDA_WORDLENGTH_9B))
|
||||
#else
|
||||
#elif defined(USART_CR1_M)
|
||||
#define IS_IRDA_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == IRDA_WORDLENGTH_8B) || \
|
||||
((__LENGTH__) == IRDA_WORDLENGTH_9B))
|
||||
#endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
|
||||
/* STM32F334x8 || */
|
||||
/* STM32F301x8 || STM32F302x8 || STM32F318xx */
|
||||
#endif
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -434,7 +402,6 @@
|
|||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F3xx_HAL_IRDA_EX_H */
|
||||
#endif /* STM32F3xx_HAL_IRDA_EX_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
||||
|
|
|
@ -6,39 +6,23 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_HAL_IWDG_H
|
||||
#define __STM32F3xx_HAL_IWDG_H
|
||||
#ifndef STM32F3xx_HAL_IWDG_H
|
||||
#define STM32F3xx_HAL_IWDG_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
|
@ -66,10 +50,10 @@ typedef struct
|
|||
This parameter can be a value of @ref IWDG_Prescaler */
|
||||
|
||||
uint32_t Reload; /*!< Specifies the IWDG down-counter reload value.
|
||||
This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFFU */
|
||||
This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
|
||||
|
||||
uint32_t Window; /*!< Specifies the window value to be compared to the down-counter.
|
||||
This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFFU */
|
||||
This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
|
||||
|
||||
} IWDG_InitTypeDef;
|
||||
|
||||
|
@ -81,8 +65,8 @@ typedef struct
|
|||
IWDG_TypeDef *Instance; /*!< Register base address */
|
||||
|
||||
IWDG_InitTypeDef Init; /*!< IWDG required parameters */
|
||||
} IWDG_HandleTypeDef;
|
||||
|
||||
}IWDG_HandleTypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
@ -96,13 +80,14 @@ typedef struct
|
|||
/** @defgroup IWDG_Prescaler IWDG Prescaler
|
||||
* @{
|
||||
*/
|
||||
#define IWDG_PRESCALER_4 0x00000000u /*!< IWDG prescaler set to 4 */
|
||||
#define IWDG_PRESCALER_8 IWDG_PR_PR_0 /*!< IWDG prescaler set to 8 */
|
||||
#define IWDG_PRESCALER_16 IWDG_PR_PR_1 /*!< IWDG prescaler set to 16 */
|
||||
#define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 32 */
|
||||
#define IWDG_PRESCALER_64 IWDG_PR_PR_2 /*!< IWDG prescaler set to 64 */
|
||||
#define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 128U */
|
||||
#define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< IWDG prescaler set to 256U */
|
||||
#define IWDG_PRESCALER_4 0x00000000u /*!< IWDG prescaler set to 4 */
|
||||
#define IWDG_PRESCALER_8 IWDG_PR_PR_0 /*!< IWDG prescaler set to 8 */
|
||||
#define IWDG_PRESCALER_16 IWDG_PR_PR_1 /*!< IWDG prescaler set to 16 */
|
||||
#define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 32 */
|
||||
#define IWDG_PRESCALER_64 IWDG_PR_PR_2 /*!< IWDG prescaler set to 64 */
|
||||
#define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 128 */
|
||||
#define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< IWDG prescaler set to 256 */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -115,6 +100,7 @@ typedef struct
|
|||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -133,7 +119,7 @@ typedef struct
|
|||
|
||||
/**
|
||||
* @brief Reload IWDG counter with value defined in the reload register
|
||||
* (write access to IWDG_PR, IWDG_RLR & IWDG_WINR registers disabled).
|
||||
* (write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers disabled).
|
||||
* @param __HANDLE__ IWDG handle
|
||||
* @retval None
|
||||
*/
|
||||
|
@ -174,6 +160,7 @@ HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
|
|||
/** @defgroup IWDG_Private_Constants IWDG Private Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief IWDG Key Register BitMask
|
||||
*/
|
||||
|
@ -190,6 +177,7 @@ HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
|
|||
/** @defgroup IWDG_Private_Macros IWDG Private Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
|
||||
* @param __HANDLE__ IWDG handle
|
||||
|
@ -231,6 +219,7 @@ HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
|
|||
*/
|
||||
#define IS_IWDG_WINDOW(__WINDOW__) ((__WINDOW__) <= IWDG_WINR_WIN)
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -248,6 +237,6 @@ HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
|
|||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F3xx_HAL_IWDG_H */
|
||||
#endif /* STM32F3xx_HAL_IWDG_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
|
@ -6,43 +6,28 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_HAL_NAND_H
|
||||
#define __STM32F3xx_HAL_NAND_H
|
||||
#ifndef STM32F3xx_HAL_NAND_H
|
||||
#define STM32F3xx_HAL_NAND_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if defined(FMC_BANK3)
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)
|
||||
#include "stm32f3xx_ll_fmc.h"
|
||||
|
||||
/** @addtogroup STM32F3xx_HAL_Driver
|
||||
|
@ -68,7 +53,7 @@ typedef enum
|
|||
HAL_NAND_STATE_READY = 0x01U, /*!< NAND initialized and ready for use */
|
||||
HAL_NAND_STATE_BUSY = 0x02U, /*!< NAND internal process is ongoing */
|
||||
HAL_NAND_STATE_ERROR = 0x03U /*!< NAND error state */
|
||||
}HAL_NAND_StateTypeDef;
|
||||
} HAL_NAND_StateTypeDef;
|
||||
|
||||
/**
|
||||
* @brief NAND Memory electronic signature Structure definition
|
||||
|
@ -84,20 +69,20 @@ typedef struct
|
|||
uint8_t Third_Id;
|
||||
|
||||
uint8_t Fourth_Id;
|
||||
}NAND_IDTypeDef;
|
||||
} NAND_IDTypeDef;
|
||||
|
||||
/**
|
||||
* @brief NAND Memory address Structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint16_t Page; /*!< NAND memory Page address */
|
||||
uint16_t Page; /*!< NAND memory Page address */
|
||||
|
||||
uint16_t Plane; /*!< NAND memory Plane address */
|
||||
uint16_t Plane; /*!< NAND memory Zone address */
|
||||
|
||||
uint16_t Block; /*!< NAND memory Block address */
|
||||
uint16_t Block; /*!< NAND memory Block address */
|
||||
|
||||
}NAND_AddressTypeDef;
|
||||
} NAND_AddressTypeDef;
|
||||
|
||||
/**
|
||||
* @brief NAND Memory info Structure definition
|
||||
|
@ -116,7 +101,7 @@ typedef struct
|
|||
|
||||
uint32_t PlaneNbr; /*!< NAND memory number of planes */
|
||||
|
||||
uint32_t PlaneSize; /*!< NAND memory plane size measured in number of blocks */
|
||||
uint32_t PlaneSize; /*!< NAND memory zone size measured in number of blocks */
|
||||
|
||||
FunctionalState ExtraCommandEnable; /*!< NAND extra command needed for Page reading mode. This
|
||||
parameter is mandatory for some NAND parts after the read
|
||||
|
@ -124,12 +109,16 @@ typedef struct
|
|||
Example: Toshiba THTH58BYG3S0HBAI6.
|
||||
This parameter could be ENABLE or DISABLE
|
||||
Please check the Read Mode sequnece in the NAND device datasheet */
|
||||
}NAND_DeviceConfigTypeDef;
|
||||
} NAND_DeviceConfigTypeDef;
|
||||
|
||||
/**
|
||||
* @brief NAND handle Structure definition
|
||||
*/
|
||||
#if (USE_HAL_NAND_REGISTER_CALLBACKS == 1)
|
||||
typedef struct __NAND_HandleTypeDef
|
||||
#else
|
||||
typedef struct
|
||||
#endif /* USE_HAL_NAND_REGISTER_CALLBACKS */
|
||||
{
|
||||
FMC_NAND_TypeDef *Instance; /*!< Register base address */
|
||||
|
||||
|
@ -141,13 +130,36 @@ typedef struct
|
|||
|
||||
NAND_DeviceConfigTypeDef Config; /*!< NAND phusical characteristic information structure */
|
||||
|
||||
}NAND_HandleTypeDef;
|
||||
#if (USE_HAL_NAND_REGISTER_CALLBACKS == 1)
|
||||
void (* MspInitCallback) ( struct __NAND_HandleTypeDef * hnand); /*!< NAND Msp Init callback */
|
||||
void (* MspDeInitCallback) ( struct __NAND_HandleTypeDef * hnand); /*!< NAND Msp DeInit callback */
|
||||
void (* ItCallback) ( struct __NAND_HandleTypeDef * hnand); /*!< NAND IT callback */
|
||||
#endif
|
||||
} NAND_HandleTypeDef;
|
||||
|
||||
#if (USE_HAL_NAND_REGISTER_CALLBACKS == 1)
|
||||
/**
|
||||
* @brief HAL NAND Callback ID enumeration definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_NAND_MSP_INIT_CB_ID = 0x00U, /*!< NAND MspInit Callback ID */
|
||||
HAL_NAND_MSP_DEINIT_CB_ID = 0x01U, /*!< NAND MspDeInit Callback ID */
|
||||
HAL_NAND_IT_CB_ID = 0x02U /*!< NAND IT Callback ID */
|
||||
}HAL_NAND_CallbackIDTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL NAND Callback pointer definition
|
||||
*/
|
||||
typedef void (*pNAND_CallbackTypeDef)(NAND_HandleTypeDef *hnand);
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* Exported macros ------------------------------------------------------------*/
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/** @defgroup NAND_Exported_Macros NAND Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
@ -156,7 +168,15 @@ typedef struct
|
|||
* @param __HANDLE__ specifies the NAND handle.
|
||||
* @retval None
|
||||
*/
|
||||
#if (USE_HAL_NAND_REGISTER_CALLBACKS == 1)
|
||||
#define __HAL_NAND_RESET_HANDLE_STATE(__HANDLE__) do { \
|
||||
(__HANDLE__)->State = HAL_NAND_STATE_RESET; \
|
||||
(__HANDLE__)->MspInitCallback = NULL; \
|
||||
(__HANDLE__)->MspDeInitCallback = NULL; \
|
||||
} while(0)
|
||||
#else
|
||||
#define __HAL_NAND_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NAND_STATE_RESET)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
@ -171,7 +191,6 @@ typedef struct
|
|||
* @{
|
||||
*/
|
||||
|
||||
/* Initialization/de-initialization functions ********************************/
|
||||
/* Initialization/de-initialization functions ********************************/
|
||||
HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing);
|
||||
HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand);
|
||||
|
@ -208,9 +227,14 @@ HAL_StatusTypeDef HAL_NAND_Write_SpareArea_16b(NAND_HandleTypeDef *hnand, NAND_
|
|||
|
||||
HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
|
||||
|
||||
uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand);
|
||||
uint32_t HAL_NAND_Address_Inc(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
|
||||
|
||||
#if (USE_HAL_NAND_REGISTER_CALLBACKS == 1)
|
||||
/* NAND callback registering/unregistering */
|
||||
HAL_StatusTypeDef HAL_NAND_RegisterCallback(NAND_HandleTypeDef *hnand, HAL_NAND_CallbackIDTypeDef CallbackId, pNAND_CallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_NAND_UnRegisterCallback(NAND_HandleTypeDef *hnand, HAL_NAND_CallbackIDTypeDef CallbackId);
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -233,6 +257,7 @@ HAL_StatusTypeDef HAL_NAND_GetECC(NAND_HandleTypeDef *hnand, uint32_t *ECCval,
|
|||
*/
|
||||
/* NAND State functions *******************************************************/
|
||||
HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand);
|
||||
uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -247,34 +272,34 @@ HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand);
|
|||
/** @defgroup NAND_Private_Constants NAND Private Constants
|
||||
* @{
|
||||
*/
|
||||
#define NAND_DEVICE1 FMC_BANK2
|
||||
#define NAND_DEVICE2 FMC_BANK3
|
||||
#define NAND_WRITE_TIMEOUT 0x01000000U
|
||||
#define NAND_DEVICE1 ((uint32_t)0x70000000U)
|
||||
#define NAND_DEVICE2 ((uint32_t)0x80000000U)
|
||||
#define NAND_WRITE_TIMEOUT ((uint32_t)0x01000000U)
|
||||
|
||||
#define CMD_AREA ((uint32_t)(1U<<16U)) /* A16 = CLE high */
|
||||
#define ADDR_AREA ((uint32_t)(1U<<17U)) /* A17 = ALE high */
|
||||
#define CMD_AREA ((uint32_t)(1UL<<16U)) /* A16 = CLE high */
|
||||
#define ADDR_AREA ((uint32_t)(1UL<<17U)) /* A17 = ALE high */
|
||||
|
||||
#define NAND_CMD_AREA_A ((uint8_t)0x00)
|
||||
#define NAND_CMD_AREA_B ((uint8_t)0x01)
|
||||
#define NAND_CMD_AREA_C ((uint8_t)0x50)
|
||||
#define NAND_CMD_AREA_TRUE1 ((uint8_t)0x30)
|
||||
#define NAND_CMD_AREA_A ((uint8_t)0x00U)
|
||||
#define NAND_CMD_AREA_B ((uint8_t)0x01U)
|
||||
#define NAND_CMD_AREA_C ((uint8_t)0x50U)
|
||||
#define NAND_CMD_AREA_TRUE1 ((uint8_t)0x30U)
|
||||
|
||||
#define NAND_CMD_WRITE0 ((uint8_t)0x80)
|
||||
#define NAND_CMD_WRITE_TRUE1 ((uint8_t)0x10)
|
||||
#define NAND_CMD_ERASE0 ((uint8_t)0x60)
|
||||
#define NAND_CMD_ERASE1 ((uint8_t)0xD0)
|
||||
#define NAND_CMD_READID ((uint8_t)0x90)
|
||||
#define NAND_CMD_STATUS ((uint8_t)0x70)
|
||||
#define NAND_CMD_LOCK_STATUS ((uint8_t)0x7A)
|
||||
#define NAND_CMD_RESET ((uint8_t)0xFF)
|
||||
#define NAND_CMD_WRITE0 ((uint8_t)0x80U)
|
||||
#define NAND_CMD_WRITE_TRUE1 ((uint8_t)0x10U)
|
||||
#define NAND_CMD_ERASE0 ((uint8_t)0x60U)
|
||||
#define NAND_CMD_ERASE1 ((uint8_t)0xD0U)
|
||||
#define NAND_CMD_READID ((uint8_t)0x90U)
|
||||
#define NAND_CMD_STATUS ((uint8_t)0x70U)
|
||||
#define NAND_CMD_LOCK_STATUS ((uint8_t)0x7AU)
|
||||
#define NAND_CMD_RESET ((uint8_t)0xFFU)
|
||||
|
||||
/* NAND memory status */
|
||||
#define NAND_VALID_ADDRESS 0x00000100U
|
||||
#define NAND_INVALID_ADDRESS 0x00000200U
|
||||
#define NAND_TIMEOUT_ERROR 0x00000400U
|
||||
#define NAND_BUSY 0x00000000U
|
||||
#define NAND_ERROR 0x00000001U
|
||||
#define NAND_READY 0x00000040U
|
||||
#define NAND_VALID_ADDRESS ((uint32_t)0x00000100U)
|
||||
#define NAND_INVALID_ADDRESS ((uint32_t)0x00000200U)
|
||||
#define NAND_TIMEOUT_ERROR ((uint32_t)0x00000400U)
|
||||
#define NAND_BUSY ((uint32_t)0x00000000U)
|
||||
#define NAND_ERROR ((uint32_t)0x00000001U)
|
||||
#define NAND_READY ((uint32_t)0x00000040U)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -287,7 +312,7 @@ HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand);
|
|||
/**
|
||||
* @brief NAND memory address computation.
|
||||
* @param __ADDRESS__ NAND memory address.
|
||||
* @param __HANDLE__ NAND handle.
|
||||
* @param __HANDLE__ NAND handle.
|
||||
* @retval NAND Raw address value
|
||||
*/
|
||||
#define ARRAY_ADDRESS(__ADDRESS__ , __HANDLE__) ((__ADDRESS__)->Page + \
|
||||
|
@ -315,7 +340,7 @@ HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand);
|
|||
* @param __ADDRESS__ NAND memory address.
|
||||
* @retval NAND Column address cycling value.
|
||||
*/
|
||||
#define COLUMN_1ST_CYCLE(__ADDRESS__) (uint8_t)(__ADDRESS__) /* 1st Column addressing cycle */
|
||||
#define COLUMN_1ST_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) & 0xFFU) /* 1st Column addressing cycle */
|
||||
#define COLUMN_2ND_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 8) /* 2nd Column addressing cycle */
|
||||
|
||||
/**
|
||||
|
@ -325,6 +350,7 @@ HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand);
|
|||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -333,12 +359,12 @@ HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand);
|
|||
* @}
|
||||
*/
|
||||
|
||||
#endif /* STM32F302xE || STM32F303xE || STM32F398xx */
|
||||
#endif /* FMC_BANK3 */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F3xx_HAL_NAND_H */
|
||||
#endif /* STM32F3xx_HAL_NAND_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
|
@ -6,43 +6,28 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_HAL_NOR_H
|
||||
#define __STM32F3xx_HAL_NOR_H
|
||||
#ifndef STM32F3xx_HAL_NOR_H
|
||||
#define STM32F3xx_HAL_NOR_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if defined FMC_BANK1
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)
|
||||
#include "stm32f3xx_ll_fmc.h"
|
||||
|
||||
/** @addtogroup STM32F3xx_HAL_Driver
|
||||
|
@ -53,65 +38,6 @@
|
|||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/** @addtogroup NOR_Private_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* NOR device IDs addresses */
|
||||
#define MC_ADDRESS ((uint16_t)0x0000U)
|
||||
#define DEVICE_CODE1_ADDR ((uint16_t)0x0001U)
|
||||
#define DEVICE_CODE2_ADDR ((uint16_t)0x000EU)
|
||||
#define DEVICE_CODE3_ADDR ((uint16_t)0x000FU)
|
||||
|
||||
/* NOR CFI IDs addresses */
|
||||
#define CFI1_ADDRESS ((uint16_t)0x10U)
|
||||
#define CFI2_ADDRESS ((uint16_t)0x11U)
|
||||
#define CFI3_ADDRESS ((uint16_t)0x12U)
|
||||
#define CFI4_ADDRESS ((uint16_t)0x13U)
|
||||
|
||||
/* NOR memory data width */
|
||||
#define NOR_MEMORY_8B ((uint8_t)0x0U)
|
||||
#define NOR_MEMORY_16B ((uint8_t)0x1U)
|
||||
|
||||
/* NOR memory device read/write start address */
|
||||
#define NOR_MEMORY_ADRESS1 FMC_BANK1_1
|
||||
#define NOR_MEMORY_ADRESS2 FMC_BANK1_2
|
||||
#define NOR_MEMORY_ADRESS3 FMC_BANK1_3
|
||||
#define NOR_MEMORY_ADRESS4 FMC_BANK1_4
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup NOR_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief NOR memory address shifting.
|
||||
* @param __NOR_ADDRESS NOR base address
|
||||
* @param __NOR_MEMORY_WIDTH_ NOR memory width
|
||||
* @param __ADDRESS__ NOR memory address
|
||||
* @retval NOR shifted address value
|
||||
*/
|
||||
#define NOR_ADDR_SHIFT(__NOR_ADDRESS, __NOR_MEMORY_WIDTH_, __ADDRESS__) \
|
||||
((uint32_t)(((__NOR_MEMORY_WIDTH_) == NOR_MEMORY_16B)? \
|
||||
((uint32_t)((__NOR_ADDRESS) + (2U * (__ADDRESS__)))): \
|
||||
((uint32_t)((__NOR_ADDRESS) + (__ADDRESS__)))))
|
||||
|
||||
/**
|
||||
* @brief NOR memory write data to specified address.
|
||||
* @param __ADDRESS__ NOR memory address
|
||||
* @param __DATA__ Data to write
|
||||
* @retval None
|
||||
*/
|
||||
#define NOR_WRITE(__ADDRESS__, __DATA__) (*(__IO uint16_t *)((uint32_t)(__ADDRESS__)) = (__DATA__))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported typedef ----------------------------------------------------------*/
|
||||
/** @defgroup NOR_Exported_Types NOR Exported Types
|
||||
* @{
|
||||
|
@ -126,19 +52,19 @@ typedef enum
|
|||
HAL_NOR_STATE_READY = 0x01U, /*!< NOR initialized and ready for use */
|
||||
HAL_NOR_STATE_BUSY = 0x02U, /*!< NOR internal processing is ongoing */
|
||||
HAL_NOR_STATE_ERROR = 0x03U, /*!< NOR error state */
|
||||
HAL_NOR_STATE_PROTECTED = 0x04 /*!< NOR NORSRAM device write protected */
|
||||
}HAL_NOR_StateTypeDef;
|
||||
HAL_NOR_STATE_PROTECTED = 0x04U /*!< NOR NORSRAM device write protected */
|
||||
} HAL_NOR_StateTypeDef;
|
||||
|
||||
/**
|
||||
* @brief FMC NOR Status typedef
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_NOR_STATUS_SUCCESS = 0U,
|
||||
HAL_NOR_STATUS_SUCCESS = 0U,
|
||||
HAL_NOR_STATUS_ONGOING,
|
||||
HAL_NOR_STATUS_ERROR,
|
||||
HAL_NOR_STATUS_TIMEOUT
|
||||
}HAL_NOR_StatusTypeDef;
|
||||
} HAL_NOR_StatusTypeDef;
|
||||
|
||||
/**
|
||||
* @brief FMC NOR ID typedef
|
||||
|
@ -154,29 +80,36 @@ typedef struct
|
|||
uint16_t Device_Code3; /*!< Defines the device's codes used to identify the memory.
|
||||
These codes can be accessed by performing read operations with specific
|
||||
control signals and addresses set.They can also be accessed by issuing
|
||||
an Auto Select command. */
|
||||
}NOR_IDTypeDef;
|
||||
an Auto Select command */
|
||||
} NOR_IDTypeDef;
|
||||
|
||||
/**
|
||||
* @brief FMC NOR CFI typedef
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
/*!< Defines the information stored in the memory's Common flash interface
|
||||
which contains a description of various electrical and timing parameters,
|
||||
density information and functions supported by the memory */
|
||||
|
||||
uint16_t CFI_1;
|
||||
|
||||
uint16_t CFI_2;
|
||||
|
||||
uint16_t CFI_3;
|
||||
|
||||
uint16_t CFI_4; /*!< Defines the information stored in the memory's Common flash interface
|
||||
which contains a description of various electrical and timing parameters,
|
||||
density information and functions supported by the memory. */
|
||||
}NOR_CFITypeDef;
|
||||
uint16_t CFI_4;
|
||||
} NOR_CFITypeDef;
|
||||
|
||||
/**
|
||||
* @brief NOR handle Structure definition
|
||||
*/
|
||||
#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
|
||||
typedef struct __NOR_HandleTypeDef
|
||||
#else
|
||||
typedef struct
|
||||
#endif /* USE_HAL_NOR_REGISTER_CALLBACKS */
|
||||
|
||||
{
|
||||
FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
|
||||
|
||||
|
@ -188,8 +121,27 @@ typedef struct
|
|||
|
||||
__IO HAL_NOR_StateTypeDef State; /*!< NOR device access state */
|
||||
|
||||
}NOR_HandleTypeDef;
|
||||
#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
|
||||
void (* MspInitCallback) ( struct __NOR_HandleTypeDef * hnor); /*!< NOR Msp Init callback */
|
||||
void (* MspDeInitCallback) ( struct __NOR_HandleTypeDef * hnor); /*!< NOR Msp DeInit callback */
|
||||
#endif
|
||||
} NOR_HandleTypeDef;
|
||||
|
||||
#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
|
||||
/**
|
||||
* @brief HAL NOR Callback ID enumeration definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_NOR_MSP_INIT_CB_ID = 0x00U, /*!< NOR MspInit Callback ID */
|
||||
HAL_NOR_MSP_DEINIT_CB_ID = 0x01U /*!< NOR MspDeInit Callback ID */
|
||||
}HAL_NOR_CallbackIDTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL NOR Callback pointer definition
|
||||
*/
|
||||
typedef void (*pNOR_CallbackTypeDef)(NOR_HandleTypeDef *hnor);
|
||||
#endif
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -199,13 +151,19 @@ typedef struct
|
|||
/** @defgroup NOR_Exported_Macros NOR Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @brief Reset NOR handle state
|
||||
* @param __HANDLE__ NOR handle
|
||||
* @param __HANDLE__ specifies the NOR handle.
|
||||
* @retval None
|
||||
*/
|
||||
#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
|
||||
#define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) do { \
|
||||
(__HANDLE__)->State = HAL_NOR_STATE_RESET; \
|
||||
(__HANDLE__)->MspInitCallback = NULL; \
|
||||
(__HANDLE__)->MspDeInitCallback = NULL; \
|
||||
} while(0)
|
||||
#else
|
||||
#define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET)
|
||||
|
||||
#endif
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -225,7 +183,6 @@ HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor);
|
|||
void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor);
|
||||
void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor);
|
||||
void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -247,29 +204,101 @@ HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAdd
|
|||
HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address);
|
||||
HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI);
|
||||
|
||||
#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
|
||||
/* NOR callback registering/unregistering */
|
||||
HAL_StatusTypeDef HAL_NOR_RegisterCallback(NOR_HandleTypeDef *hnor, HAL_NOR_CallbackIDTypeDef CallbackId, pNOR_CallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_NOR_UnRegisterCallback(NOR_HandleTypeDef *hnor, HAL_NOR_CallbackIDTypeDef CallbackId);
|
||||
#endif
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup NOR_Exported_Functions_Group3 Peripheral Control functions
|
||||
/** @addtogroup NOR_Exported_Functions_Group3 NOR Control functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* NOR Control functions *****************************************************/
|
||||
HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor);
|
||||
HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup NOR_Exported_Functions_Group4 Peripheral State functions
|
||||
/** @addtogroup NOR_Exported_Functions_Group4 NOR State functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* NOR State functions ********************************************************/
|
||||
HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor);
|
||||
HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor);
|
||||
HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private types -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private constants ---------------------------------------------------------*/
|
||||
/** @defgroup NOR_Private_Constants NOR Private Constants
|
||||
* @{
|
||||
*/
|
||||
/* NOR device IDs addresses */
|
||||
#define MC_ADDRESS ((uint16_t)0x0000U)
|
||||
#define DEVICE_CODE1_ADDR ((uint16_t)0x0001U)
|
||||
#define DEVICE_CODE2_ADDR ((uint16_t)0x000EU)
|
||||
#define DEVICE_CODE3_ADDR ((uint16_t)0x000FU)
|
||||
|
||||
/* NOR CFI IDs addresses */
|
||||
#define CFI1_ADDRESS ((uint16_t)0x61U)
|
||||
#define CFI2_ADDRESS ((uint16_t)0x62U)
|
||||
#define CFI3_ADDRESS ((uint16_t)0x63U)
|
||||
#define CFI4_ADDRESS ((uint16_t)0x64U)
|
||||
|
||||
/* NOR operation wait timeout */
|
||||
#define NOR_TMEOUT ((uint16_t)0xFFFFU)
|
||||
|
||||
/* NOR memory data width */
|
||||
#define NOR_MEMORY_8B ((uint8_t)0x0U)
|
||||
#define NOR_MEMORY_16B ((uint8_t)0x1U)
|
||||
|
||||
/* NOR memory device read/write start address */
|
||||
#define NOR_MEMORY_ADRESS1 ((uint32_t)0x60000000U)
|
||||
#define NOR_MEMORY_ADRESS2 ((uint32_t)0x64000000U)
|
||||
#define NOR_MEMORY_ADRESS3 ((uint32_t)0x68000000U)
|
||||
#define NOR_MEMORY_ADRESS4 ((uint32_t)0x6C000000U)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/** @defgroup NOR_Private_Macros NOR Private Macros
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief NOR memory address shifting.
|
||||
* @param __NOR_ADDRESS NOR base address
|
||||
* @param __NOR_MEMORY_WIDTH_ NOR memory width
|
||||
* @param __ADDRESS__ NOR memory address
|
||||
* @retval NOR shifted address value
|
||||
*/
|
||||
#define NOR_ADDR_SHIFT(__NOR_ADDRESS, __NOR_MEMORY_WIDTH_, __ADDRESS__) \
|
||||
((uint32_t)(((__NOR_MEMORY_WIDTH_) == NOR_MEMORY_16B)? \
|
||||
((uint32_t)((__NOR_ADDRESS) + (2U * (__ADDRESS__)))): \
|
||||
((uint32_t)((__NOR_ADDRESS) + (__ADDRESS__)))))
|
||||
|
||||
/**
|
||||
* @brief NOR memory write data to specified address.
|
||||
* @param __ADDRESS__ NOR memory address
|
||||
* @param __DATA__ Data to write
|
||||
* @retval None
|
||||
*/
|
||||
#define NOR_WRITE(__ADDRESS__, __DATA__) do{ \
|
||||
(*(__IO uint16_t *)((uint32_t)(__ADDRESS__)) = (__DATA__)); \
|
||||
__DSB(); \
|
||||
} while(0)
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
@ -283,16 +312,12 @@ HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Addres
|
|||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* STM32F302xE || STM32F303xE || STM32F398xx */
|
||||
#endif /* FMC_BANK1 */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F3xx_HAL_NOR_H */
|
||||
#endif /* STM32F3xx_HAL_NOR_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
|
@ -6,45 +6,26 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_HAL_OPAMP_H
|
||||
#define __STM32F3xx_HAL_OPAMP_H
|
||||
#ifndef STM32F3xx_HAL_OPAMP_H
|
||||
#define STM32F3xx_HAL_OPAMP_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
|
||||
defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \
|
||||
defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
|
||||
defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
|
||||
#if defined (OPAMP1) || defined (OPAMP2) || defined (OPAMP3) || defined (OPAMP4)
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f3xx_hal_def.h"
|
||||
|
@ -125,7 +106,7 @@ typedef struct
|
|||
i.e. when UserTrimming is OPAMP_TRIMMING_USER.
|
||||
This parameter must be a number between Min_Data = 1 and Max_Data = 31U */
|
||||
|
||||
}OPAMP_InitTypeDef;
|
||||
} OPAMP_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL State structures definition
|
||||
|
@ -147,7 +128,11 @@ typedef enum
|
|||
/**
|
||||
* @brief OPAMP Handle Structure definition to @brief OPAMP Handle Structure definition
|
||||
*/
|
||||
#if (USE_HAL_OPAMP_REGISTER_CALLBACKS == 1)
|
||||
typedef struct __OPAMP_HandleTypeDef
|
||||
#else
|
||||
typedef struct
|
||||
#endif /* USE_HAL_OPAMP_REGISTER_CALLBACKS */
|
||||
{
|
||||
OPAMP_TypeDef *Instance; /*!< OPAMP instance's registers base address */
|
||||
OPAMP_InitTypeDef Init; /*!< OPAMP required parameters */
|
||||
|
@ -155,6 +140,11 @@ typedef struct
|
|||
HAL_LockTypeDef Lock; /*!< Locking object */
|
||||
__IO HAL_OPAMP_StateTypeDef State; /*!< OPAMP communication state */
|
||||
|
||||
#if (USE_HAL_OPAMP_REGISTER_CALLBACKS == 1)
|
||||
void (* MspInitCallback) (struct __OPAMP_HandleTypeDef *hopamp);
|
||||
void (* MspDeInitCallback) (struct __OPAMP_HandleTypeDef *hopamp);
|
||||
#endif /* USE_HAL_OPAMP_REGISTER_CALLBACKS */
|
||||
|
||||
} OPAMP_HandleTypeDef;
|
||||
|
||||
/**
|
||||
|
@ -166,6 +156,23 @@ typedef uint32_t OPAMP_TrimmingValueTypeDef;
|
|||
* @}
|
||||
*/
|
||||
|
||||
#if (USE_HAL_OPAMP_REGISTER_CALLBACKS == 1)
|
||||
/**
|
||||
* @brief HAL OPAMP Callback ID enumeration definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_OPAMP_MSP_INIT_CB_ID = 0x01U, /*!< OPAMP MspInit Callback ID */
|
||||
HAL_OPAMP_MSP_DEINIT_CB_ID = 0x02U, /*!< OPAMP MspDeInit Callback ID */
|
||||
HAL_OPAMP_ALL_CB_ID = 0x03U /*!< OPAMP All ID */
|
||||
} HAL_OPAMP_CallbackIDTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL OPAMP Callback pointer definition
|
||||
*/
|
||||
typedef void (*pOPAMP_CallbackTypeDef)(OPAMP_HandleTypeDef *hopamp);
|
||||
#endif /* USE_HAL_OPAMP_REGISTER_CALLBACKS */
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup OPAMP_Exported_Constants OPAMP Exported Constants
|
||||
* @{
|
||||
|
@ -187,7 +194,7 @@ typedef uint32_t OPAMP_TrimmingValueTypeDef;
|
|||
/** @defgroup OPAMP_Mode OPAMP Mode
|
||||
* @{
|
||||
*/
|
||||
#define OPAMP_STANDALONE_MODE (0x00000000U) /*!< standalone mode */
|
||||
#define OPAMP_STANDALONE_MODE (0x00000000U) /*!< standalone mode */
|
||||
#define OPAMP_PGA_MODE OPAMP_CSR_VMSEL_1 /*!< PGA mode */
|
||||
#define OPAMP_FOLLOWER_MODE OPAMP_CSR_VMSEL /*!< follower mode */
|
||||
|
||||
|
@ -206,7 +213,7 @@ typedef uint32_t OPAMP_TrimmingValueTypeDef;
|
|||
|
||||
#define OPAMP_NONINVERTINGINPUT_IO0 OPAMP_CSR_VPSEL /*!< VP0 (PA1 for OPAMP1, VP0 PA7 for OPAMP2, VP0 PB0 for OPAMP3, VP0 PB13 for OPAMP4)
|
||||
connected to OPAMPx non inverting input */
|
||||
#define OPAMP_NONINVERTINGINPUT_IO1 (0x00000000U) /*!< VP1 (PA7 for OPAMP1, VP3 PD14 for OPAMP2, VP1 PB13 for OPAMP3, VP1 PD11 for OPAMP4)
|
||||
#define OPAMP_NONINVERTINGINPUT_IO1 (0x00000000U) /*!< VP1 (PA7 for OPAMP1, VP3 PD14 for OPAMP2, VP1 PB13 for OPAMP3, VP1 PD11 for OPAMP4)
|
||||
connected to OPAMPx non inverting input */
|
||||
#define OPAMP_NONINVERTINGINPUT_IO2 OPAMP_CSR_VPSEL_1 /*!< VP2 (PA3 for OPAMP1, VP2 PB0 for OPAMP2, VP2 PA1 for OPAMP3, VP3 PA4 for OPAMP4)
|
||||
connected to OPAMPx non inverting input */
|
||||
|
@ -226,7 +233,7 @@ typedef uint32_t OPAMP_TrimmingValueTypeDef;
|
|||
* @{
|
||||
*/
|
||||
|
||||
#define OPAMP_INVERTINGINPUT_IO0 (0x00000000U) /*!< inverting input connected to VM0 */
|
||||
#define OPAMP_INVERTINGINPUT_IO0 (0x00000000U) /*!< inverting input connected to VM0 */
|
||||
#define OPAMP_INVERTINGINPUT_IO1 OPAMP_CSR_VMSEL_0 /*!< inverting input connected to VM1 */
|
||||
|
||||
#define IS_OPAMP_INVERTING_INPUT(INPUT) (((INPUT) == OPAMP_INVERTINGINPUT_IO0) || \
|
||||
|
@ -239,22 +246,22 @@ typedef uint32_t OPAMP_TrimmingValueTypeDef;
|
|||
/** @defgroup OPAMP_TimerControlledMuxmode OPAMP Timer Controlled Mux mode
|
||||
* @{
|
||||
*/
|
||||
#define OPAMP_TIMERCONTROLLEDMUXMODE_DISABLE (0x00000000U) /*!< Timer controlled Mux mode disabled */
|
||||
#define OPAMP_TIMERCONTROLLEDMUXMODE_ENABLE OPAMP_CSR_TCMEN /*!< Timer controlled Mux mode enabled */
|
||||
#define OPAMP_TIMERCONTROLLEDMUXMODE_DISABLE (0x00000000U) /*!< Timer controlled Mux mode disabled */
|
||||
#define OPAMP_TIMERCONTROLLEDMUXMODE_ENABLE OPAMP_CSR_TCMEN /*!< Timer controlled Mux mode enabled */
|
||||
|
||||
#define IS_OPAMP_TIMERCONTROLLED_MUXMODE(MUXMODE) (((MUXMODE) == OPAMP_TIMERCONTROLLEDMUXMODE_DISABLE) || \
|
||||
((MUXMODE) == OPAMP_TIMERCONTROLLEDMUXMODE_ENABLE))
|
||||
#define IS_OPAMP_TIMERCONTROLLED_MUXMODE(MUXMODE) (((MUXMODE) == OPAMP_TIMERCONTROLLEDMUXMODE_DISABLE) || \
|
||||
((MUXMODE) == OPAMP_TIMERCONTROLLEDMUXMODE_ENABLE))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup OPAMP_NonInvertingInputSecondary OPAMP Non Inverting Input Secondary
|
||||
/** @defgroup OPAMP_NonInvertingInputSecondary OPAMP Non Inverting Input Secondary
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define OPAMP_SEC_NONINVERTINGINPUT_IO0 OPAMP_CSR_VPSSEL /*!< VP0 (PA1 for OPAMP1, PA7 for OPAMP2, PB0 for OPAMP3, PB13 for OPAMP4)
|
||||
connected to OPAMPx non inverting input */
|
||||
#define OPAMP_SEC_NONINVERTINGINPUT_IO1 (0x00000000U) /*!< VP1 (PA7 for OPAMP1, PD14 for OPAMP2, PB13 for OPAMP3, PD11 for OPAMP4)
|
||||
#define OPAMP_SEC_NONINVERTINGINPUT_IO1 (0x00000000U) /*!< VP1 (PA7 for OPAMP1, PD14 for OPAMP2, PB13 for OPAMP3, PD11 for OPAMP4)
|
||||
connected to OPAMPx non inverting input */
|
||||
#define OPAMP_SEC_NONINVERTINGINPUT_IO2 OPAMP_CSR_VPSSEL_1 /*!< VP2 (PA3 for OPAMP1, PB0 for OPAMP2, PA1 for OPAMP3, PA4 for OPAMP4)
|
||||
connected to OPAMPx non inverting input */
|
||||
|
@ -274,7 +281,7 @@ typedef uint32_t OPAMP_TrimmingValueTypeDef;
|
|||
* @{
|
||||
*/
|
||||
|
||||
#define OPAMP_SEC_INVERTINGINPUT_IO0 (0x00000000U) /*!< VM0 (PC5 for OPAMP1 and OPAMP2, PB10 for OPAMP3 and OPAMP4)
|
||||
#define OPAMP_SEC_INVERTINGINPUT_IO0 (0x00000000U) /*!< VM0 (PC5 for OPAMP1 and OPAMP2, PB10 for OPAMP3 and OPAMP4)
|
||||
connected to OPAMPx inverting input */
|
||||
#define OPAMP_SEC_INVERTINGINPUT_IO1 OPAMP_CSR_VMSSEL /*!< VM1 (PA3 for OPAMP1, PA5 for OPAMP2, PB2 for OPAMP3, PD8 for OPAMP4)
|
||||
connected to OPAMPx inverting input */
|
||||
|
@ -290,8 +297,8 @@ typedef uint32_t OPAMP_TrimmingValueTypeDef;
|
|||
* @{
|
||||
*/
|
||||
|
||||
#define OPAMP_PGA_CONNECT_INVERTINGINPUT_NO (0x00000000U) /*!< In PGA mode, the non inverting input is not connected */
|
||||
#define OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0 OPAMP_CSR_PGGAIN_3 /*!< In PGA mode, the non inverting input is connected to VM0 */
|
||||
#define OPAMP_PGA_CONNECT_INVERTINGINPUT_NO (0x00000000U) /*!< In PGA mode, the non inverting input is not connected */
|
||||
#define OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0 OPAMP_CSR_PGGAIN_3 /*!< In PGA mode, the non inverting input is connected to VM0 */
|
||||
#define OPAMP_PGA_CONNECT_INVERTINGINPUT_IO1 (OPAMP_CSR_PGGAIN_2 | OPAMP_CSR_PGGAIN_3) /*!< In PGA mode, the non inverting input is connected to VM1 */
|
||||
|
||||
#define IS_OPAMP_PGACONNECT(CONNECT) (((CONNECT) == OPAMP_PGA_CONNECT_INVERTINGINPUT_NO) || \
|
||||
|
@ -306,10 +313,10 @@ typedef uint32_t OPAMP_TrimmingValueTypeDef;
|
|||
* @{
|
||||
*/
|
||||
|
||||
#define OPAMP_PGA_GAIN_2 (0x00000000U) /*!< PGA gain = 2 */
|
||||
#define OPAMP_PGA_GAIN_2 (0x00000000U) /*!< PGA gain = 2 */
|
||||
#define OPAMP_PGA_GAIN_4 OPAMP_CSR_PGGAIN_0 /*!< PGA gain = 4 */
|
||||
#define OPAMP_PGA_GAIN_8 OPAMP_CSR_PGGAIN_1 /*!< PGA gain = 8 */
|
||||
#define OPAMP_PGA_GAIN_16 (OPAMP_CSR_PGGAIN_0 | OPAMP_CSR_PGGAIN_1) /*!< PGA gain = 16 */
|
||||
#define OPAMP_PGA_GAIN_16 (OPAMP_CSR_PGGAIN_0 | OPAMP_CSR_PGGAIN_1) /*!< PGA gain = 16 */
|
||||
|
||||
#define IS_OPAMP_PGA_GAIN(GAIN) (((GAIN) == OPAMP_PGA_GAIN_2) || \
|
||||
((GAIN) == OPAMP_PGA_GAIN_4) || \
|
||||
|
@ -323,7 +330,7 @@ typedef uint32_t OPAMP_TrimmingValueTypeDef;
|
|||
* @{
|
||||
*/
|
||||
|
||||
#define OPAMP_TRIMMING_FACTORY (0x00000000U) /*!< Factory trimming */
|
||||
#define OPAMP_TRIMMING_FACTORY (0x00000000U) /*!< Factory trimming */
|
||||
#define OPAMP_TRIMMING_USER OPAMP_CSR_USERTRIM /*!< User trimming */
|
||||
|
||||
#define IS_OPAMP_TRIMMING(TRIMMING) (((TRIMMING) == OPAMP_TRIMMING_FACTORY) || \
|
||||
|
@ -362,8 +369,8 @@ typedef uint32_t OPAMP_TrimmingValueTypeDef;
|
|||
* @{
|
||||
*/
|
||||
|
||||
#define OPAMP_INPUT_INVERTING ( 24U) /*!< Inverting input */
|
||||
#define OPAMP_INPUT_NONINVERTING ( 19U) /*!< Non inverting input */
|
||||
#define OPAMP_INPUT_INVERTING (24U) /*!< Inverting input */
|
||||
#define OPAMP_INPUT_NONINVERTING (19U) /*!< Non inverting input */
|
||||
|
||||
#define IS_OPAMP_INPUT(INPUT) (((INPUT) == OPAMP_INPUT_INVERTING) || \
|
||||
((INPUT) == OPAMP_INPUT_NONINVERTING))
|
||||
|
@ -376,7 +383,7 @@ typedef uint32_t OPAMP_TrimmingValueTypeDef;
|
|||
* @{
|
||||
*/
|
||||
|
||||
#define OPAMP_VREF_3VDDA (0x00000000U) /*!< OPMAP Vref = 3.3U% VDDA */
|
||||
#define OPAMP_VREF_3VDDA (0x00000000U) /*!< OPMAP Vref = 3.3U% VDDA */
|
||||
#define OPAMP_VREF_10VDDA OPAMP_CSR_CALSEL_0 /*!< OPMAP Vref = 10U% VDDA */
|
||||
#define OPAMP_VREF_50VDDA OPAMP_CSR_CALSEL_1 /*!< OPMAP Vref = 50U% VDDA */
|
||||
#define OPAMP_VREF_90VDDA OPAMP_CSR_CALSEL /*!< OPMAP Vref = 90U% VDDA */
|
||||
|
@ -390,7 +397,8 @@ typedef uint32_t OPAMP_TrimmingValueTypeDef;
|
|||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup OPAMP_Vref2ADCforCalib OPAMP Vref2ADCforCalib
|
||||
/** @defgroup OPAMP_Vref2ADCforCalib OPAMP Vref2ADCforCalib
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define OPAMP_VREF_NOTCONNECTEDTO_ADC (0x00000000U) /*!< VREF not connected to ADC */
|
||||
|
@ -400,11 +408,11 @@ typedef uint32_t OPAMP_TrimmingValueTypeDef;
|
|||
((CONNECT) == OPAMP_VREF_CONNECTEDTO_ADC))
|
||||
|
||||
|
||||
/**
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
@ -417,7 +425,15 @@ typedef uint32_t OPAMP_TrimmingValueTypeDef;
|
|||
* @param __HANDLE__ OPAMP handle.
|
||||
* @retval None
|
||||
*/
|
||||
#if (USE_HAL_OPAMP_REGISTER_CALLBACKS == 1)
|
||||
#define __HAL_OPAMP_RESET_HANDLE_STATE(__HANDLE__) do { \
|
||||
(__HANDLE__)->State = HAL_OPAMP_STATE_RESET; \
|
||||
(__HANDLE__)->MspInitCallback = NULL; \
|
||||
(__HANDLE__)->MspDeInitCallback = NULL; \
|
||||
} while(0)
|
||||
#else
|
||||
#define __HAL_OPAMP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_OPAMP_STATE_RESET)
|
||||
#endif /* USE_HAL_OPAMP_REGISTER_CALLBACKS */
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
@ -437,7 +453,7 @@ typedef uint32_t OPAMP_TrimmingValueTypeDef;
|
|||
|
||||
/* Initialization/de-initialization functions **********************************/
|
||||
HAL_StatusTypeDef HAL_OPAMP_Init(OPAMP_HandleTypeDef *hopamp);
|
||||
HAL_StatusTypeDef HAL_OPAMP_DeInit (OPAMP_HandleTypeDef *hopamp);
|
||||
HAL_StatusTypeDef HAL_OPAMP_DeInit(OPAMP_HandleTypeDef *hopamp);
|
||||
void HAL_OPAMP_MspInit(OPAMP_HandleTypeDef *hopamp);
|
||||
void HAL_OPAMP_MspDeInit(OPAMP_HandleTypeDef *hopamp);
|
||||
/**
|
||||
|
@ -463,6 +479,12 @@ HAL_StatusTypeDef HAL_OPAMP_SelfCalibrate(OPAMP_HandleTypeDef *hopamp);
|
|||
*/
|
||||
|
||||
/* Peripheral Control functions ************************************************/
|
||||
#if (USE_HAL_OPAMP_REGISTER_CALLBACKS == 1)
|
||||
/* OPAMP callback registering/unregistering */
|
||||
HAL_StatusTypeDef HAL_OPAMP_RegisterCallback(OPAMP_HandleTypeDef *hopamp, HAL_OPAMP_CallbackIDTypeDef CallbackId, pOPAMP_CallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_OPAMP_UnRegisterCallback(OPAMP_HandleTypeDef *hopamp, HAL_OPAMP_CallbackIDTypeDef CallbackId);
|
||||
#endif /* USE_HAL_OPAMP_REGISTER_CALLBACKS */
|
||||
|
||||
HAL_StatusTypeDef HAL_OPAMP_Lock(OPAMP_HandleTypeDef *hopamp);
|
||||
|
||||
/**
|
||||
|
@ -475,7 +497,7 @@ HAL_StatusTypeDef HAL_OPAMP_Lock(OPAMP_HandleTypeDef *hopamp);
|
|||
|
||||
/* Peripheral State functions **************************************************/
|
||||
HAL_OPAMP_StateTypeDef HAL_OPAMP_GetState(OPAMP_HandleTypeDef *hopamp);
|
||||
OPAMP_TrimmingValueTypeDef HAL_OPAMP_GetTrimOffset (OPAMP_HandleTypeDef *hopamp, uint32_t trimmingoffset);
|
||||
OPAMP_TrimmingValueTypeDef HAL_OPAMP_GetTrimOffset(OPAMP_HandleTypeDef *hopamp, uint32_t trimmingoffset);
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
@ -493,15 +515,12 @@ OPAMP_TrimmingValueTypeDef HAL_OPAMP_GetTrimOffset (OPAMP_HandleTypeDef *hopamp,
|
|||
* @}
|
||||
*/
|
||||
|
||||
#endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
|
||||
/* STM32F302xC || STM32F303xC || STM32F358xx || */
|
||||
/* STM32F303x8 || STM32F334x8 || STM32F328xx || */
|
||||
/* STM32F301x8 || STM32F302x8 || STM32F318xx */
|
||||
#endif /* OPAMP1 || OPAMP2 || OPAMP3 || OPAMP4 */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F3xx_HAL_OPAMP_H */
|
||||
#endif /* STM32F3xx_HAL_OPAMP_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
|
@ -6,45 +6,26 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_HAL_OPAMP_EX_H
|
||||
#define __STM32F3xx_HAL_OPAMP_EX_H
|
||||
#ifndef STM32F3xx_HAL_OPAMP_EX_H
|
||||
#define STM32F3xx_HAL_OPAMP_EX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
|
||||
defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \
|
||||
defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
|
||||
defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
|
||||
#if defined (OPAMP1) || defined (OPAMP2) || defined (OPAMP3) || defined (OPAMP4)
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f3xx_hal_def.h"
|
||||
|
@ -100,16 +81,12 @@ HAL_StatusTypeDef HAL_OPAMPEx_SelfCalibrateAll(OPAMP_HandleTypeDef *hopamp1, OPA
|
|||
* @}
|
||||
*/
|
||||
|
||||
#endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
|
||||
/* STM32F302xC || STM32F303xC || STM32F358xx || */
|
||||
/* STM32F303x8 || STM32F334x8 || STM32F328xx || */
|
||||
/* STM32F301x8 || STM32F302x8 || STM32F318xx */
|
||||
#endif /* OPAMP1 || OPAMP2 || OPAMP3 || OPAMP4 */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* __STM32F3xx_HAL_OPAMP_EX_H */
|
||||
#endif /* STM32F3xx_HAL_OPAMP_EX_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
|
@ -6,43 +6,28 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_HAL_PCCARD_H
|
||||
#define __STM32F3xx_HAL_PCCARD_H
|
||||
#ifndef STM32F3xx_HAL_PCCARD_H
|
||||
#define STM32F3xx_HAL_PCCARD_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if defined(FMC_BANK4)
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)
|
||||
#include "stm32f3xx_ll_fmc.h"
|
||||
|
||||
/** @addtogroup STM32F3xx_HAL_Driver
|
||||
|
@ -53,77 +38,6 @@
|
|||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup PCCARD_Private_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define PCCARD_DEVICE_ADDRESS FMC_BANK4
|
||||
#define PCCARD_ATTRIBUTE_SPACE_ADDRESS ((uint32_t)(FMC_BANK4 + 0x08000000U)) /* Attribute space size to @0x9BFF FFFF */
|
||||
#define PCCARD_COMMON_SPACE_ADDRESS PCCARD_DEVICE_ADDRESS /* Common space size to @0x93FF FFFF */
|
||||
#define PCCARD_IO_SPACE_ADDRESS ((uint32_t)(FMC_BANK4 + 0x0C000000U)) /* IO space size to @0x9FFF FFFF */
|
||||
#define PCCARD_IO_SPACE_PRIMARY_ADDR ((uint32_t)(FMC_BANK4 + 0x0C0001F0U)) /* IO space size to @0x9FFF FFFF */
|
||||
|
||||
/* Compact Flash-ATA registers description */
|
||||
#define ATA_DATA ((uint8_t)0x00U) /* Data register */
|
||||
#define ATA_SECTOR_COUNT ((uint8_t)0x02U) /* Sector Count register */
|
||||
#define ATA_SECTOR_NUMBER ((uint8_t)0x03U) /* Sector Number register */
|
||||
#define ATA_CYLINDER_LOW ((uint8_t)0x04U) /* Cylinder low register */
|
||||
#define ATA_CYLINDER_HIGH ((uint8_t)0x05U) /* Cylinder high register */
|
||||
#define ATA_CARD_HEAD ((uint8_t)0x06U) /* Card/Head register */
|
||||
#define ATA_STATUS_CMD ((uint8_t)0x07U) /* Status(read)/Command(write) register */
|
||||
#define ATA_STATUS_CMD_ALTERNATE ((uint8_t)0x0EU) /* Alternate Status(read)/Command(write) register */
|
||||
#define ATA_COMMON_DATA_AREA ((uint16_t)0x0400U) /* Start of data area (for Common access only!) */
|
||||
#define ATA_CARD_CONFIGURATION ((uint16_t)0x0202U) /* Card Configuration and Status Register */
|
||||
|
||||
/* Compact Flash-ATA commands */
|
||||
#define ATA_READ_SECTOR_CMD ((uint8_t)0x20U)
|
||||
#define ATA_WRITE_SECTOR_CMD ((uint8_t)0x30U)
|
||||
#define ATA_ERASE_SECTOR_CMD ((uint8_t)0xC0U)
|
||||
#define ATA_IDENTIFY_CMD ((uint8_t)0xECU)
|
||||
|
||||
/* Compact Flash status */
|
||||
#define PCCARD_TIMEOUT_ERROR ((uint8_t)0x60U)
|
||||
#define PCCARD_BUSY ((uint8_t)0x80U)
|
||||
#define PCCARD_PROGR ((uint8_t)0x01U)
|
||||
#define PCCARD_READY ((uint8_t)0x40U)
|
||||
|
||||
#define PCCARD_SECTOR_SIZE (255U) /* In half words */
|
||||
|
||||
|
||||
/* Compact Flash redefinition */
|
||||
#define HAL_CF_Read_ID HAL_PCCARD_Read_ID
|
||||
#define HAL_CF_Write_Sector HAL_PCCARD_Write_Sector
|
||||
#define HAL_CF_Read_Sector HAL_PCCARD_Read_Sector
|
||||
#define HAL_CF_Erase_Sector HAL_PCCARD_Erase_Sector
|
||||
#define HAL_CF_Reset HAL_PCCARD_Reset
|
||||
|
||||
#define HAL_CF_GetStatus HAL_PCCARD_GetStatus
|
||||
#define HAL_CF_ReadStatus HAL_PCCARD_ReadStatus
|
||||
|
||||
#define CF_SUCCESS HAL_PCCARD_STATUS_SUCCESS
|
||||
#define CF_ONGOING HAL_PCCARD_STATUS_ONGOING
|
||||
#define CF_ERROR HAL_PCCARD_STATUS_ERROR
|
||||
#define CF_TIMEOUT HAL_PCCARD_STATUS_TIMEOUT
|
||||
#define HAL_PCCARD_StatusTypeDef HAL_PCCARD_StatusTypeDef
|
||||
|
||||
|
||||
#define CF_DEVICE_ADDRESS PCCARD_DEVICE_ADDRESS
|
||||
#define CF_ATTRIBUTE_SPACE_ADDRESS PCCARD_ATTRIBUTE_SPACE_ADDRESS
|
||||
#define CF_COMMON_SPACE_ADDRESS PCCARD_COMMON_SPACE_ADDRESS
|
||||
#define CF_IO_SPACE_ADDRESS PCCARD_IO_SPACE_ADDRESS
|
||||
#define CF_IO_SPACE_PRIMARY_ADDR PCCARD_IO_SPACE_PRIMARY_ADDR
|
||||
|
||||
#define CF_TIMEOUT_ERROR PCCARD_TIMEOUT_ERROR
|
||||
#define CF_BUSY PCCARD_BUSY
|
||||
#define CF_PROGR PCCARD_PROGR
|
||||
#define CF_READY PCCARD_READY
|
||||
|
||||
#define CF_SECTOR_SIZE PCCARD_SECTOR_SIZE
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported typedef ----------------------------------------------------------*/
|
||||
/** @defgroup PCCARD_Exported_Types PCCARD Exported Types
|
||||
* @{
|
||||
|
@ -137,8 +51,8 @@ typedef enum
|
|||
HAL_PCCARD_STATE_RESET = 0x00U, /*!< PCCARD peripheral not yet initialized or disabled */
|
||||
HAL_PCCARD_STATE_READY = 0x01U, /*!< PCCARD peripheral ready */
|
||||
HAL_PCCARD_STATE_BUSY = 0x02U, /*!< PCCARD peripheral busy */
|
||||
HAL_PCCARD_STATE_ERROR = 0x04 /*!< PCCARD peripheral error */
|
||||
}HAL_PCCARD_StateTypeDef;
|
||||
HAL_PCCARD_STATE_ERROR = 0x04U /*!< PCCARD peripheral error */
|
||||
} HAL_PCCARD_StateTypeDef;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
|
@ -146,12 +60,16 @@ typedef enum
|
|||
HAL_PCCARD_STATUS_ONGOING,
|
||||
HAL_PCCARD_STATUS_ERROR,
|
||||
HAL_PCCARD_STATUS_TIMEOUT
|
||||
}HAL_PCCARD_StatusTypeDef;
|
||||
} HAL_PCCARD_StatusTypeDef;
|
||||
|
||||
/**
|
||||
* @brief FMC_PCCARD handle Structure definition
|
||||
*/
|
||||
#if (USE_HAL_PCCARD_REGISTER_CALLBACKS == 1)
|
||||
typedef struct __PCCARD_HandleTypeDef
|
||||
#else
|
||||
typedef struct
|
||||
#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */
|
||||
{
|
||||
FMC_PCCARD_TypeDef *Instance; /*!< Register base address for PCCARD device */
|
||||
|
||||
|
@ -161,7 +79,29 @@ typedef struct
|
|||
|
||||
HAL_LockTypeDef Lock; /*!< PCCARD Lock */
|
||||
|
||||
}PCCARD_HandleTypeDef;
|
||||
#if (USE_HAL_PCCARD_REGISTER_CALLBACKS == 1)
|
||||
void (* MspInitCallback) ( struct __PCCARD_HandleTypeDef * hpccard); /*!< PCCARD Msp Init callback */
|
||||
void (* MspDeInitCallback) ( struct __PCCARD_HandleTypeDef * hpccard); /*!< PCCARD Msp DeInit callback */
|
||||
void (* ItCallback) ( struct __PCCARD_HandleTypeDef * hpccard); /*!< PCCARD IT callback */
|
||||
#endif
|
||||
} PCCARD_HandleTypeDef;
|
||||
|
||||
#if (USE_HAL_PCCARD_REGISTER_CALLBACKS == 1)
|
||||
/**
|
||||
* @brief HAL PCCARD Callback ID enumeration definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_PCCARD_MSP_INIT_CB_ID = 0x00U, /*!< PCCARD MspInit Callback ID */
|
||||
HAL_PCCARD_MSP_DEINIT_CB_ID = 0x01U, /*!< PCCARD MspDeInit Callback ID */
|
||||
HAL_PCCARD_IT_CB_ID = 0x02U /*!< PCCARD IT Callback ID */
|
||||
}HAL_PCCARD_CallbackIDTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL PCCARD Callback pointer definition
|
||||
*/
|
||||
typedef void (*pPCCARD_CallbackTypeDef)(PCCARD_HandleTypeDef *hpccard);
|
||||
#endif
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -171,22 +111,29 @@ typedef struct
|
|||
/** @defgroup PCCARD_Exported_Macros PCCARD Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @brief Reset PCCARD handle state
|
||||
* @param __HANDLE__ specifies the PCCARD handle.
|
||||
* @retval None
|
||||
*/
|
||||
#if (USE_HAL_PCCARD_REGISTER_CALLBACKS == 1)
|
||||
#define __HAL_PCCARD_RESET_HANDLE_STATE(__HANDLE__) do { \
|
||||
(__HANDLE__)->State = HAL_PCCARD_STATE_RESET; \
|
||||
(__HANDLE__)->MspInitCallback = NULL; \
|
||||
(__HANDLE__)->MspDeInitCallback = NULL; \
|
||||
} while(0)
|
||||
#else
|
||||
#define __HAL_PCCARD_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_PCCARD_STATE_RESET)
|
||||
#endif
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @addtogroup PCCARD_Exported_Functions PCCARD Exported Functions
|
||||
/** @addtogroup PCCARD_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup PCCARD_Exported_Functions_Group1 Initialization and de-initialization functions
|
||||
/** @addtogroup PCCARD_Exported_Functions_Group1
|
||||
* @{
|
||||
*/
|
||||
/* Initialization/de-initialization functions **********************************/
|
||||
|
@ -198,7 +145,7 @@ void HAL_PCCARD_MspDeInit(PCCARD_HandleTypeDef *hpccard);
|
|||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup PCCARD_Exported_Functions_Group2 Input Output and memory functions
|
||||
/** @addtogroup PCCARD_Exported_Functions_Group2
|
||||
* @{
|
||||
*/
|
||||
/* IO operation functions *****************************************************/
|
||||
|
@ -210,15 +157,20 @@ HAL_StatusTypeDef HAL_PCCARD_Reset(PCCARD_HandleTypeDef *hpccard);
|
|||
void HAL_PCCARD_IRQHandler(PCCARD_HandleTypeDef *hpccard);
|
||||
void HAL_PCCARD_ITCallback(PCCARD_HandleTypeDef *hpccard);
|
||||
|
||||
#if (USE_HAL_PCCARD_REGISTER_CALLBACKS == 1)
|
||||
/* PCCARD callback registering/unregistering */
|
||||
HAL_StatusTypeDef HAL_PCCARD_RegisterCallback(PCCARD_HandleTypeDef *hpccard, HAL_PCCARD_CallbackIDTypeDef CallbackId, pPCCARD_CallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_PCCARD_UnRegisterCallback(PCCARD_HandleTypeDef *hpccard, HAL_PCCARD_CallbackIDTypeDef CallbackId);
|
||||
#endif
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PCCARD_Exported_Functions_Group3 Peripheral State functions
|
||||
/** @addtogroup PCCARD_Exported_Functions_Group3
|
||||
* @{
|
||||
*/
|
||||
/* PCCARD State functions *******************************************************/
|
||||
HAL_PCCARD_StateTypeDef HAL_PCCARD_GetState(PCCARD_HandleTypeDef *hpccard);
|
||||
HAL_PCCARD_StateTypeDef HAL_PCCARD_GetState(PCCARD_HandleTypeDef *hpccard);
|
||||
HAL_PCCARD_StatusTypeDef HAL_PCCARD_GetStatus(PCCARD_HandleTypeDef *hpccard);
|
||||
HAL_PCCARD_StatusTypeDef HAL_PCCARD_ReadStatus(PCCARD_HandleTypeDef *hpccard);
|
||||
/**
|
||||
|
@ -228,20 +180,100 @@ HAL_PCCARD_StatusTypeDef HAL_PCCARD_ReadStatus(PCCARD_HandleTypeDef *hpccard);
|
|||
/**
|
||||
* @}
|
||||
*/
|
||||
/* Private types -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private constants ---------------------------------------------------------*/
|
||||
/** @defgroup PCCARD_Private_Constants PCCARD Private Constants
|
||||
* @{
|
||||
*/
|
||||
#define PCCARD_DEVICE_ADDRESS 0x90000000U
|
||||
#define PCCARD_ATTRIBUTE_SPACE_ADDRESS 0x98000000U /* Attribute space size to @0x9BFF FFFF */
|
||||
#define PCCARD_COMMON_SPACE_ADDRESS PCCARD_DEVICE_ADDRESS /* Common space size to @0x93FF FFFF */
|
||||
#define PCCARD_IO_SPACE_ADDRESS 0x9C000000U /* IO space size to @0x9FFF FFFF */
|
||||
#define PCCARD_IO_SPACE_PRIMARY_ADDR 0x9C0001F0U /* IO space size to @0x9FFF FFFF */
|
||||
|
||||
/* Flash-ATA registers description */
|
||||
#define ATA_DATA ((uint8_t)0x00) /* Data register */
|
||||
#define ATA_SECTOR_COUNT ((uint8_t)0x02) /* Sector Count register */
|
||||
#define ATA_SECTOR_NUMBER ((uint8_t)0x03) /* Sector Number register */
|
||||
#define ATA_CYLINDER_LOW ((uint8_t)0x04) /* Cylinder low register */
|
||||
#define ATA_CYLINDER_HIGH ((uint8_t)0x05) /* Cylinder high register */
|
||||
#define ATA_CARD_HEAD ((uint8_t)0x06) /* Card/Head register */
|
||||
#define ATA_STATUS_CMD ((uint8_t)0x07) /* Status(read)/Command(write) register */
|
||||
#define ATA_STATUS_CMD_ALTERNATE ((uint8_t)0x0E) /* Alternate Status(read)/Command(write) register */
|
||||
#define ATA_COMMON_DATA_AREA ((uint16_t)0x0400) /* Start of data area (for Common access only!) */
|
||||
#define ATA_CARD_CONFIGURATION ((uint16_t)0x0202) /* Card Configuration and Status Register */
|
||||
|
||||
/* Flash-ATA commands */
|
||||
#define ATA_READ_SECTOR_CMD ((uint8_t)0x20)
|
||||
#define ATA_WRITE_SECTOR_CMD ((uint8_t)0x30)
|
||||
#define ATA_ERASE_SECTOR_CMD ((uint8_t)0xC0)
|
||||
#define ATA_IDENTIFY_CMD ((uint8_t)0xEC)
|
||||
|
||||
/* PC Card/Compact Flash status */
|
||||
#define PCCARD_TIMEOUT_ERROR ((uint8_t)0x60)
|
||||
#define PCCARD_BUSY ((uint8_t)0x80)
|
||||
#define PCCARD_PROGR ((uint8_t)0x01)
|
||||
#define PCCARD_READY ((uint8_t)0x40)
|
||||
|
||||
#define PCCARD_SECTOR_SIZE 255U /* In half words */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/* Compact Flash redefinition */
|
||||
#define HAL_CF_Init HAL_PCCARD_Init
|
||||
#define HAL_CF_DeInit HAL_PCCARD_DeInit
|
||||
#define HAL_CF_MspInit HAL_PCCARD_MspInit
|
||||
#define HAL_CF_MspDeInit HAL_PCCARD_MspDeInit
|
||||
|
||||
#define HAL_CF_Read_ID HAL_PCCARD_Read_ID
|
||||
#define HAL_CF_Write_Sector HAL_PCCARD_Write_Sector
|
||||
#define HAL_CF_Read_Sector HAL_PCCARD_Read_Sector
|
||||
#define HAL_CF_Erase_Sector HAL_PCCARD_Erase_Sector
|
||||
#define HAL_CF_Reset HAL_PCCARD_Reset
|
||||
#define HAL_CF_IRQHandler HAL_PCCARD_IRQHandler
|
||||
#define HAL_CF_ITCallback HAL_PCCARD_ITCallback
|
||||
|
||||
#define HAL_CF_GetState HAL_PCCARD_GetState
|
||||
#define HAL_CF_GetStatus HAL_PCCARD_GetStatus
|
||||
#define HAL_CF_ReadStatus HAL_PCCARD_ReadStatus
|
||||
|
||||
#define HAL_CF_STATUS_SUCCESS HAL_PCCARD_STATUS_SUCCESS
|
||||
#define HAL_CF_STATUS_ONGOING HAL_PCCARD_STATUS_ONGOING
|
||||
#define HAL_CF_STATUS_ERROR HAL_PCCARD_STATUS_ERROR
|
||||
#define HAL_CF_STATUS_TIMEOUT HAL_PCCARD_STATUS_TIMEOUT
|
||||
#define HAL_CF_StatusTypeDef HAL_PCCARD_StatusTypeDef
|
||||
|
||||
#define CF_DEVICE_ADDRESS PCCARD_DEVICE_ADDRESS
|
||||
#define CF_ATTRIBUTE_SPACE_ADDRESS PCCARD_ATTRIBUTE_SPACE_ADDRESS
|
||||
#define CF_COMMON_SPACE_ADDRESS PCCARD_COMMON_SPACE_ADDRESS
|
||||
#define CF_IO_SPACE_ADDRESS PCCARD_IO_SPACE_ADDRESS
|
||||
#define CF_IO_SPACE_PRIMARY_ADDR PCCARD_IO_SPACE_PRIMARY_ADDR
|
||||
|
||||
#define CF_TIMEOUT_ERROR PCCARD_TIMEOUT_ERROR
|
||||
#define CF_BUSY PCCARD_BUSY
|
||||
#define CF_PROGR PCCARD_PROGR
|
||||
#define CF_READY PCCARD_READY
|
||||
|
||||
#define CF_SECTOR_SIZE PCCARD_SECTOR_SIZE
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* STM32F302xE || STM32F303xE || STM32F398xx */
|
||||
#endif /* FMC_BANK4 */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F3xx_HAL_PCCARD_H */
|
||||
#endif /* STM32F3xx_HAL_PCCARD_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -6,49 +6,29 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_HAL_PCD_EX_H
|
||||
#define __STM32F3xx_HAL_PCD_EX_H
|
||||
#ifndef STM32F3xx_HAL_PCD_EX_H
|
||||
#define STM32F3xx_HAL_PCD_EX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if defined(STM32F302xE) || defined(STM32F303xE) || \
|
||||
defined(STM32F302xC) || defined(STM32F303xC) || \
|
||||
defined(STM32F302x8) || \
|
||||
defined(STM32F373xC)
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f3xx_hal_def.h"
|
||||
|
||||
#if defined (USB)
|
||||
/** @addtogroup STM32F3xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
@ -56,57 +36,9 @@
|
|||
/** @addtogroup PCDEx
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* Exported macros -----------------------------------------------------------*/
|
||||
/** @defgroup PCDEx_Exported_Macros PCD Extended Exported Macros
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief Gets address in an endpoint register.
|
||||
* @param USBx USB peripheral instance register address.
|
||||
* @param bEpNum Endpoint Number.
|
||||
* @retval None
|
||||
*/
|
||||
|
||||
#if defined(STM32F302xC) || defined(STM32F303xC) || \
|
||||
defined(STM32F373xC)
|
||||
|
||||
#define PCD_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8)*2+ ((uint32_t)(USBx) + 0x400U)))))
|
||||
#define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8+2)*2+ ((uint32_t)(USBx) + 0x400U)))))
|
||||
#define PCD_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8+4)*2+ ((uint32_t)(USBx) + 0x400U)))))
|
||||
#define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8+6)*2+ ((uint32_t)(USBx) + 0x400U)))))
|
||||
|
||||
|
||||
#define PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount) {\
|
||||
uint16_t *pdwReg =PCD_EP_RX_CNT((USBx),(bEpNum)); \
|
||||
PCD_SET_EP_CNT_RX_REG((pdwReg), (wCount))\
|
||||
}
|
||||
|
||||
#endif /* STM32F302xC || STM32F303xC || */
|
||||
/* STM32F373xC */
|
||||
|
||||
|
||||
#if defined(STM32F302xE) || defined(STM32F303xE) || \
|
||||
defined(STM32F302x8)
|
||||
|
||||
#define PCD_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8)+ ((uint32_t)(USBx) + 0x400U)))))
|
||||
#define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8+2)+ ((uint32_t)(USBx) + 0x400U)))))
|
||||
#define PCD_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8+4)+ ((uint32_t)(USBx) + 0x400U)))))
|
||||
#define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((uint32_t)((((USBx)->BTABLE+(bEpNum)*8+6)+ ((uint32_t)(USBx) + 0x400U)))))
|
||||
|
||||
#define PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount) {\
|
||||
uint16_t *pdwReg = PCD_EP_RX_CNT((USBx), (bEpNum));\
|
||||
PCD_SET_EP_CNT_RX_REG((pdwReg), (wCount))\
|
||||
}
|
||||
|
||||
#endif /* STM32F302xE || STM32F303xE || */
|
||||
/* STM32F302x8 */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @addtogroup PCDEx_Exported_Functions PCDEx Exported Functions
|
||||
* @{
|
||||
|
@ -114,13 +46,19 @@
|
|||
/** @addtogroup PCDEx_Exported_Functions_Group1 Peripheral Control functions
|
||||
* @{
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd,
|
||||
uint16_t ep_addr,
|
||||
uint16_t ep_kind,
|
||||
uint32_t pmaadress);
|
||||
|
||||
|
||||
|
||||
HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd,
|
||||
uint16_t ep_addr,
|
||||
uint16_t ep_kind,
|
||||
uint32_t pmaadress);
|
||||
|
||||
void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state);
|
||||
|
||||
void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg);
|
||||
void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -136,17 +74,13 @@ void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state);
|
|||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* STM32F302xE || STM32F303xE || */
|
||||
/* STM32F302xC || STM32F303xC || */
|
||||
/* STM32F302x8 || */
|
||||
/* STM32F373xC */
|
||||
#endif /* defined (USB) */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* __STM32F3xx_HAL_PCD_EX_H */
|
||||
#endif /* STM32F3xx_HAL_PCD_EX_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
|
@ -6,29 +6,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
|
|
@ -6,29 +6,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
|
|
@ -6,29 +6,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
|
|
@ -6,29 +6,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
@ -596,7 +580,7 @@ typedef struct
|
|||
|
||||
uint32_t Tim34ClockSelection; /*!< TIM3 & TIM4 clock source
|
||||
This parameter can be a value of @ref RCCEx_TIM34_Clock_Source */
|
||||
|
||||
|
||||
uint32_t Tim15ClockSelection; /*!< TIM15 clock source
|
||||
This parameter can be a value of @ref RCCEx_TIM15_Clock_Source */
|
||||
|
||||
|
|
|
@ -6,29 +6,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
@ -38,7 +22,7 @@
|
|||
#define __STM32F3xx_HAL_RTC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
|
@ -68,7 +52,7 @@ typedef enum
|
|||
HAL_RTC_STATE_TIMEOUT = 0x03U, /*!< RTC timeout state */
|
||||
HAL_RTC_STATE_ERROR = 0x04U /*!< RTC error state */
|
||||
|
||||
}HAL_RTCStateTypeDef;
|
||||
} HAL_RTCStateTypeDef;
|
||||
|
||||
/**
|
||||
* @brief RTC Configuration Structure definition
|
||||
|
@ -92,7 +76,7 @@ typedef struct
|
|||
|
||||
uint32_t OutPutType; /*!< Specifies the RTC Output Pin mode.
|
||||
This parameter can be a value of @ref RTC_Output_Type_ALARM_OUT */
|
||||
}RTC_InitTypeDef;
|
||||
} RTC_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief RTC Time structure definition
|
||||
|
@ -128,7 +112,7 @@ typedef struct
|
|||
uint32_t StoreOperation; /*!< Specifies RTC_StoreOperation value to be written in the BCK bit
|
||||
in CR register to store the operation.
|
||||
This parameter can be a value of @ref RTC_StoreOperation_Definitions */
|
||||
}RTC_TimeTypeDef;
|
||||
} RTC_TimeTypeDef;
|
||||
|
||||
/**
|
||||
* @brief RTC Date structure definition
|
||||
|
@ -147,7 +131,7 @@ typedef struct
|
|||
uint8_t Year; /*!< Specifies the RTC Date Year.
|
||||
This parameter must be a number between Min_Data = 0 and Max_Data = 99 */
|
||||
|
||||
}RTC_DateTypeDef;
|
||||
} RTC_DateTypeDef;
|
||||
|
||||
/**
|
||||
* @brief RTC Alarm structure definition
|
||||
|
@ -171,12 +155,16 @@ typedef struct
|
|||
|
||||
uint32_t Alarm; /*!< Specifies the alarm .
|
||||
This parameter can be a value of @ref RTC_Alarms_Definitions */
|
||||
}RTC_AlarmTypeDef;
|
||||
} RTC_AlarmTypeDef;
|
||||
|
||||
/**
|
||||
* @brief RTC Handle Structure definition
|
||||
*/
|
||||
#if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
|
||||
typedef struct __RTC_HandleTypeDef
|
||||
#else
|
||||
typedef struct
|
||||
#endif /* (USE_HAL_RTC_REGISTER_CALLBACKS) */
|
||||
{
|
||||
RTC_TypeDef *Instance; /*!< Register base address */
|
||||
|
||||
|
@ -186,7 +174,56 @@ typedef struct
|
|||
|
||||
__IO HAL_RTCStateTypeDef State; /*!< Time communication state */
|
||||
|
||||
}RTC_HandleTypeDef;
|
||||
#if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
|
||||
void (* AlarmAEventCallback) ( struct __RTC_HandleTypeDef * hrtc); /*!< RTC Alarm A Event callback */
|
||||
|
||||
void (* AlarmBEventCallback) ( struct __RTC_HandleTypeDef * hrtc); /*!< RTC Alarm B Event callback */
|
||||
|
||||
void (* TimeStampEventCallback) ( struct __RTC_HandleTypeDef * hrtc); /*!< RTC TimeStamp Event callback */
|
||||
|
||||
void (* WakeUpTimerEventCallback) ( struct __RTC_HandleTypeDef * hrtc); /*!< RTC WakeUpTimer Event callback */
|
||||
|
||||
void (* Tamper1EventCallback) ( struct __RTC_HandleTypeDef * hrtc); /*!< RTC Tamper 1 Event callback */
|
||||
|
||||
void (* Tamper2EventCallback) ( struct __RTC_HandleTypeDef * hrtc); /*!< RTC Tamper 2 Event callback */
|
||||
|
||||
#if defined(RTC_TAMPER3_SUPPORT)
|
||||
void (* Tamper3EventCallback) ( struct __RTC_HandleTypeDef * hrtc); /*!< RTC Tamper 3 Event callback */
|
||||
#endif /* RTC_TAMPER3_SUPPORT */
|
||||
|
||||
void (* MspInitCallback) ( struct __RTC_HandleTypeDef * hrtc); /*!< RTC Msp Init callback */
|
||||
|
||||
void (* MspDeInitCallback) ( struct __RTC_HandleTypeDef * hrtc); /*!< RTC Msp DeInit callback */
|
||||
|
||||
#endif /* (USE_HAL_RTC_REGISTER_CALLBACKS) */
|
||||
|
||||
} RTC_HandleTypeDef;
|
||||
|
||||
#if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
|
||||
/**
|
||||
* @brief HAL RTC Callback ID enumeration definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_RTC_ALARM_A_EVENT_CB_ID = 0x00u, /*!< RTC Alarm A Event Callback ID */
|
||||
HAL_RTC_ALARM_B_EVENT_CB_ID = 0x01u, /*!< RTC Alarm B Event Callback ID */
|
||||
HAL_RTC_TIMESTAMP_EVENT_CB_ID = 0x02u, /*!< RTC TimeStamp Event Callback ID */
|
||||
HAL_RTC_WAKEUPTIMER_EVENT_CB_ID = 0x03u, /*!< RTC Wake-Up Timer Event Callback ID */
|
||||
HAL_RTC_TAMPER1_EVENT_CB_ID = 0x04u, /*!< RTC Tamper 1 Callback ID */
|
||||
HAL_RTC_TAMPER2_EVENT_CB_ID = 0x05u, /*!< RTC Tamper 2 Callback ID */
|
||||
#if defined(RTC_TAMPER3_SUPPORT)
|
||||
HAL_RTC_TAMPER3_EVENT_CB_ID = 0x06u, /*!< RTC Tamper 3 Callback ID */
|
||||
#endif /* RTC_TAMPER3_SUPPORT */
|
||||
HAL_RTC_MSPINIT_CB_ID = 0x0Eu, /*!< RTC Msp Init callback ID */
|
||||
HAL_RTC_MSPDEINIT_CB_ID = 0x0Fu /*!< RTC Msp DeInit callback ID */
|
||||
}HAL_RTC_CallbackIDTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL RTC Callback pointer definition
|
||||
*/
|
||||
typedef void (*pRTC_CallbackTypeDef)(RTC_HandleTypeDef * hrtc); /*!< pointer to an RTC callback function */
|
||||
#endif /* USE_HAL_RTC_REGISTER_CALLBACKS */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -329,9 +366,9 @@ typedef struct
|
|||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RTC_Alarm_Sub_Seconds_Masks_Definitions RTC Alarm Sub Seconds Masks Definitions
|
||||
* @{
|
||||
*/
|
||||
/** @defgroup RTC_Alarm_Sub_Seconds_Masks_Definitions RTC Alarm Sub Seconds Masks Definitions
|
||||
* @{
|
||||
*/
|
||||
#define RTC_ALARMSUBSECONDMASK_ALL 0x00000000U /*!< All Alarm SS fields are masked.
|
||||
There is no comparison on sub seconds
|
||||
for Alarm */
|
||||
|
@ -424,7 +461,15 @@ typedef struct
|
|||
* @param __HANDLE__ RTC handle.
|
||||
* @retval None
|
||||
*/
|
||||
#if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
|
||||
#define __HAL_RTC_RESET_HANDLE_STATE(__HANDLE__) do{\
|
||||
(__HANDLE__)->State = HAL_RTC_STATE_RESET;\
|
||||
(__HANDLE__)->MspInitCallback = NULL;\
|
||||
(__HANDLE__)->MspDeInitCallback = NULL;\
|
||||
}while(0u)
|
||||
#else
|
||||
#define __HAL_RTC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_RTC_STATE_RESET)
|
||||
#endif /* USE_HAL_RTC_REGISTER_CALLBACKS */
|
||||
|
||||
/**
|
||||
* @brief Disable the write protection for RTC registers.
|
||||
|
@ -641,6 +686,12 @@ HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc);
|
|||
HAL_StatusTypeDef HAL_RTC_DeInit(RTC_HandleTypeDef *hrtc);
|
||||
void HAL_RTC_MspInit(RTC_HandleTypeDef *hrtc);
|
||||
void HAL_RTC_MspDeInit(RTC_HandleTypeDef *hrtc);
|
||||
|
||||
/* Callbacks Register/UnRegister functions ***********************************/
|
||||
#if (USE_HAL_RTC_REGISTER_CALLBACKS == 1)
|
||||
HAL_StatusTypeDef HAL_RTC_RegisterCallback(RTC_HandleTypeDef *hrtc, HAL_RTC_CallbackIDTypeDef CallbackID, pRTC_CallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_RTC_UnRegisterCallback(RTC_HandleTypeDef *hrtc, HAL_RTC_CallbackIDTypeDef CallbackID);
|
||||
#endif /* USE_HAL_RTC_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -677,7 +728,7 @@ void HAL_RTC_AlarmAEventCallback(RTC_HandleTypeDef *hrtc);
|
|||
* @{
|
||||
*/
|
||||
/* Peripheral Control functions ***********************************************/
|
||||
HAL_StatusTypeDef HAL_RTC_WaitForSynchro(RTC_HandleTypeDef* hrtc);
|
||||
HAL_StatusTypeDef HAL_RTC_WaitForSynchro(RTC_HandleTypeDef *hrtc);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -818,7 +869,7 @@ HAL_RTCStateTypeDef HAL_RTC_GetState(RTC_HandleTypeDef *hrtc);
|
|||
/** @defgroup RTC_Private_Functions RTC Private Functions
|
||||
* @{
|
||||
*/
|
||||
HAL_StatusTypeDef RTC_EnterInitMode(RTC_HandleTypeDef* hrtc);
|
||||
HAL_StatusTypeDef RTC_EnterInitMode(RTC_HandleTypeDef *hrtc);
|
||||
uint8_t RTC_ByteToBcd2(uint8_t Value);
|
||||
uint8_t RTC_Bcd2ToByte(uint8_t Value);
|
||||
/**
|
||||
|
|
|
@ -6,29 +6,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
@ -38,7 +22,7 @@
|
|||
#define __STM32F3xx_HAL_RTC_EX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
|
@ -83,7 +67,7 @@ typedef struct
|
|||
|
||||
uint32_t TimeStampOnTamperDetection; /*!< Specifies the TimeStampOnTamperDetection.
|
||||
This parameter can be a value of @ref RTCEx_Tamper_TimeStampOnTamperDetection_Definitions */
|
||||
}RTC_TamperTypeDef;
|
||||
} RTC_TamperTypeDef;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -304,9 +288,9 @@ typedef struct
|
|||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RTCEx_Calib_Output_selection_Definitions RTC Extended Calib Output selection Definition
|
||||
* @{
|
||||
*/
|
||||
/** @defgroup RTCEx_Calib_Output_selection_Definitions RTC Extended Calib Output selection Definition
|
||||
* @{
|
||||
*/
|
||||
#define RTC_CALIBOUTPUT_512HZ 0x00000000U
|
||||
#define RTC_CALIBOUTPUT_1HZ RTC_CR_COSEL
|
||||
/**
|
||||
|
@ -669,17 +653,17 @@ typedef struct
|
|||
*/
|
||||
#define __HAL_RTC_TAMPER_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->TAFCR) & (__INTERRUPT__)) != RESET) ? SET : RESET)
|
||||
|
||||
/**
|
||||
* @brief Get the selected RTC Tamper's flag status.
|
||||
* @param __HANDLE__ specifies the RTC handle.
|
||||
* @param __FLAG__ specifies the RTC Tamper Flag is pending or not.
|
||||
* This parameter can be:
|
||||
* @arg RTC_FLAG_TAMP1F
|
||||
* @arg RTC_FLAG_TAMP2F
|
||||
* @arg RTC_FLAG_TAMP3F (*)
|
||||
* @note (*) RTC_FLAG_TAMP3F not present on all the devices
|
||||
* @retval None
|
||||
*/
|
||||
/**
|
||||
* @brief Get the selected RTC Tamper's flag status.
|
||||
* @param __HANDLE__ specifies the RTC handle.
|
||||
* @param __FLAG__ specifies the RTC Tamper Flag is pending or not.
|
||||
* This parameter can be:
|
||||
* @arg RTC_FLAG_TAMP1F
|
||||
* @arg RTC_FLAG_TAMP2F
|
||||
* @arg RTC_FLAG_TAMP3F (*)
|
||||
* @note (*) RTC_FLAG_TAMP3F not present on all the devices
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_RTC_TAMPER_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) != RESET)? SET : RESET)
|
||||
|
||||
|
||||
|
@ -855,8 +839,8 @@ HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp_IT(RTC_HandleTypeDef *hrtc, uint32_t Ti
|
|||
HAL_StatusTypeDef HAL_RTCEx_DeactivateTimeStamp(RTC_HandleTypeDef *hrtc);
|
||||
HAL_StatusTypeDef HAL_RTCEx_GetTimeStamp(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTimeStamp, RTC_DateTypeDef *sTimeStampDate, uint32_t Format);
|
||||
|
||||
HAL_StatusTypeDef HAL_RTCEx_SetTamper(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef* sTamper);
|
||||
HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef* sTamper);
|
||||
HAL_StatusTypeDef HAL_RTCEx_SetTamper(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef *sTamper);
|
||||
HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef *sTamper);
|
||||
HAL_StatusTypeDef HAL_RTCEx_DeactivateTamper(RTC_HandleTypeDef *hrtc, uint32_t Tamper);
|
||||
void HAL_RTCEx_TamperTimeStampIRQHandler(RTC_HandleTypeDef *hrtc);
|
||||
|
||||
|
|
|
@ -7,29 +7,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
@ -42,7 +26,7 @@
|
|||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if defined(STM32F373xC) || defined(STM32F378xx)
|
||||
#if defined(SDADC1) || defined(SDAD2) || defined(SDADC3)
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f3xx_hal_def.h"
|
||||
|
@ -94,7 +78,7 @@ typedef struct
|
|||
/**
|
||||
* @brief SDADC handle Structure definition
|
||||
*/
|
||||
typedef struct
|
||||
typedef struct __SDADC_HandleTypeDef
|
||||
{
|
||||
SDADC_TypeDef *Instance; /*!< SDADC registers base address */
|
||||
SDADC_InitTypeDef Init; /*!< SDADC init parameters */
|
||||
|
@ -110,6 +94,16 @@ typedef struct
|
|||
uint32_t InjectedMultimode; /*!< Current type of injected multimode */
|
||||
HAL_SDADC_StateTypeDef State; /*!< SDADC state */
|
||||
uint32_t ErrorCode; /*!< SDADC Error code */
|
||||
#if (USE_HAL_SDADC_REGISTER_CALLBACKS == 1)
|
||||
void (* ConvHalfCpltCallback)(struct __SDADC_HandleTypeDef *hadc); /*!< SDADC half regular conversion complete callback */
|
||||
void (* ConvCpltCallback)(struct __SDADC_HandleTypeDef *hadc); /*!< SDADC regular conversion complete callback */
|
||||
void (* InjectedConvHalfCpltCallback)(struct __SDADC_HandleTypeDef *hadc); /*!< SDADC half injected conversion complete callback */
|
||||
void (* InjectedConvCpltCallback)(struct __SDADC_HandleTypeDef *hadc); /*!< SDADC injected conversion complete callback */
|
||||
void (* CalibrationCpltCallback)(struct __SDADC_HandleTypeDef *hadc); /*!< SDADC calibration callback */
|
||||
void (* ErrorCallback)(struct __SDADC_HandleTypeDef *hadc); /*!< SDADC error callback */
|
||||
void (* MspInitCallback)(struct __SDADC_HandleTypeDef *hadc); /*!< SDADC Msp Init callback */
|
||||
void (* MspDeInitCallback)(struct __SDADC_HandleTypeDef *hadc); /*!< SDADC Msp DeInit callback */
|
||||
#endif /* USE_HAL_SDADC_REGISTER_CALLBACKS */
|
||||
}SDADC_HandleTypeDef;
|
||||
|
||||
/**
|
||||
|
@ -127,6 +121,29 @@ typedef struct
|
|||
This parameter can be any value lower or equal to 0x00000FFFU */
|
||||
}SDADC_ConfParamTypeDef;
|
||||
|
||||
#if (USE_HAL_SDADC_REGISTER_CALLBACKS == 1)
|
||||
/**
|
||||
* @brief HAL SDADC Callback ID enumeration definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_SDADC_CONVERSION_HALF_CB_ID = 0x00U, /*!< SDADC half regular conversion complete callback ID */
|
||||
HAL_SDADC_CONVERSION_COMPLETE_CB_ID = 0x01U, /*!< SDADC regular conversion complete callback ID */
|
||||
HAL_SDADC_INJ_CONVERSION_HALF_CB_ID = 0x02U, /*!< SDADC half injected conversion complete callback ID */
|
||||
HAL_SDADC_INJ_CONVERSION_COMPLETE_CB_ID = 0x03U, /*!< SDADC injected conversion complete callback ID */
|
||||
HAL_SDADC_CALIBRATION_COMPLETE_CB_ID = 0x04U, /*!< SDADC calibration callback ID */
|
||||
HAL_SDADC_ERROR_CB_ID = 0x05U, /*!< SDADC error callback ID */
|
||||
HAL_SDADC_MSPINIT_CB_ID = 0x06U, /*!< SDADC Msp Init callback ID */
|
||||
HAL_SDADC_MSPDEINIT_CB_ID = 0x07U /*!< SDADC Msp DeInit callback ID */
|
||||
} HAL_SDADC_CallbackIDTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL SDADC Callback pointer definition
|
||||
*/
|
||||
typedef void (*pSDADC_CallbackTypeDef)(SDADC_HandleTypeDef *hsdadc); /*!< pointer to a SDADC callback function */
|
||||
|
||||
#endif /* USE_HAL_SDADC_REGISTER_CALLBACKS */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -339,6 +356,9 @@ typedef struct
|
|||
#define SDADC_ERROR_REGULAR_OVERRUN (0x00000001UL) /*!< Overrun occurs during regular conversion */
|
||||
#define SDADC_ERROR_INJECTED_OVERRUN (0x00000002UL) /*!< Overrun occurs during injected conversion */
|
||||
#define SDADC_ERROR_DMA (0x00000003UL) /*!< DMA error occurs */
|
||||
#if (USE_HAL_SDADC_REGISTER_CALLBACKS == 1)
|
||||
#define SDADC_ERROR_INVALID_CALLBACK (0x00000004UL) /*!< Invalid Callback error */
|
||||
#endif /* USE_HAL_SDADC_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -453,7 +473,17 @@ typedef struct
|
|||
* @param __HANDLE__ SDADC handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SDADC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SDADC_STATE_RESET)
|
||||
#if (USE_HAL_SDADC_REGISTER_CALLBACKS == 1)
|
||||
#define __HAL_SDADC_RESET_HANDLE_STATE(__HANDLE__) \
|
||||
do{ \
|
||||
(__HANDLE__)->State = HAL_SDADC_STATE_RESET; \
|
||||
(__HANDLE__)->MspInitCallback = NULL; \
|
||||
(__HANDLE__)->MspDeInitCallback = NULL; \
|
||||
} while(0)
|
||||
#else
|
||||
#define __HAL_SDADC_RESET_HANDLE_STATE(__HANDLE__) \
|
||||
((__HANDLE__)->State = HAL_SDADC_STATE_RESET)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
@ -582,6 +612,12 @@ HAL_StatusTypeDef HAL_SDADC_DeInit(SDADC_HandleTypeDef *hsdadc);
|
|||
void HAL_SDADC_MspInit(SDADC_HandleTypeDef* hsdadc);
|
||||
void HAL_SDADC_MspDeInit(SDADC_HandleTypeDef* hsdadc);
|
||||
|
||||
#if (USE_HAL_SDADC_REGISTER_CALLBACKS == 1)
|
||||
/* Callbacks Register/UnRegister functions ***********************************/
|
||||
HAL_StatusTypeDef HAL_SDADC_RegisterCallback(SDADC_HandleTypeDef *sdhadc, HAL_SDADC_CallbackIDTypeDef CallbackID, pSDADC_CallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_SDADC_UnRegisterCallback(SDADC_HandleTypeDef *sdhadc, HAL_SDADC_CallbackIDTypeDef CallbackID);
|
||||
#endif /* USE_HAL_SDADC_REGISTER_CALLBACKS */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -692,7 +728,7 @@ uint32_t HAL_SDADC_GetError(SDADC_HandleTypeDef* hsdadc);
|
|||
* @}
|
||||
*/
|
||||
|
||||
#endif /* defined(STM32F373xC) || defined(STM32F378xx) */
|
||||
#endif /* SDADC1 || SDAD2 || SDADC3 */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -6,39 +6,23 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_HAL_SMARTCARD_EX_H
|
||||
#define __STM32F3xx_HAL_SMARTCARD_EX_H
|
||||
#ifndef STM32F3xx_HAL_SMARTCARD_EX_H
|
||||
#define STM32F3xx_HAL_SMARTCARD_EX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
|
@ -54,6 +38,102 @@
|
|||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup SMARTCARDEx_Exported_Constants SMARTCARD Extended Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup SMARTCARDEx_Transmission_Completion_Indication SMARTCARD Transmission Completion Indication
|
||||
* @{
|
||||
*/
|
||||
#define SMARTCARD_TC SMARTCARD_IT_TC /*!< SMARTCARD transmission complete (flag raised when guard time has elapsed) */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SMARTCARDEx_Advanced_Features_Initialization_Type SMARTCARD advanced feature initialization type
|
||||
* @{
|
||||
*/
|
||||
#define SMARTCARD_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */
|
||||
#define SMARTCARD_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */
|
||||
#define SMARTCARD_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */
|
||||
#define SMARTCARD_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */
|
||||
#define SMARTCARD_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */
|
||||
#define SMARTCARD_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */
|
||||
#define SMARTCARD_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */
|
||||
#define SMARTCARD_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SMARTCARDEx_Flags SMARTCARD Flags
|
||||
* Elements values convention: 0xXXXX
|
||||
* - 0xXXXX : Flag mask in the ISR register
|
||||
* @{
|
||||
*/
|
||||
#define SMARTCARD_FLAG_REACK USART_ISR_REACK /*!< SMARTCARD receive enable acknowledge flag */
|
||||
#define SMARTCARD_FLAG_TEACK USART_ISR_TEACK /*!< SMARTCARD transmit enable acknowledge flag */
|
||||
#define SMARTCARD_FLAG_BUSY USART_ISR_BUSY /*!< SMARTCARD busy flag */
|
||||
#define SMARTCARD_FLAG_EOBF USART_ISR_EOBF /*!< SMARTCARD end of block flag */
|
||||
#define SMARTCARD_FLAG_RTOF USART_ISR_RTOF /*!< SMARTCARD receiver timeout flag */
|
||||
#define SMARTCARD_FLAG_TXE USART_ISR_TXE /*!< SMARTCARD transmit data register empty */
|
||||
#define SMARTCARD_FLAG_TC USART_ISR_TC /*!< SMARTCARD transmission complete */
|
||||
#define SMARTCARD_FLAG_RXNE USART_ISR_RXNE /*!< SMARTCARD read data register not empty */
|
||||
#define SMARTCARD_FLAG_IDLE USART_ISR_IDLE /*!< SMARTCARD idle line detection */
|
||||
#define SMARTCARD_FLAG_ORE USART_ISR_ORE /*!< SMARTCARD overrun error */
|
||||
#define SMARTCARD_FLAG_NE USART_ISR_NE /*!< SMARTCARD noise error */
|
||||
#define SMARTCARD_FLAG_FE USART_ISR_FE /*!< SMARTCARD frame error */
|
||||
#define SMARTCARD_FLAG_PE USART_ISR_PE /*!< SMARTCARD parity error */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SMARTCARDEx_Interrupt_definition SMARTCARD Interrupts Definition
|
||||
* Elements values convention: 000ZZZZZ0XXYYYYYb
|
||||
* - YYYYY : Interrupt source position in the XX register (5 bits)
|
||||
* - XX : Interrupt source register (2 bits)
|
||||
* - 01: CR1 register
|
||||
* - 10: CR2 register
|
||||
* - 11: CR3 register
|
||||
* - ZZZZZ : Flag position in the ISR register(5 bits)
|
||||
* @{
|
||||
*/
|
||||
#define SMARTCARD_IT_PE 0x0028U /*!< SMARTCARD parity error interruption */
|
||||
#define SMARTCARD_IT_TXE 0x0727U /*!< SMARTCARD transmit data register empty interruption */
|
||||
#define SMARTCARD_IT_TC 0x0626U /*!< SMARTCARD transmission complete interruption */
|
||||
#define SMARTCARD_IT_RXNE 0x0525U /*!< SMARTCARD read data register not empty interruption */
|
||||
#define SMARTCARD_IT_IDLE 0x0424U /*!< SMARTCARD idle line detection interruption */
|
||||
|
||||
#define SMARTCARD_IT_ERR 0x0060U /*!< SMARTCARD error interruption */
|
||||
#define SMARTCARD_IT_ORE 0x0300U /*!< SMARTCARD overrun error interruption */
|
||||
#define SMARTCARD_IT_NE 0x0200U /*!< SMARTCARD noise error interruption */
|
||||
#define SMARTCARD_IT_FE 0x0100U /*!< SMARTCARD frame error interruption */
|
||||
|
||||
#define SMARTCARD_IT_EOB 0x0C3BU /*!< SMARTCARD end of block interruption */
|
||||
#define SMARTCARD_IT_RTO 0x0B3AU /*!< SMARTCARD receiver timeout interruption */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SMARTCARDEx_IT_CLEAR_Flags SMARTCARD Interruption Clear Flags
|
||||
* @{
|
||||
*/
|
||||
#define SMARTCARD_CLEAR_PEF USART_ICR_PECF /*!< SMARTCARD parity error clear flag */
|
||||
#define SMARTCARD_CLEAR_FEF USART_ICR_FECF /*!< SMARTCARD framing error clear flag */
|
||||
#define SMARTCARD_CLEAR_NEF USART_ICR_NCF /*!< SMARTCARD noise error detected clear flag */
|
||||
#define SMARTCARD_CLEAR_OREF USART_ICR_ORECF /*!< SMARTCARD overrun error clear flag */
|
||||
#define SMARTCARD_CLEAR_IDLEF USART_ICR_IDLECF /*!< SMARTCARD idle line detected clear flag */
|
||||
#define SMARTCARD_CLEAR_TCF USART_ICR_TCCF /*!< SMARTCARD transmission complete clear flag */
|
||||
#define SMARTCARD_CLEAR_RTOF USART_ICR_RTOCF /*!< SMARTCARD receiver time out clear flag */
|
||||
#define SMARTCARD_CLEAR_EOBF USART_ICR_EOBCF /*!< SMARTCARD end of block clear flag */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/* Exported macros -----------------------------------------------------------*/
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/** @defgroup SMARTCARDEx_Private_Macros SMARTCARD Extended Private Macros
|
||||
|
@ -65,116 +145,213 @@
|
|||
* @param __CLOCKSOURCE__ output variable.
|
||||
* @retval the SMARTCARD clocking source, written in __CLOCKSOURCE__.
|
||||
*/
|
||||
#if defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
|
||||
defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
|
||||
#define SMARTCARD_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
|
||||
do { \
|
||||
if((__HANDLE__)->Instance == USART1) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART1_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART1CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == USART2) \
|
||||
{ \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_PCLK1; \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == USART3) \
|
||||
{ \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_PCLK1; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_UNDEFINED; \
|
||||
} \
|
||||
#if defined(STM32F302xE)|| defined(STM32F303xE) || defined(STM32F398xx) || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)
|
||||
#define SMARTCARD_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
|
||||
do { \
|
||||
if((__HANDLE__)->Instance == USART1) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART1_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART1CLKSOURCE_PCLK2: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_PCLK2; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == USART2) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART2_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART2CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == USART3) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART3_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART3CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_USART3CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART3CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART3CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_UNDEFINED; \
|
||||
} \
|
||||
} while(0U)
|
||||
#elif defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
|
||||
#define SMARTCARD_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
|
||||
do { \
|
||||
if((__HANDLE__)->Instance == USART1) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART1_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART1CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == USART2) \
|
||||
{ \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_PCLK1; \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == USART3) \
|
||||
{ \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_PCLK1; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_UNDEFINED; \
|
||||
} \
|
||||
} while(0U)
|
||||
#else
|
||||
#define SMARTCARD_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
|
||||
do { \
|
||||
if((__HANDLE__)->Instance == USART1) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART1_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART1CLKSOURCE_PCLK2: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_PCLK2; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == USART2) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART2_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART2CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == USART3) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART3_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART3CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_USART3CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART3CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART3CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_UNDEFINED; \
|
||||
} \
|
||||
#define SMARTCARD_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
|
||||
do { \
|
||||
if((__HANDLE__)->Instance == USART1) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART1_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART1CLKSOURCE_PCLK2: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_PCLK2; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == USART2) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART2_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART2CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == USART3) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART3_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART3CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_USART3CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART3CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART3CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_UNDEFINED; \
|
||||
} \
|
||||
} while(0U)
|
||||
#endif
|
||||
/** @brief Set the Transmission Completion flag
|
||||
* @param __HANDLE__ specifies the SMARTCARD Handle.
|
||||
* @note If TCBGT (Transmission Complete Before Guard Time) flag is not available or if
|
||||
* AdvancedInit.TxCompletionIndication is not already filled, the latter is forced
|
||||
* to SMARTCARD_TC (transmission completion indication when guard time has elapsed).
|
||||
* @retval None
|
||||
*/
|
||||
#define SMARTCARD_TRANSMISSION_COMPLETION_SETTING(__HANDLE__) \
|
||||
do { \
|
||||
(__HANDLE__)->AdvancedInit.TxCompletionIndication = SMARTCARD_TC; \
|
||||
} while(0U)
|
||||
|
||||
/** @brief Return the transmission completion flag.
|
||||
* @param __HANDLE__ specifies the SMARTCARD Handle.
|
||||
* @note Based on AdvancedInit.TxCompletionIndication setting, return TC or TCBGT flag.
|
||||
* When TCBGT flag (Transmission Complete Before Guard Time) is not available, TC flag is
|
||||
* reported.
|
||||
* @retval Transmission completion flag
|
||||
*/
|
||||
#define SMARTCARD_TRANSMISSION_COMPLETION_FLAG(__HANDLE__) (SMARTCARD_FLAG_TC)
|
||||
|
||||
|
||||
/** @brief Ensure that SMARTCARD frame transmission completion used flag is valid.
|
||||
* @param __TXCOMPLETE__ SMARTCARD frame transmission completion used flag.
|
||||
* @retval SET (__TXCOMPLETE__ is valid) or RESET (__TXCOMPLETE__ is invalid)
|
||||
*/
|
||||
#define IS_SMARTCARD_TRANSMISSION_COMPLETION(__TXCOMPLETE__) ((__TXCOMPLETE__) == SMARTCARD_TC)
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
@ -202,10 +379,24 @@ HAL_StatusTypeDef HAL_SMARTCARDEx_DisableReceiverTimeOut(SMARTCARD_HandleTypeDef
|
|||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @addtogroup SMARTCARDEx_Exported_Functions_Group2
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* IO operation functions *****************************************************/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -218,6 +409,6 @@ HAL_StatusTypeDef HAL_SMARTCARDEx_DisableReceiverTimeOut(SMARTCARD_HandleTypeDef
|
|||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F3xx_HAL_SMARTCARD_EX_H */
|
||||
#endif /* STM32F3xx_HAL_SMARTCARD_EX_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
|
@ -6,36 +6,20 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_HAL_SMBUS_H
|
||||
#define __STM32F3xx_HAL_SMBUS_H
|
||||
#ifndef STM32F3xx_HAL_SMBUS_H
|
||||
#define STM32F3xx_HAL_SMBUS_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
@ -136,6 +120,10 @@ typedef struct
|
|||
#define HAL_SMBUS_ERROR_BUSTIMEOUT (0x00000020U) /*!< Bus Timeout error */
|
||||
#define HAL_SMBUS_ERROR_ALERT (0x00000040U) /*!< Alert error */
|
||||
#define HAL_SMBUS_ERROR_PECERR (0x00000080U) /*!< PEC error */
|
||||
#if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)
|
||||
#define HAL_SMBUS_ERROR_INVALID_CALLBACK (0x00000100U) /*!< Invalid Callback error */
|
||||
#endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */
|
||||
#define HAL_SMBUS_ERROR_INVALID_PARAM (0x00000200U) /*!< Invalid Parameters error */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -144,7 +132,7 @@ typedef struct
|
|||
* @brief SMBUS handle Structure definition
|
||||
* @{
|
||||
*/
|
||||
typedef struct
|
||||
typedef struct __SMBUS_HandleTypeDef
|
||||
{
|
||||
I2C_TypeDef *Instance; /*!< SMBUS registers base address */
|
||||
|
||||
|
@ -166,7 +154,47 @@ typedef struct
|
|||
|
||||
__IO uint32_t ErrorCode; /*!< SMBUS Error code */
|
||||
|
||||
#if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)
|
||||
void (* MasterTxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Master Tx Transfer completed callback */
|
||||
void (* MasterRxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Master Rx Transfer completed callback */
|
||||
void (* SlaveTxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Slave Tx Transfer completed callback */
|
||||
void (* SlaveRxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Slave Rx Transfer completed callback */
|
||||
void (* ListenCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Listen Complete callback */
|
||||
void (* ErrorCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Error callback */
|
||||
|
||||
void (* AddrCallback)(struct __SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< SMBUS Slave Address Match callback */
|
||||
|
||||
void (* MspInitCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Msp Init callback */
|
||||
void (* MspDeInitCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Msp DeInit callback */
|
||||
|
||||
#endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */
|
||||
} SMBUS_HandleTypeDef;
|
||||
|
||||
#if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)
|
||||
/**
|
||||
* @brief HAL SMBUS Callback ID enumeration definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_SMBUS_MASTER_TX_COMPLETE_CB_ID = 0x00U, /*!< SMBUS Master Tx Transfer completed callback ID */
|
||||
HAL_SMBUS_MASTER_RX_COMPLETE_CB_ID = 0x01U, /*!< SMBUS Master Rx Transfer completed callback ID */
|
||||
HAL_SMBUS_SLAVE_TX_COMPLETE_CB_ID = 0x02U, /*!< SMBUS Slave Tx Transfer completed callback ID */
|
||||
HAL_SMBUS_SLAVE_RX_COMPLETE_CB_ID = 0x03U, /*!< SMBUS Slave Rx Transfer completed callback ID */
|
||||
HAL_SMBUS_LISTEN_COMPLETE_CB_ID = 0x04U, /*!< SMBUS Listen Complete callback ID */
|
||||
HAL_SMBUS_ERROR_CB_ID = 0x05U, /*!< SMBUS Error callback ID */
|
||||
|
||||
HAL_SMBUS_MSPINIT_CB_ID = 0x06U, /*!< SMBUS Msp Init callback ID */
|
||||
HAL_SMBUS_MSPDEINIT_CB_ID = 0x07U /*!< SMBUS Msp DeInit callback ID */
|
||||
|
||||
} HAL_SMBUS_CallbackIDTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL SMBUS Callback pointer definition
|
||||
*/
|
||||
typedef void (*pSMBUS_CallbackTypeDef)(SMBUS_HandleTypeDef *hsmbus); /*!< pointer to an SMBUS callback function */
|
||||
typedef void (*pSMBUS_AddrCallbackTypeDef)(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< pointer to an SMBUS Address Match callback function */
|
||||
|
||||
#endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -234,7 +262,7 @@ typedef struct
|
|||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SMBUS_nostretch_mode SMBUS nostretch mode
|
||||
/** @defgroup SMBUS_nostretch_mode SMBUS nostretch mode
|
||||
* @{
|
||||
*/
|
||||
#define SMBUS_NOSTRETCH_DISABLE (0x00000000U)
|
||||
|
@ -373,7 +401,15 @@ typedef struct
|
|||
* @param __HANDLE__ specifies the SMBUS Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SMBUS_STATE_RESET)
|
||||
#if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)
|
||||
#define __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__) do{ \
|
||||
(__HANDLE__)->State = HAL_SMBUS_STATE_RESET; \
|
||||
(__HANDLE__)->MspInitCallback = NULL; \
|
||||
(__HANDLE__)->MspDeInitCallback = NULL; \
|
||||
} while(0)
|
||||
#else
|
||||
#define __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SMBUS_STATE_RESET)
|
||||
#endif
|
||||
|
||||
/** @brief Enable the specified SMBUS interrupts.
|
||||
* @param __HANDLE__ specifies the SMBUS Handle.
|
||||
|
@ -419,7 +455,7 @@ typedef struct
|
|||
* @arg @ref SMBUS_IT_RXI RX interrupt enable
|
||||
* @arg @ref SMBUS_IT_TXI TX interrupt enable
|
||||
*
|
||||
* @retval The new state of __IT__ (TRUE or FALSE).
|
||||
* @retval The new state of __IT__ (SET or RESET).
|
||||
*/
|
||||
#define __HAL_SMBUS_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
|
||||
|
||||
|
@ -444,10 +480,10 @@ typedef struct
|
|||
* @arg @ref SMBUS_FLAG_BUSY Bus busy
|
||||
* @arg @ref SMBUS_FLAG_DIR Transfer direction (slave mode)
|
||||
*
|
||||
* @retval The new state of __FLAG__ (TRUE or FALSE).
|
||||
* @retval The new state of __FLAG__ (SET or RESET).
|
||||
*/
|
||||
#define SMBUS_FLAG_MASK (0x0001FFFFU)
|
||||
#define __HAL_SMBUS_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK)))
|
||||
#define __HAL_SMBUS_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK)) ? SET : RESET)
|
||||
|
||||
/** @brief Clear the SMBUS pending flags which are cleared by writing 1 in a specific bit.
|
||||
* @param __HANDLE__ specifies the SMBUS Handle.
|
||||
|
@ -546,13 +582,13 @@ typedef struct
|
|||
((REQUEST) == SMBUS_NO_STARTSTOP))
|
||||
|
||||
|
||||
#define IS_SMBUS_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == SMBUS_FIRST_FRAME) || \
|
||||
#define IS_SMBUS_TRANSFER_OPTIONS_REQUEST(REQUEST) (IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) || \
|
||||
((REQUEST) == SMBUS_FIRST_FRAME) || \
|
||||
((REQUEST) == SMBUS_NEXT_FRAME) || \
|
||||
((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_NO_PEC) || \
|
||||
((REQUEST) == SMBUS_LAST_FRAME_NO_PEC) || \
|
||||
((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC) || \
|
||||
((REQUEST) == SMBUS_LAST_FRAME_WITH_PEC) || \
|
||||
IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST))
|
||||
((REQUEST) == SMBUS_LAST_FRAME_WITH_PEC))
|
||||
|
||||
#define IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == SMBUS_OTHER_FRAME_NO_PEC) || \
|
||||
((REQUEST) == SMBUS_OTHER_AND_LAST_FRAME_NO_PEC) || \
|
||||
|
@ -571,8 +607,8 @@ typedef struct
|
|||
#define SMBUS_GET_PEC_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_PECBYTE)
|
||||
#define SMBUS_GET_ALERT_ENABLED(__HANDLE__) ((__HANDLE__)->Instance->CR1 & I2C_CR1_ALERTEN)
|
||||
|
||||
#define SMBUS_GET_ISR_REG(__HANDLE__) ((__HANDLE__)->Instance->ISR)
|
||||
#define SMBUS_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK)))
|
||||
#define SMBUS_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK)) ? SET : RESET)
|
||||
#define SMBUS_CHECK_IT_SOURCE(__CR1__, __IT__) ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET)
|
||||
|
||||
#define IS_SMBUS_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU)
|
||||
#define IS_SMBUS_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU)
|
||||
|
@ -590,7 +626,7 @@ typedef struct
|
|||
* @{
|
||||
*/
|
||||
|
||||
/* Initialization and de-initialization functions **********************************/
|
||||
/* Initialization and de-initialization functions ****************************/
|
||||
HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus);
|
||||
HAL_StatusTypeDef HAL_SMBUS_DeInit(SMBUS_HandleTypeDef *hsmbus);
|
||||
void HAL_SMBUS_MspInit(SMBUS_HandleTypeDef *hsmbus);
|
||||
|
@ -598,6 +634,14 @@ void HAL_SMBUS_MspDeInit(SMBUS_HandleTypeDef *hsmbus);
|
|||
HAL_StatusTypeDef HAL_SMBUS_ConfigAnalogFilter(SMBUS_HandleTypeDef *hsmbus, uint32_t AnalogFilter);
|
||||
HAL_StatusTypeDef HAL_SMBUS_ConfigDigitalFilter(SMBUS_HandleTypeDef *hsmbus, uint32_t DigitalFilter);
|
||||
|
||||
/* Callbacks Register/UnRegister functions ***********************************/
|
||||
#if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1)
|
||||
HAL_StatusTypeDef HAL_SMBUS_RegisterCallback(SMBUS_HandleTypeDef *hsmbus, HAL_SMBUS_CallbackIDTypeDef CallbackID, pSMBUS_CallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_SMBUS_UnRegisterCallback(SMBUS_HandleTypeDef *hsmbus, HAL_SMBUS_CallbackIDTypeDef CallbackID);
|
||||
|
||||
HAL_StatusTypeDef HAL_SMBUS_RegisterAddrCallback(SMBUS_HandleTypeDef *hsmbus, pSMBUS_AddrCallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_SMBUS_UnRegisterAddrCallback(SMBUS_HandleTypeDef *hsmbus);
|
||||
#endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -694,6 +738,6 @@ uint32_t HAL_SMBUS_GetError(SMBUS_HandleTypeDef *hsmbus);
|
|||
#endif
|
||||
|
||||
|
||||
#endif /* __STM32F3xx_HAL_SMBUS_H */
|
||||
#endif /* STM32F3xx_HAL_SMBUS_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
|
@ -6,36 +6,20 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_HAL_SPI_H
|
||||
#define __STM32F3xx_HAL_SPI_H
|
||||
#ifndef STM32F3xx_HAL_SPI_H
|
||||
#define STM32F3xx_HAL_SPI_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
@ -163,8 +147,46 @@ typedef struct __SPI_HandleTypeDef
|
|||
|
||||
__IO uint32_t ErrorCode; /*!< SPI Error code */
|
||||
|
||||
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
|
||||
void (* TxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Tx Completed callback */
|
||||
void (* RxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Rx Completed callback */
|
||||
void (* TxRxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI TxRx Completed callback */
|
||||
void (* TxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Tx Half Completed callback */
|
||||
void (* RxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Rx Half Completed callback */
|
||||
void (* TxRxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI TxRx Half Completed callback */
|
||||
void (* ErrorCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Error callback */
|
||||
void (* AbortCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Abort callback */
|
||||
void (* MspInitCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Msp Init callback */
|
||||
void (* MspDeInitCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Msp DeInit callback */
|
||||
|
||||
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
|
||||
} SPI_HandleTypeDef;
|
||||
|
||||
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
|
||||
/**
|
||||
* @brief HAL SPI Callback ID enumeration definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_SPI_TX_COMPLETE_CB_ID = 0x00U, /*!< SPI Tx Completed callback ID */
|
||||
HAL_SPI_RX_COMPLETE_CB_ID = 0x01U, /*!< SPI Rx Completed callback ID */
|
||||
HAL_SPI_TX_RX_COMPLETE_CB_ID = 0x02U, /*!< SPI TxRx Completed callback ID */
|
||||
HAL_SPI_TX_HALF_COMPLETE_CB_ID = 0x03U, /*!< SPI Tx Half Completed callback ID */
|
||||
HAL_SPI_RX_HALF_COMPLETE_CB_ID = 0x04U, /*!< SPI Rx Half Completed callback ID */
|
||||
HAL_SPI_TX_RX_HALF_COMPLETE_CB_ID = 0x05U, /*!< SPI TxRx Half Completed callback ID */
|
||||
HAL_SPI_ERROR_CB_ID = 0x06U, /*!< SPI Error callback ID */
|
||||
HAL_SPI_ABORT_CB_ID = 0x07U, /*!< SPI Abort callback ID */
|
||||
HAL_SPI_MSPINIT_CB_ID = 0x08U, /*!< SPI Msp Init callback ID */
|
||||
HAL_SPI_MSPDEINIT_CB_ID = 0x09U /*!< SPI Msp DeInit callback ID */
|
||||
|
||||
} HAL_SPI_CallbackIDTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL SPI Callback pointer definition
|
||||
*/
|
||||
typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to an SPI callback function */
|
||||
|
||||
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -185,6 +207,9 @@ typedef struct __SPI_HandleTypeDef
|
|||
#define HAL_SPI_ERROR_DMA (0x00000010U) /*!< DMA transfer error */
|
||||
#define HAL_SPI_ERROR_FLAG (0x00000020U) /*!< Error on RXNE/TXE/BSY/FTLVL/FRLVL Flag */
|
||||
#define HAL_SPI_ERROR_ABORT (0x00000040U) /*!< Error during SPI Abort procedure */
|
||||
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
|
||||
#define HAL_SPI_ERROR_INVALID_CALLBACK (0x00000080U) /*!< Invalid Callback error */
|
||||
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -326,13 +351,12 @@ typedef struct __SPI_HandleTypeDef
|
|||
* This parameter can be one of the following values:
|
||||
* SPI_RXFIFO_THRESHOLD or SPI_RXFIFO_THRESHOLD_QF :
|
||||
* RXNE event is generated if the FIFO
|
||||
* level is greater or equal to 1/2(16-bits).
|
||||
* level is greater or equal to 1/4(8-bits).
|
||||
* SPI_RXFIFO_THRESHOLD_HF: RXNE event is generated if the FIFO
|
||||
* level is greater or equal to 1/4(8 bits). */
|
||||
* level is greater or equal to 1/2(16 bits). */
|
||||
#define SPI_RXFIFO_THRESHOLD SPI_CR2_FRXTH
|
||||
#define SPI_RXFIFO_THRESHOLD_QF SPI_CR2_FRXTH
|
||||
#define SPI_RXFIFO_THRESHOLD_HF (0x00000000U)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -359,6 +383,8 @@ typedef struct __SPI_HandleTypeDef
|
|||
#define SPI_FLAG_FRE SPI_SR_FRE /* SPI Error flag: TI mode frame format error flag */
|
||||
#define SPI_FLAG_FTLVL SPI_SR_FTLVL /* SPI fifo transmission level */
|
||||
#define SPI_FLAG_FRLVL SPI_SR_FRLVL /* SPI fifo reception level */
|
||||
#define SPI_FLAG_MASK (SPI_SR_RXNE | SPI_SR_TXE | SPI_SR_BSY | SPI_SR_CRCERR\
|
||||
| SPI_SR_MODF | SPI_SR_OVR | SPI_SR_FRE | SPI_SR_FTLVL | SPI_SR_FRLVL)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -400,7 +426,15 @@ typedef struct __SPI_HandleTypeDef
|
|||
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
|
||||
#define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) do{ \
|
||||
(__HANDLE__)->State = HAL_SPI_STATE_RESET; \
|
||||
(__HANDLE__)->MspInitCallback = NULL; \
|
||||
(__HANDLE__)->MspDeInitCallback = NULL; \
|
||||
} while(0)
|
||||
#else
|
||||
#define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET)
|
||||
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
|
||||
|
||||
/** @brief Enable the specified SPI interrupts.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
|
@ -436,7 +470,8 @@ typedef struct __SPI_HandleTypeDef
|
|||
* @arg SPI_IT_ERR: Error interrupt enable
|
||||
* @retval The new state of __IT__ (TRUE or FALSE).
|
||||
*/
|
||||
#define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
|
||||
#define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2\
|
||||
& (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
|
||||
|
||||
/** @brief Check whether the specified SPI flag is set or not.
|
||||
* @param __HANDLE__ specifies the SPI Handle.
|
||||
|
@ -496,9 +531,9 @@ typedef struct __SPI_HandleTypeDef
|
|||
*/
|
||||
#define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) \
|
||||
do{ \
|
||||
__IO uint32_t tmpreg_fre = 0x00U; \
|
||||
tmpreg_fre = (__HANDLE__)->Instance->SR; \
|
||||
UNUSED(tmpreg_fre); \
|
||||
__IO uint32_t tmpreg_fre = 0x00U; \
|
||||
tmpreg_fre = (__HANDLE__)->Instance->SR; \
|
||||
UNUSED(tmpreg_fre); \
|
||||
}while(0U)
|
||||
|
||||
/** @brief Enable the SPI peripheral.
|
||||
|
@ -546,71 +581,175 @@ typedef struct __SPI_HandleTypeDef
|
|||
#define SPI_RESET_CRC(__HANDLE__) do{CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);\
|
||||
SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);}while(0U)
|
||||
|
||||
#define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \
|
||||
((MODE) == SPI_MODE_MASTER))
|
||||
/** @brief Check whether the specified SPI flag is set or not.
|
||||
* @param __SR__ copy of SPI SR regsiter.
|
||||
* @param __FLAG__ specifies the flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_FLAG_RXNE: Receive buffer not empty flag
|
||||
* @arg SPI_FLAG_TXE: Transmit buffer empty flag
|
||||
* @arg SPI_FLAG_CRCERR: CRC error flag
|
||||
* @arg SPI_FLAG_MODF: Mode fault flag
|
||||
* @arg SPI_FLAG_OVR: Overrun flag
|
||||
* @arg SPI_FLAG_BSY: Busy flag
|
||||
* @arg SPI_FLAG_FRE: Frame format error flag
|
||||
* @arg SPI_FLAG_FTLVL: SPI fifo transmission level
|
||||
* @arg SPI_FLAG_FRLVL: SPI fifo reception level
|
||||
* @retval SET or RESET.
|
||||
*/
|
||||
#define SPI_CHECK_FLAG(__SR__, __FLAG__) ((((__SR__) & ((__FLAG__) & SPI_FLAG_MASK)) == ((__FLAG__) & SPI_FLAG_MASK)) ? SET : RESET)
|
||||
|
||||
#define IS_SPI_DIRECTION(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \
|
||||
((MODE) == SPI_DIRECTION_2LINES_RXONLY) || \
|
||||
((MODE) == SPI_DIRECTION_1LINE))
|
||||
/** @brief Check whether the specified SPI Interrupt is set or not.
|
||||
* @param __CR2__ copy of SPI CR2 regsiter.
|
||||
* @param __INTERRUPT__ specifies the SPI interrupt source to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg SPI_IT_TXE: Tx buffer empty interrupt enable
|
||||
* @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
|
||||
* @arg SPI_IT_ERR: Error interrupt enable
|
||||
* @retval SET or RESET.
|
||||
*/
|
||||
#define SPI_CHECK_IT_SOURCE(__CR2__, __INTERRUPT__) ((((__CR2__) & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
|
||||
|
||||
#define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES)
|
||||
/** @brief Checks if SPI Mode parameter is in allowed range.
|
||||
* @param __MODE__ specifies the SPI Mode.
|
||||
* This parameter can be a value of @ref SPI_Mode
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_MODE(__MODE__) (((__MODE__) == SPI_MODE_SLAVE) || \
|
||||
((__MODE__) == SPI_MODE_MASTER))
|
||||
|
||||
#define IS_SPI_DIRECTION_2LINES_OR_1LINE(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \
|
||||
((MODE) == SPI_DIRECTION_1LINE))
|
||||
/** @brief Checks if SPI Direction Mode parameter is in allowed range.
|
||||
* @param __MODE__ specifies the SPI Direction Mode.
|
||||
* This parameter can be a value of @ref SPI_Direction
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_DIRECTION(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \
|
||||
((__MODE__) == SPI_DIRECTION_2LINES_RXONLY) || \
|
||||
((__MODE__) == SPI_DIRECTION_1LINE))
|
||||
|
||||
#define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DATASIZE_16BIT) || \
|
||||
((DATASIZE) == SPI_DATASIZE_15BIT) || \
|
||||
((DATASIZE) == SPI_DATASIZE_14BIT) || \
|
||||
((DATASIZE) == SPI_DATASIZE_13BIT) || \
|
||||
((DATASIZE) == SPI_DATASIZE_12BIT) || \
|
||||
((DATASIZE) == SPI_DATASIZE_11BIT) || \
|
||||
((DATASIZE) == SPI_DATASIZE_10BIT) || \
|
||||
((DATASIZE) == SPI_DATASIZE_9BIT) || \
|
||||
((DATASIZE) == SPI_DATASIZE_8BIT) || \
|
||||
((DATASIZE) == SPI_DATASIZE_7BIT) || \
|
||||
((DATASIZE) == SPI_DATASIZE_6BIT) || \
|
||||
((DATASIZE) == SPI_DATASIZE_5BIT) || \
|
||||
((DATASIZE) == SPI_DATASIZE_4BIT))
|
||||
/** @brief Checks if SPI Direction Mode parameter is 2 lines.
|
||||
* @param __MODE__ specifies the SPI Direction Mode.
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_DIRECTION_2LINES(__MODE__) ((__MODE__) == SPI_DIRECTION_2LINES)
|
||||
|
||||
#define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_POLARITY_LOW) || \
|
||||
((CPOL) == SPI_POLARITY_HIGH))
|
||||
/** @brief Checks if SPI Direction Mode parameter is 1 or 2 lines.
|
||||
* @param __MODE__ specifies the SPI Direction Mode.
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_DIRECTION_2LINES_OR_1LINE(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \
|
||||
((__MODE__) == SPI_DIRECTION_1LINE))
|
||||
|
||||
#define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_PHASE_1EDGE) || \
|
||||
((CPHA) == SPI_PHASE_2EDGE))
|
||||
/** @brief Checks if SPI Data Size parameter is in allowed range.
|
||||
* @param __DATASIZE__ specifies the SPI Data Size.
|
||||
* This parameter can be a value of @ref SPI_Data_Size
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_DATASIZE(__DATASIZE__) (((__DATASIZE__) == SPI_DATASIZE_16BIT) || \
|
||||
((__DATASIZE__) == SPI_DATASIZE_15BIT) || \
|
||||
((__DATASIZE__) == SPI_DATASIZE_14BIT) || \
|
||||
((__DATASIZE__) == SPI_DATASIZE_13BIT) || \
|
||||
((__DATASIZE__) == SPI_DATASIZE_12BIT) || \
|
||||
((__DATASIZE__) == SPI_DATASIZE_11BIT) || \
|
||||
((__DATASIZE__) == SPI_DATASIZE_10BIT) || \
|
||||
((__DATASIZE__) == SPI_DATASIZE_9BIT) || \
|
||||
((__DATASIZE__) == SPI_DATASIZE_8BIT) || \
|
||||
((__DATASIZE__) == SPI_DATASIZE_7BIT) || \
|
||||
((__DATASIZE__) == SPI_DATASIZE_6BIT) || \
|
||||
((__DATASIZE__) == SPI_DATASIZE_5BIT) || \
|
||||
((__DATASIZE__) == SPI_DATASIZE_4BIT))
|
||||
|
||||
#define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_SOFT) || \
|
||||
((NSS) == SPI_NSS_HARD_INPUT) || \
|
||||
((NSS) == SPI_NSS_HARD_OUTPUT))
|
||||
/** @brief Checks if SPI Serial clock steady state parameter is in allowed range.
|
||||
* @param __CPOL__ specifies the SPI serial clock steady state.
|
||||
* This parameter can be a value of @ref SPI_Clock_Polarity
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_CPOL(__CPOL__) (((__CPOL__) == SPI_POLARITY_LOW) || \
|
||||
((__CPOL__) == SPI_POLARITY_HIGH))
|
||||
|
||||
#define IS_SPI_NSSP(NSSP) (((NSSP) == SPI_NSS_PULSE_ENABLE) || \
|
||||
((NSSP) == SPI_NSS_PULSE_DISABLE))
|
||||
/** @brief Checks if SPI Clock Phase parameter is in allowed range.
|
||||
* @param __CPHA__ specifies the SPI Clock Phase.
|
||||
* This parameter can be a value of @ref SPI_Clock_Phase
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_CPHA(__CPHA__) (((__CPHA__) == SPI_PHASE_1EDGE) || \
|
||||
((__CPHA__) == SPI_PHASE_2EDGE))
|
||||
|
||||
#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2) || \
|
||||
((PRESCALER) == SPI_BAUDRATEPRESCALER_4) || \
|
||||
((PRESCALER) == SPI_BAUDRATEPRESCALER_8) || \
|
||||
((PRESCALER) == SPI_BAUDRATEPRESCALER_16) || \
|
||||
((PRESCALER) == SPI_BAUDRATEPRESCALER_32) || \
|
||||
((PRESCALER) == SPI_BAUDRATEPRESCALER_64) || \
|
||||
((PRESCALER) == SPI_BAUDRATEPRESCALER_128) || \
|
||||
((PRESCALER) == SPI_BAUDRATEPRESCALER_256))
|
||||
/** @brief Checks if SPI Slave Select parameter is in allowed range.
|
||||
* @param __NSS__ specifies the SPI Slave Select management parameter.
|
||||
* This parameter can be a value of @ref SPI_Slave_Select_management
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_NSS(__NSS__) (((__NSS__) == SPI_NSS_SOFT) || \
|
||||
((__NSS__) == SPI_NSS_HARD_INPUT) || \
|
||||
((__NSS__) == SPI_NSS_HARD_OUTPUT))
|
||||
|
||||
#define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FIRSTBIT_MSB) || \
|
||||
((BIT) == SPI_FIRSTBIT_LSB))
|
||||
/** @brief Checks if SPI NSS Pulse parameter is in allowed range.
|
||||
* @param __NSSP__ specifies the SPI NSS Pulse Mode parameter.
|
||||
* This parameter can be a value of @ref SPI_NSSP_Mode
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_NSSP(__NSSP__) (((__NSSP__) == SPI_NSS_PULSE_ENABLE) || \
|
||||
((__NSSP__) == SPI_NSS_PULSE_DISABLE))
|
||||
|
||||
#define IS_SPI_TIMODE(MODE) (((MODE) == SPI_TIMODE_DISABLE) || \
|
||||
((MODE) == SPI_TIMODE_ENABLE))
|
||||
/** @brief Checks if SPI Baudrate prescaler parameter is in allowed range.
|
||||
* @param __PRESCALER__ specifies the SPI Baudrate prescaler.
|
||||
* This parameter can be a value of @ref SPI_BaudRate_Prescaler
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_BAUDRATE_PRESCALER(__PRESCALER__) (((__PRESCALER__) == SPI_BAUDRATEPRESCALER_2) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_4) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_8) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_16) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_32) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_64) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_128) || \
|
||||
((__PRESCALER__) == SPI_BAUDRATEPRESCALER_256))
|
||||
|
||||
#define IS_SPI_CRC_CALCULATION(CALCULATION) (((CALCULATION) == SPI_CRCCALCULATION_DISABLE) || \
|
||||
((CALCULATION) == SPI_CRCCALCULATION_ENABLE))
|
||||
/** @brief Checks if SPI MSB LSB transmission parameter is in allowed range.
|
||||
* @param __BIT__ specifies the SPI MSB LSB transmission (whether data transfer starts from MSB or LSB bit).
|
||||
* This parameter can be a value of @ref SPI_MSB_LSB_transmission
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_FIRST_BIT(__BIT__) (((__BIT__) == SPI_FIRSTBIT_MSB) || \
|
||||
((__BIT__) == SPI_FIRSTBIT_LSB))
|
||||
|
||||
#define IS_SPI_CRC_LENGTH(LENGTH) (((LENGTH) == SPI_CRC_LENGTH_DATASIZE) ||\
|
||||
((LENGTH) == SPI_CRC_LENGTH_8BIT) || \
|
||||
((LENGTH) == SPI_CRC_LENGTH_16BIT))
|
||||
/** @brief Checks if SPI TI mode parameter is in allowed range.
|
||||
* @param __MODE__ specifies the SPI TI mode.
|
||||
* This parameter can be a value of @ref SPI_TI_mode
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_TIMODE(__MODE__) (((__MODE__) == SPI_TIMODE_DISABLE) || \
|
||||
((__MODE__) == SPI_TIMODE_ENABLE))
|
||||
|
||||
#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (((POLYNOMIAL) >= 0x1U) && ((POLYNOMIAL) <= 0xFFFFU) && (((POLYNOMIAL)&0x1U) != 0U))
|
||||
/** @brief Checks if SPI CRC calculation enabled state is in allowed range.
|
||||
* @param __CALCULATION__ specifies the SPI CRC calculation enable state.
|
||||
* This parameter can be a value of @ref SPI_CRC_Calculation
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_CRC_CALCULATION(__CALCULATION__) (((__CALCULATION__) == SPI_CRCCALCULATION_DISABLE) || \
|
||||
((__CALCULATION__) == SPI_CRCCALCULATION_ENABLE))
|
||||
|
||||
#define IS_SPI_DMA_HANDLE(HANDLE) ((HANDLE) != NULL)
|
||||
/** @brief Checks if SPI CRC length is in allowed range.
|
||||
* @param __LENGTH__ specifies the SPI CRC length.
|
||||
* This parameter can be a value of @ref SPI_CRC_length
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_CRC_LENGTH(__LENGTH__) (((__LENGTH__) == SPI_CRC_LENGTH_DATASIZE) ||\
|
||||
((__LENGTH__) == SPI_CRC_LENGTH_8BIT) || \
|
||||
((__LENGTH__) == SPI_CRC_LENGTH_16BIT))
|
||||
|
||||
/** @brief Checks if SPI polynomial value to be used for the CRC calculation, is in allowed range.
|
||||
* @param __POLYNOMIAL__ specifies the SPI polynomial value to be used for the CRC calculation.
|
||||
* This parameter must be a number between Min_Data = 0 and Max_Data = 65535
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_CRC_POLYNOMIAL(__POLYNOMIAL__) (((__POLYNOMIAL__) >= 0x1U) && ((__POLYNOMIAL__) <= 0xFFFFU) && (((__POLYNOMIAL__)&0x1U) != 0U))
|
||||
|
||||
/** @brief Checks if DMA handle is valid.
|
||||
* @param __HANDLE__ specifies a DMA Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_SPI_DMA_HANDLE(__HANDLE__) ((__HANDLE__) != NULL)
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
@ -632,6 +771,12 @@ HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi);
|
|||
HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi);
|
||||
void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
|
||||
|
||||
/* Callbacks Register/UnRegister functions ***********************************/
|
||||
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
|
||||
HAL_StatusTypeDef HAL_SPI_RegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID, pSPI_CallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_SPI_UnRegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID);
|
||||
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -698,6 +843,6 @@ uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi);
|
|||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F3xx_HAL_SPI_H */
|
||||
#endif /* STM32F3xx_HAL_SPI_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
|
@ -6,36 +6,20 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_HAL_SPI_EX_H
|
||||
#define __STM32F3xx_HAL_SPI_EX_H
|
||||
#ifndef STM32F3xx_HAL_SPI_EX_H
|
||||
#define STM32F3xx_HAL_SPI_EX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
@ -86,6 +70,6 @@ HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(SPI_HandleTypeDef *hspi);
|
|||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F3xx_HAL_SPI_EX_H */
|
||||
#endif /* STM32F3xx_HAL_SPI_EX_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
|
@ -6,49 +6,33 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_HAL_SRAM_H
|
||||
#define __STM32F3xx_HAL_SRAM_H
|
||||
#ifndef STM32F3xx_HAL_SRAM_H
|
||||
#define STM32F3xx_HAL_SRAM_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if defined FMC_BANK1
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)
|
||||
#include "stm32f3xx_ll_fmc.h"
|
||||
|
||||
/** @addtogroup STM32F3xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup SRAM
|
||||
* @{
|
||||
*/
|
||||
|
@ -67,14 +51,18 @@ typedef enum
|
|||
HAL_SRAM_STATE_READY = 0x01U, /*!< SRAM initialized and ready for use */
|
||||
HAL_SRAM_STATE_BUSY = 0x02U, /*!< SRAM internal process is ongoing */
|
||||
HAL_SRAM_STATE_ERROR = 0x03U, /*!< SRAM error state */
|
||||
HAL_SRAM_STATE_PROTECTED = 0x04 /*!< SRAM peripheral NORSRAM device write protected */
|
||||
HAL_SRAM_STATE_PROTECTED = 0x04U /*!< SRAM peripheral NORSRAM device write protected */
|
||||
|
||||
}HAL_SRAM_StateTypeDef;
|
||||
} HAL_SRAM_StateTypeDef;
|
||||
|
||||
/**
|
||||
* @brief SRAM handle Structure definition
|
||||
*/
|
||||
#if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1)
|
||||
typedef struct __SRAM_HandleTypeDef
|
||||
#else
|
||||
typedef struct
|
||||
#endif /* USE_HAL_SRAM_REGISTER_CALLBACKS */
|
||||
{
|
||||
FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
|
||||
|
||||
|
@ -88,8 +76,32 @@ typedef struct
|
|||
|
||||
DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */
|
||||
|
||||
}SRAM_HandleTypeDef;
|
||||
#if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1)
|
||||
void (* MspInitCallback) ( struct __SRAM_HandleTypeDef * hsram); /*!< SRAM Msp Init callback */
|
||||
void (* MspDeInitCallback) ( struct __SRAM_HandleTypeDef * hsram); /*!< SRAM Msp DeInit callback */
|
||||
void (* DmaXferCpltCallback) ( DMA_HandleTypeDef * hdma); /*!< SRAM DMA Xfer Complete callback */
|
||||
void (* DmaXferErrorCallback) ( DMA_HandleTypeDef * hdma); /*!< SRAM DMA Xfer Error callback */
|
||||
#endif
|
||||
} SRAM_HandleTypeDef;
|
||||
|
||||
#if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1)
|
||||
/**
|
||||
* @brief HAL SRAM Callback ID enumeration definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_SRAM_MSP_INIT_CB_ID = 0x00U, /*!< SRAM MspInit Callback ID */
|
||||
HAL_SRAM_MSP_DEINIT_CB_ID = 0x01U, /*!< SRAM MspDeInit Callback ID */
|
||||
HAL_SRAM_DMA_XFER_CPLT_CB_ID = 0x02U, /*!< SRAM DMA Xfer Complete Callback ID */
|
||||
HAL_SRAM_DMA_XFER_ERR_CB_ID = 0x03U /*!< SRAM DMA Xfer Complete Callback ID */
|
||||
}HAL_SRAM_CallbackIDTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL SRAM Callback pointer definition
|
||||
*/
|
||||
typedef void (*pSRAM_CallbackTypeDef)(SRAM_HandleTypeDef *hsram);
|
||||
typedef void (*pSRAM_DmaCallbackTypeDef)(DMA_HandleTypeDef *hdma);
|
||||
#endif
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -105,7 +117,15 @@ typedef struct
|
|||
* @param __HANDLE__ SRAM handle
|
||||
* @retval None
|
||||
*/
|
||||
#if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1)
|
||||
#define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) do { \
|
||||
(__HANDLE__)->State = HAL_SRAM_STATE_RESET; \
|
||||
(__HANDLE__)->MspInitCallback = NULL; \
|
||||
(__HANDLE__)->MspDeInitCallback = NULL; \
|
||||
} while(0)
|
||||
#else
|
||||
#define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
@ -126,9 +146,6 @@ HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram);
|
|||
void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram);
|
||||
void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram);
|
||||
|
||||
void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
|
||||
void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -147,6 +164,16 @@ HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddre
|
|||
HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
|
||||
HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
|
||||
|
||||
void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
|
||||
void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
|
||||
|
||||
#if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1)
|
||||
/* SRAM callback registering/unregistering */
|
||||
HAL_StatusTypeDef HAL_SRAM_RegisterCallback(SRAM_HandleTypeDef *hsram, HAL_SRAM_CallbackIDTypeDef CallbackId, pSRAM_CallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_SRAM_UnRegisterCallback(SRAM_HandleTypeDef *hsram, HAL_SRAM_CallbackIDTypeDef CallbackId);
|
||||
HAL_StatusTypeDef HAL_SRAM_RegisterDmaCallback(SRAM_HandleTypeDef *hsram, HAL_SRAM_CallbackIDTypeDef CallbackId, pSRAM_DmaCallbackTypeDef pCallback);
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -167,7 +194,7 @@ HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram);
|
|||
* @{
|
||||
*/
|
||||
|
||||
/* SRAM Peripheral State functions ********************************************/
|
||||
/* SRAM State functions ******************************************************/
|
||||
HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram);
|
||||
|
||||
/**
|
||||
|
@ -186,12 +213,12 @@ HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram);
|
|||
* @}
|
||||
*/
|
||||
|
||||
#endif /* STM32F302xE || STM32F303xE || STM32F398xx */
|
||||
#endif /* FMC_BANK1 */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F3xx_HAL_SRAM_H */
|
||||
#endif /* STM32F3xx_HAL_SRAM_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
@ -6,44 +6,29 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_HAL_TSC_H
|
||||
#define __STM32F3xx_HAL_TSC_H
|
||||
#ifndef STM32F3xx_HAL_TSC_H
|
||||
#define STM32F3xx_HAL_TSC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f3xx_hal_def.h"
|
||||
|
||||
|
||||
/** @addtogroup STM32F3xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
@ -62,10 +47,10 @@
|
|||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_TSC_STATE_RESET = 0x00U, /*!< TSC registers have their reset value */
|
||||
HAL_TSC_STATE_READY = 0x01U, /*!< TSC registers are initialized or acquisition is completed with success */
|
||||
HAL_TSC_STATE_BUSY = 0x02U, /*!< TSC initialization or acquisition is on-going */
|
||||
HAL_TSC_STATE_ERROR = 0x03U /*!< Acquisition is completed with max count error */
|
||||
HAL_TSC_STATE_RESET = 0x00UL, /*!< TSC registers have their reset value */
|
||||
HAL_TSC_STATE_READY = 0x01UL, /*!< TSC registers are initialized or acquisition is completed with success */
|
||||
HAL_TSC_STATE_BUSY = 0x02UL, /*!< TSC initialization or acquisition is on-going */
|
||||
HAL_TSC_STATE_ERROR = 0x03UL /*!< Acquisition is completed with max count error */
|
||||
} HAL_TSC_StateTypeDef;
|
||||
|
||||
/**
|
||||
|
@ -73,8 +58,8 @@ typedef enum
|
|||
*/
|
||||
typedef enum
|
||||
{
|
||||
TSC_GROUP_ONGOING = 0x00U, /*!< Acquisition on group is on-going or not started */
|
||||
TSC_GROUP_COMPLETED = 0x01U /*!< Acquisition on group is completed with success (no max count error) */
|
||||
TSC_GROUP_ONGOING = 0x00UL, /*!< Acquisition on group is on-going or not started */
|
||||
TSC_GROUP_COMPLETED = 0x01UL /*!< Acquisition on group is completed with success (no max count error) */
|
||||
} TSC_GroupStatusTypeDef;
|
||||
|
||||
/**
|
||||
|
@ -86,10 +71,10 @@ typedef struct
|
|||
This parameter can be a value of @ref TSC_CTPulseHL_Config */
|
||||
uint32_t CTPulseLowLength; /*!< Charge-transfer low pulse length
|
||||
This parameter can be a value of @ref TSC_CTPulseLL_Config */
|
||||
uint32_t SpreadSpectrum; /*!< Spread spectrum activation
|
||||
This parameter can be a value of @ref TSC_CTPulseLL_Config */
|
||||
FunctionalState SpreadSpectrum; /*!< Spread spectrum activation
|
||||
This parameter can be set to ENABLE or DISABLE. */
|
||||
uint32_t SpreadSpectrumDeviation; /*!< Spread spectrum deviation
|
||||
This parameter must be a number between Min_Data = 0 and Max_Data = 127U */
|
||||
This parameter must be a number between Min_Data = 0 and Max_Data = 127 */
|
||||
uint32_t SpreadSpectrumPrescaler; /*!< Spread spectrum prescaler
|
||||
This parameter can be a value of @ref TSC_SpreadSpec_Prescaler */
|
||||
uint32_t PulseGeneratorPrescaler; /*!< Pulse generator prescaler
|
||||
|
@ -102,7 +87,7 @@ typedef struct
|
|||
This parameter can be a value of @ref TSC_Synchro_Pin_Polarity */
|
||||
uint32_t AcquisitionMode; /*!< Acquisition mode
|
||||
This parameter can be a value of @ref TSC_Acquisition_Mode */
|
||||
uint32_t MaxCountInterrupt; /*!< Max count interrupt activation
|
||||
FunctionalState MaxCountInterrupt;/*!< Max count interrupt activation
|
||||
This parameter can be set to ENABLE or DISABLE. */
|
||||
uint32_t ChannelIOs; /*!< Channel IOs mask */
|
||||
uint32_t ShieldIOs; /*!< Shield IOs mask */
|
||||
|
@ -122,14 +107,62 @@ typedef struct
|
|||
/**
|
||||
* @brief TSC handle Structure definition
|
||||
*/
|
||||
#if (USE_HAL_TSC_REGISTER_CALLBACKS == 1)
|
||||
typedef struct __TSC_HandleTypeDef
|
||||
#else
|
||||
typedef struct
|
||||
#endif /* USE_HAL_TSC_REGISTER_CALLBACKS */
|
||||
{
|
||||
TSC_TypeDef *Instance; /*!< Register base address */
|
||||
TSC_InitTypeDef Init; /*!< Initialization parameters */
|
||||
__IO HAL_TSC_StateTypeDef State; /*!< Peripheral state */
|
||||
HAL_LockTypeDef Lock; /*!< Lock feature */
|
||||
TSC_TypeDef *Instance; /*!< Register base address */
|
||||
TSC_InitTypeDef Init; /*!< Initialization parameters */
|
||||
__IO HAL_TSC_StateTypeDef State; /*!< Peripheral state */
|
||||
HAL_LockTypeDef Lock; /*!< Lock feature */
|
||||
__IO uint32_t ErrorCode; /*!< TSC Error code */
|
||||
|
||||
#if (USE_HAL_TSC_REGISTER_CALLBACKS == 1)
|
||||
void (* ConvCpltCallback)(struct __TSC_HandleTypeDef *htsc); /*!< TSC Conversion complete callback */
|
||||
void (* ErrorCallback)(struct __TSC_HandleTypeDef *htsc); /*!< TSC Error callback */
|
||||
|
||||
void (* MspInitCallback)(struct __TSC_HandleTypeDef *htsc); /*!< TSC Msp Init callback */
|
||||
void (* MspDeInitCallback)(struct __TSC_HandleTypeDef *htsc); /*!< TSC Msp DeInit callback */
|
||||
|
||||
#endif /* USE_HAL_TSC_REGISTER_CALLBACKS */
|
||||
} TSC_HandleTypeDef;
|
||||
|
||||
enum
|
||||
{
|
||||
TSC_GROUP1_IDX = 0x00UL,
|
||||
TSC_GROUP2_IDX,
|
||||
TSC_GROUP3_IDX,
|
||||
TSC_GROUP4_IDX,
|
||||
TSC_GROUP5_IDX,
|
||||
TSC_GROUP6_IDX,
|
||||
TSC_GROUP7_IDX,
|
||||
TSC_GROUP8_IDX,
|
||||
TSC_NB_OF_GROUPS
|
||||
};
|
||||
|
||||
#if (USE_HAL_TSC_REGISTER_CALLBACKS == 1)
|
||||
/**
|
||||
* @brief HAL TSC Callback ID enumeration definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_TSC_CONV_COMPLETE_CB_ID = 0x00UL, /*!< TSC Conversion completed callback ID */
|
||||
HAL_TSC_ERROR_CB_ID = 0x01UL, /*!< TSC Error callback ID */
|
||||
|
||||
HAL_TSC_MSPINIT_CB_ID = 0x02UL, /*!< TSC Msp Init callback ID */
|
||||
HAL_TSC_MSPDEINIT_CB_ID = 0x03UL /*!< TSC Msp DeInit callback ID */
|
||||
|
||||
} HAL_TSC_CallbackIDTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL TSC Callback pointer definition
|
||||
*/
|
||||
typedef void (*pTSC_CallbackTypeDef)(TSC_HandleTypeDef *htsc); /*!< pointer to an TSC callback function */
|
||||
|
||||
#endif /* USE_HAL_TSC_REGISTER_CALLBACKS */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -139,25 +172,37 @@ typedef struct
|
|||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup TSC_Error_Code_definition TSC Error Code definition
|
||||
* @brief TSC Error Code definition
|
||||
* @{
|
||||
*/
|
||||
#define HAL_TSC_ERROR_NONE 0x00000000UL /*!< No error */
|
||||
#if (USE_HAL_TSC_REGISTER_CALLBACKS == 1)
|
||||
#define HAL_TSC_ERROR_INVALID_CALLBACK 0x00000001UL /*!< Invalid Callback error */
|
||||
#endif /* USE_HAL_TSC_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TSC_CTPulseHL_Config CTPulse High Length
|
||||
* @{
|
||||
*/
|
||||
#define TSC_CTPH_1CYCLE ((uint32_t)( 0U << 28U))
|
||||
#define TSC_CTPH_2CYCLES ((uint32_t)( 1U << 28U))
|
||||
#define TSC_CTPH_3CYCLES ((uint32_t)( 2U << 28U))
|
||||
#define TSC_CTPH_4CYCLES ((uint32_t)( 3U << 28U))
|
||||
#define TSC_CTPH_5CYCLES ((uint32_t)( 4U << 28U))
|
||||
#define TSC_CTPH_6CYCLES ((uint32_t)( 5U << 28U))
|
||||
#define TSC_CTPH_7CYCLES ((uint32_t)( 6U << 28U))
|
||||
#define TSC_CTPH_8CYCLES ((uint32_t)( 7U << 28U))
|
||||
#define TSC_CTPH_9CYCLES ((uint32_t)( 8U << 28U))
|
||||
#define TSC_CTPH_10CYCLES ((uint32_t)( 9U << 28U))
|
||||
#define TSC_CTPH_11CYCLES ((uint32_t)(10U << 28U))
|
||||
#define TSC_CTPH_12CYCLES ((uint32_t)(11U << 28U))
|
||||
#define TSC_CTPH_13CYCLES ((uint32_t)(12U << 28U))
|
||||
#define TSC_CTPH_14CYCLES ((uint32_t)(13U << 28U))
|
||||
#define TSC_CTPH_15CYCLES ((uint32_t)(14U << 28U))
|
||||
#define TSC_CTPH_16CYCLES ((uint32_t)(15U << 28U))
|
||||
#define TSC_CTPH_1CYCLE 0x00000000UL /*!< Charge transfer pulse high during 1 cycle (PGCLK) */
|
||||
#define TSC_CTPH_2CYCLES TSC_CR_CTPH_0 /*!< Charge transfer pulse high during 2 cycles (PGCLK) */
|
||||
#define TSC_CTPH_3CYCLES TSC_CR_CTPH_1 /*!< Charge transfer pulse high during 3 cycles (PGCLK) */
|
||||
#define TSC_CTPH_4CYCLES (TSC_CR_CTPH_1 | TSC_CR_CTPH_0) /*!< Charge transfer pulse high during 4 cycles (PGCLK) */
|
||||
#define TSC_CTPH_5CYCLES TSC_CR_CTPH_2 /*!< Charge transfer pulse high during 5 cycles (PGCLK) */
|
||||
#define TSC_CTPH_6CYCLES (TSC_CR_CTPH_2 | TSC_CR_CTPH_0) /*!< Charge transfer pulse high during 6 cycles (PGCLK) */
|
||||
#define TSC_CTPH_7CYCLES (TSC_CR_CTPH_2 | TSC_CR_CTPH_1) /*!< Charge transfer pulse high during 7 cycles (PGCLK) */
|
||||
#define TSC_CTPH_8CYCLES (TSC_CR_CTPH_2 | TSC_CR_CTPH_1 | TSC_CR_CTPH_0) /*!< Charge transfer pulse high during 8 cycles (PGCLK) */
|
||||
#define TSC_CTPH_9CYCLES TSC_CR_CTPH_3 /*!< Charge transfer pulse high during 9 cycles (PGCLK) */
|
||||
#define TSC_CTPH_10CYCLES (TSC_CR_CTPH_3 | TSC_CR_CTPH_0) /*!< Charge transfer pulse high during 10 cycles (PGCLK) */
|
||||
#define TSC_CTPH_11CYCLES (TSC_CR_CTPH_3 | TSC_CR_CTPH_1) /*!< Charge transfer pulse high during 11 cycles (PGCLK) */
|
||||
#define TSC_CTPH_12CYCLES (TSC_CR_CTPH_3 | TSC_CR_CTPH_1 | TSC_CR_CTPH_0) /*!< Charge transfer pulse high during 12 cycles (PGCLK) */
|
||||
#define TSC_CTPH_13CYCLES (TSC_CR_CTPH_3 | TSC_CR_CTPH_2) /*!< Charge transfer pulse high during 13 cycles (PGCLK) */
|
||||
#define TSC_CTPH_14CYCLES (TSC_CR_CTPH_3 | TSC_CR_CTPH_2 | TSC_CR_CTPH_0) /*!< Charge transfer pulse high during 14 cycles (PGCLK) */
|
||||
#define TSC_CTPH_15CYCLES (TSC_CR_CTPH_3 | TSC_CR_CTPH_2 | TSC_CR_CTPH_1) /*!< Charge transfer pulse high during 15 cycles (PGCLK) */
|
||||
#define TSC_CTPH_16CYCLES (TSC_CR_CTPH_3 | TSC_CR_CTPH_2 | TSC_CR_CTPH_1 | TSC_CR_CTPH_0) /*!< Charge transfer pulse high during 16 cycles (PGCLK) */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -165,22 +210,22 @@ typedef struct
|
|||
/** @defgroup TSC_CTPulseLL_Config CTPulse Low Length
|
||||
* @{
|
||||
*/
|
||||
#define TSC_CTPL_1CYCLE ((uint32_t)( 0U << 24U))
|
||||
#define TSC_CTPL_2CYCLES ((uint32_t)( 1U << 24U))
|
||||
#define TSC_CTPL_3CYCLES ((uint32_t)( 2U << 24U))
|
||||
#define TSC_CTPL_4CYCLES ((uint32_t)( 3U << 24U))
|
||||
#define TSC_CTPL_5CYCLES ((uint32_t)( 4U << 24U))
|
||||
#define TSC_CTPL_6CYCLES ((uint32_t)( 5U << 24U))
|
||||
#define TSC_CTPL_7CYCLES ((uint32_t)( 6U << 24U))
|
||||
#define TSC_CTPL_8CYCLES ((uint32_t)( 7U << 24U))
|
||||
#define TSC_CTPL_9CYCLES ((uint32_t)( 8U << 24U))
|
||||
#define TSC_CTPL_10CYCLES ((uint32_t)( 9U << 24U))
|
||||
#define TSC_CTPL_11CYCLES ((uint32_t)(10U << 24U))
|
||||
#define TSC_CTPL_12CYCLES ((uint32_t)(11U << 24U))
|
||||
#define TSC_CTPL_13CYCLES ((uint32_t)(12U << 24U))
|
||||
#define TSC_CTPL_14CYCLES ((uint32_t)(13U << 24U))
|
||||
#define TSC_CTPL_15CYCLES ((uint32_t)(14U << 24U))
|
||||
#define TSC_CTPL_16CYCLES ((uint32_t)(15U << 24U))
|
||||
#define TSC_CTPL_1CYCLE 0x00000000UL /*!< Charge transfer pulse low during 1 cycle (PGCLK) */
|
||||
#define TSC_CTPL_2CYCLES TSC_CR_CTPL_0 /*!< Charge transfer pulse low during 2 cycles (PGCLK) */
|
||||
#define TSC_CTPL_3CYCLES TSC_CR_CTPL_1 /*!< Charge transfer pulse low during 3 cycles (PGCLK) */
|
||||
#define TSC_CTPL_4CYCLES (TSC_CR_CTPL_1 | TSC_CR_CTPL_0) /*!< Charge transfer pulse low during 4 cycles (PGCLK) */
|
||||
#define TSC_CTPL_5CYCLES TSC_CR_CTPL_2 /*!< Charge transfer pulse low during 5 cycles (PGCLK) */
|
||||
#define TSC_CTPL_6CYCLES (TSC_CR_CTPL_2 | TSC_CR_CTPL_0) /*!< Charge transfer pulse low during 6 cycles (PGCLK) */
|
||||
#define TSC_CTPL_7CYCLES (TSC_CR_CTPL_2 | TSC_CR_CTPL_1) /*!< Charge transfer pulse low during 7 cycles (PGCLK) */
|
||||
#define TSC_CTPL_8CYCLES (TSC_CR_CTPL_2 | TSC_CR_CTPL_1 | TSC_CR_CTPL_0) /*!< Charge transfer pulse low during 8 cycles (PGCLK) */
|
||||
#define TSC_CTPL_9CYCLES TSC_CR_CTPL_3 /*!< Charge transfer pulse low during 9 cycles (PGCLK) */
|
||||
#define TSC_CTPL_10CYCLES (TSC_CR_CTPL_3 | TSC_CR_CTPL_0) /*!< Charge transfer pulse low during 10 cycles (PGCLK) */
|
||||
#define TSC_CTPL_11CYCLES (TSC_CR_CTPL_3 | TSC_CR_CTPL_1) /*!< Charge transfer pulse low during 11 cycles (PGCLK) */
|
||||
#define TSC_CTPL_12CYCLES (TSC_CR_CTPL_3 | TSC_CR_CTPL_1 | TSC_CR_CTPL_0) /*!< Charge transfer pulse low during 12 cycles (PGCLK) */
|
||||
#define TSC_CTPL_13CYCLES (TSC_CR_CTPL_3 | TSC_CR_CTPL_2) /*!< Charge transfer pulse low during 13 cycles (PGCLK) */
|
||||
#define TSC_CTPL_14CYCLES (TSC_CR_CTPL_3 | TSC_CR_CTPL_2 | TSC_CR_CTPL_0) /*!< Charge transfer pulse low during 14 cycles (PGCLK) */
|
||||
#define TSC_CTPL_15CYCLES (TSC_CR_CTPL_3 | TSC_CR_CTPL_2 | TSC_CR_CTPL_1) /*!< Charge transfer pulse low during 15 cycles (PGCLK) */
|
||||
#define TSC_CTPL_16CYCLES (TSC_CR_CTPL_3 | TSC_CR_CTPL_2 | TSC_CR_CTPL_1 | TSC_CR_CTPL_0) /*!< Charge transfer pulse low during 16 cycles (PGCLK) */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -188,8 +233,8 @@ typedef struct
|
|||
/** @defgroup TSC_SpreadSpec_Prescaler Spread Spectrum Prescaler
|
||||
* @{
|
||||
*/
|
||||
#define TSC_SS_PRESC_DIV1 (0U)
|
||||
#define TSC_SS_PRESC_DIV2 (TSC_CR_SSPSC)
|
||||
#define TSC_SS_PRESC_DIV1 0x00000000UL /*!< Spread Spectrum Prescaler Div1 */
|
||||
#define TSC_SS_PRESC_DIV2 TSC_CR_SSPSC /*!< Spread Spectrum Prescaler Div2 */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -197,14 +242,14 @@ typedef struct
|
|||
/** @defgroup TSC_PulseGenerator_Prescaler Pulse Generator Prescaler
|
||||
* @{
|
||||
*/
|
||||
#define TSC_PG_PRESC_DIV1 ((uint32_t)(0U << 12U))
|
||||
#define TSC_PG_PRESC_DIV2 ((uint32_t)(1U << 12U))
|
||||
#define TSC_PG_PRESC_DIV4 ((uint32_t)(2U << 12U))
|
||||
#define TSC_PG_PRESC_DIV8 ((uint32_t)(3U << 12U))
|
||||
#define TSC_PG_PRESC_DIV16 ((uint32_t)(4U << 12U))
|
||||
#define TSC_PG_PRESC_DIV32 ((uint32_t)(5U << 12U))
|
||||
#define TSC_PG_PRESC_DIV64 ((uint32_t)(6U << 12U))
|
||||
#define TSC_PG_PRESC_DIV128 ((uint32_t)(7U << 12U))
|
||||
#define TSC_PG_PRESC_DIV1 0x00000000UL /*!< Pulse Generator HCLK Div1 */
|
||||
#define TSC_PG_PRESC_DIV2 TSC_CR_PGPSC_0 /*!< Pulse Generator HCLK Div2 */
|
||||
#define TSC_PG_PRESC_DIV4 TSC_CR_PGPSC_1 /*!< Pulse Generator HCLK Div4 */
|
||||
#define TSC_PG_PRESC_DIV8 (TSC_CR_PGPSC_1 | TSC_CR_PGPSC_0) /*!< Pulse Generator HCLK Div8 */
|
||||
#define TSC_PG_PRESC_DIV16 TSC_CR_PGPSC_2 /*!< Pulse Generator HCLK Div16 */
|
||||
#define TSC_PG_PRESC_DIV32 (TSC_CR_PGPSC_2 | TSC_CR_PGPSC_0) /*!< Pulse Generator HCLK Div32 */
|
||||
#define TSC_PG_PRESC_DIV64 (TSC_CR_PGPSC_2 | TSC_CR_PGPSC_1) /*!< Pulse Generator HCLK Div64 */
|
||||
#define TSC_PG_PRESC_DIV128 (TSC_CR_PGPSC_2 | TSC_CR_PGPSC_1 | TSC_CR_PGPSC_0) /*!< Pulse Generator HCLK Div128 */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -212,13 +257,13 @@ typedef struct
|
|||
/** @defgroup TSC_MaxCount_Value Max Count Value
|
||||
* @{
|
||||
*/
|
||||
#define TSC_MCV_255 ((uint32_t)(0U << 5U))
|
||||
#define TSC_MCV_511 ((uint32_t)(1U << 5U))
|
||||
#define TSC_MCV_1023 ((uint32_t)(2U << 5U))
|
||||
#define TSC_MCV_2047 ((uint32_t)(3U << 5U))
|
||||
#define TSC_MCV_4095 ((uint32_t)(4U << 5U))
|
||||
#define TSC_MCV_8191 ((uint32_t)(5U << 5U))
|
||||
#define TSC_MCV_16383 ((uint32_t)(6U << 5U))
|
||||
#define TSC_MCV_255 0x00000000UL /*!< 255 maximum number of charge transfer pulses */
|
||||
#define TSC_MCV_511 TSC_CR_MCV_0 /*!< 511 maximum number of charge transfer pulses */
|
||||
#define TSC_MCV_1023 TSC_CR_MCV_1 /*!< 1023 maximum number of charge transfer pulses */
|
||||
#define TSC_MCV_2047 (TSC_CR_MCV_1 | TSC_CR_MCV_0) /*!< 2047 maximum number of charge transfer pulses */
|
||||
#define TSC_MCV_4095 TSC_CR_MCV_2 /*!< 4095 maximum number of charge transfer pulses */
|
||||
#define TSC_MCV_8191 (TSC_CR_MCV_2 | TSC_CR_MCV_0) /*!< 8191 maximum number of charge transfer pulses */
|
||||
#define TSC_MCV_16383 (TSC_CR_MCV_2 | TSC_CR_MCV_1) /*!< 16383 maximum number of charge transfer pulses */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -226,8 +271,8 @@ typedef struct
|
|||
/** @defgroup TSC_IO_Default_Mode IO Default Mode
|
||||
* @{
|
||||
*/
|
||||
#define TSC_IODEF_OUT_PP_LOW (0U)
|
||||
#define TSC_IODEF_IN_FLOAT (TSC_CR_IODEF)
|
||||
#define TSC_IODEF_OUT_PP_LOW 0x00000000UL /*!< I/Os are forced to output push-pull low */
|
||||
#define TSC_IODEF_IN_FLOAT TSC_CR_IODEF /*!< I/Os are in input floating */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -235,8 +280,8 @@ typedef struct
|
|||
/** @defgroup TSC_Synchro_Pin_Polarity Synchro Pin Polarity
|
||||
* @{
|
||||
*/
|
||||
#define TSC_SYNC_POLARITY_FALLING (0U)
|
||||
#define TSC_SYNC_POLARITY_RISING (TSC_CR_SYNCPOL)
|
||||
#define TSC_SYNC_POLARITY_FALLING 0x00000000UL /*!< Falling edge only */
|
||||
#define TSC_SYNC_POLARITY_RISING TSC_CR_SYNCPOL /*!< Rising edge and high level */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -244,19 +289,8 @@ typedef struct
|
|||
/** @defgroup TSC_Acquisition_Mode Acquisition Mode
|
||||
* @{
|
||||
*/
|
||||
#define TSC_ACQ_MODE_NORMAL (0U)
|
||||
#define TSC_ACQ_MODE_SYNCHRO (TSC_CR_AM)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TSC_IO_Mode IO Mode
|
||||
* @{
|
||||
*/
|
||||
#define TSC_IOMODE_UNUSED (0U)
|
||||
#define TSC_IOMODE_CHANNEL (1U)
|
||||
#define TSC_IOMODE_SHIELD (2U)
|
||||
#define TSC_IOMODE_SAMPLING (3U)
|
||||
#define TSC_ACQ_MODE_NORMAL 0x00000000UL /*!< Normal acquisition mode (acquisition starts as soon as START bit is set) */
|
||||
#define TSC_ACQ_MODE_SYNCHRO TSC_CR_AM /*!< Synchronized acquisition mode (acquisition starts if START bit is set and when the selected signal is detected on the SYNC input pin) */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -264,8 +298,8 @@ typedef struct
|
|||
/** @defgroup TSC_interrupts_definition Interrupts definition
|
||||
* @{
|
||||
*/
|
||||
#define TSC_IT_EOA ((uint32_t)TSC_IER_EOAIE)
|
||||
#define TSC_IT_MCE ((uint32_t)TSC_IER_MCEIE)
|
||||
#define TSC_IT_EOA TSC_IER_EOAIE /*!< End of acquisition interrupt enable */
|
||||
#define TSC_IT_MCE TSC_IER_MCEIE /*!< Max count error interrupt enable */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -273,8 +307,8 @@ typedef struct
|
|||
/** @defgroup TSC_flags_definition Flags definition
|
||||
* @{
|
||||
*/
|
||||
#define TSC_FLAG_EOA ((uint32_t)TSC_ISR_EOAF)
|
||||
#define TSC_FLAG_MCE ((uint32_t)TSC_ISR_MCEF)
|
||||
#define TSC_FLAG_EOA TSC_ISR_EOAF /*!< End of acquisition flag */
|
||||
#define TSC_FLAG_MCE TSC_ISR_MCEF /*!< Max count error flag */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -282,76 +316,54 @@ typedef struct
|
|||
/** @defgroup TSC_Group_definition Group definition
|
||||
* @{
|
||||
*/
|
||||
#define TSC_NB_OF_GROUPS (8U)
|
||||
#define TSC_GROUP1 (0x1UL << TSC_GROUP1_IDX)
|
||||
#define TSC_GROUP2 (0x1UL << TSC_GROUP2_IDX)
|
||||
#define TSC_GROUP3 (0x1UL << TSC_GROUP3_IDX)
|
||||
#define TSC_GROUP4 (0x1UL << TSC_GROUP4_IDX)
|
||||
#define TSC_GROUP5 (0x1UL << TSC_GROUP5_IDX)
|
||||
#define TSC_GROUP6 (0x1UL << TSC_GROUP6_IDX)
|
||||
#define TSC_GROUP7 (0x1UL << TSC_GROUP7_IDX)
|
||||
#define TSC_GROUP8 (0x1UL << TSC_GROUP8_IDX)
|
||||
|
||||
#define TSC_GROUP1 (0x00000001U)
|
||||
#define TSC_GROUP2 (0x00000002U)
|
||||
#define TSC_GROUP3 (0x00000004U)
|
||||
#define TSC_GROUP4 (0x00000008U)
|
||||
#define TSC_GROUP5 (0x00000010U)
|
||||
#define TSC_GROUP6 (0x00000020U)
|
||||
#define TSC_GROUP7 (0x00000040U)
|
||||
#define TSC_GROUP8 (0x00000080U)
|
||||
#define TSC_ALL_GROUPS (0x000000FFU)
|
||||
#define TSC_GROUP1_IO1 TSC_IOCCR_G1_IO1 /*!< TSC Group1 IO1 */
|
||||
#define TSC_GROUP1_IO2 TSC_IOCCR_G1_IO2 /*!< TSC Group1 IO2 */
|
||||
#define TSC_GROUP1_IO3 TSC_IOCCR_G1_IO3 /*!< TSC Group1 IO3 */
|
||||
#define TSC_GROUP1_IO4 TSC_IOCCR_G1_IO4 /*!< TSC Group1 IO4 */
|
||||
|
||||
#define TSC_GROUP1_IDX (0U)
|
||||
#define TSC_GROUP2_IDX (1U)
|
||||
#define TSC_GROUP3_IDX (2U)
|
||||
#define TSC_GROUP4_IDX (3U)
|
||||
#define TSC_GROUP5_IDX (4U)
|
||||
#define TSC_GROUP6_IDX (5U)
|
||||
#define TSC_GROUP7_IDX (6U)
|
||||
#define TSC_GROUP8_IDX (7U)
|
||||
#define TSC_GROUP2_IO1 TSC_IOCCR_G2_IO1 /*!< TSC Group2 IO1 */
|
||||
#define TSC_GROUP2_IO2 TSC_IOCCR_G2_IO2 /*!< TSC Group2 IO2 */
|
||||
#define TSC_GROUP2_IO3 TSC_IOCCR_G2_IO3 /*!< TSC Group2 IO3 */
|
||||
#define TSC_GROUP2_IO4 TSC_IOCCR_G2_IO4 /*!< TSC Group2 IO4 */
|
||||
|
||||
#define TSC_GROUP1_IO1 (0x00000001U)
|
||||
#define TSC_GROUP1_IO2 (0x00000002U)
|
||||
#define TSC_GROUP1_IO3 (0x00000004U)
|
||||
#define TSC_GROUP1_IO4 (0x00000008U)
|
||||
#define TSC_GROUP1_ALL_IOS (0x0000000FU)
|
||||
#define TSC_GROUP3_IO1 TSC_IOCCR_G3_IO1 /*!< TSC Group3 IO1 */
|
||||
#define TSC_GROUP3_IO2 TSC_IOCCR_G3_IO2 /*!< TSC Group3 IO2 */
|
||||
#define TSC_GROUP3_IO3 TSC_IOCCR_G3_IO3 /*!< TSC Group3 IO3 */
|
||||
#define TSC_GROUP3_IO4 TSC_IOCCR_G3_IO4 /*!< TSC Group3 IO4 */
|
||||
|
||||
#define TSC_GROUP2_IO1 (0x00000010U)
|
||||
#define TSC_GROUP2_IO2 (0x00000020U)
|
||||
#define TSC_GROUP2_IO3 (0x00000040U)
|
||||
#define TSC_GROUP2_IO4 (0x00000080U)
|
||||
#define TSC_GROUP2_ALL_IOS (0x000000F0U)
|
||||
#define TSC_GROUP4_IO1 TSC_IOCCR_G4_IO1 /*!< TSC Group4 IO1 */
|
||||
#define TSC_GROUP4_IO2 TSC_IOCCR_G4_IO2 /*!< TSC Group4 IO2 */
|
||||
#define TSC_GROUP4_IO3 TSC_IOCCR_G4_IO3 /*!< TSC Group4 IO3 */
|
||||
#define TSC_GROUP4_IO4 TSC_IOCCR_G4_IO4 /*!< TSC Group4 IO4 */
|
||||
|
||||
#define TSC_GROUP3_IO1 (0x00000100U)
|
||||
#define TSC_GROUP3_IO2 (0x00000200U)
|
||||
#define TSC_GROUP3_IO3 (0x00000400U)
|
||||
#define TSC_GROUP3_IO4 (0x00000800U)
|
||||
#define TSC_GROUP3_ALL_IOS (0x00000F00U)
|
||||
#define TSC_GROUP5_IO1 TSC_IOCCR_G5_IO1 /*!< TSC Group5 IO1 */
|
||||
#define TSC_GROUP5_IO2 TSC_IOCCR_G5_IO2 /*!< TSC Group5 IO2 */
|
||||
#define TSC_GROUP5_IO3 TSC_IOCCR_G5_IO3 /*!< TSC Group5 IO3 */
|
||||
#define TSC_GROUP5_IO4 TSC_IOCCR_G5_IO4 /*!< TSC Group5 IO4 */
|
||||
|
||||
#define TSC_GROUP4_IO1 (0x00001000U)
|
||||
#define TSC_GROUP4_IO2 (0x00002000U)
|
||||
#define TSC_GROUP4_IO3 (0x00004000U)
|
||||
#define TSC_GROUP4_IO4 (0x00008000U)
|
||||
#define TSC_GROUP4_ALL_IOS (0x0000F000U)
|
||||
#define TSC_GROUP6_IO1 TSC_IOCCR_G6_IO1 /*!< TSC Group6 IO1 */
|
||||
#define TSC_GROUP6_IO2 TSC_IOCCR_G6_IO2 /*!< TSC Group6 IO2 */
|
||||
#define TSC_GROUP6_IO3 TSC_IOCCR_G6_IO3 /*!< TSC Group6 IO3 */
|
||||
#define TSC_GROUP6_IO4 TSC_IOCCR_G6_IO4 /*!< TSC Group6 IO4 */
|
||||
|
||||
#define TSC_GROUP5_IO1 (0x00010000U)
|
||||
#define TSC_GROUP5_IO2 (0x00020000U)
|
||||
#define TSC_GROUP5_IO3 (0x00040000U)
|
||||
#define TSC_GROUP5_IO4 (0x00080000U)
|
||||
#define TSC_GROUP5_ALL_IOS (0x000F0000U)
|
||||
#define TSC_GROUP7_IO1 TSC_IOCCR_G7_IO1 /*!< TSC Group7 IO1 */
|
||||
#define TSC_GROUP7_IO2 TSC_IOCCR_G7_IO2 /*!< TSC Group7 IO2 */
|
||||
#define TSC_GROUP7_IO3 TSC_IOCCR_G7_IO3 /*!< TSC Group7 IO3 */
|
||||
#define TSC_GROUP7_IO4 TSC_IOCCR_G7_IO4 /*!< TSC Group7 IO4 */
|
||||
|
||||
#define TSC_GROUP6_IO1 (0x00100000U)
|
||||
#define TSC_GROUP6_IO2 (0x00200000U)
|
||||
#define TSC_GROUP6_IO3 (0x00400000U)
|
||||
#define TSC_GROUP6_IO4 (0x00800000U)
|
||||
#define TSC_GROUP6_ALL_IOS (0x00F00000U)
|
||||
|
||||
#define TSC_GROUP7_IO1 (0x01000000U)
|
||||
#define TSC_GROUP7_IO2 (0x02000000U)
|
||||
#define TSC_GROUP7_IO3 (0x04000000U)
|
||||
#define TSC_GROUP7_IO4 (0x08000000U)
|
||||
#define TSC_GROUP7_ALL_IOS (0x0F000000U)
|
||||
|
||||
#define TSC_GROUP8_IO1 (0x10000000U)
|
||||
#define TSC_GROUP8_IO2 (0x20000000U)
|
||||
#define TSC_GROUP8_IO3 (0x40000000U)
|
||||
#define TSC_GROUP8_IO4 (0x80000000U)
|
||||
#define TSC_GROUP8_ALL_IOS (0xF0000000U)
|
||||
|
||||
#define TSC_ALL_GROUPS_ALL_IOS (0xFFFFFFFFU)
|
||||
#define TSC_GROUP8_IO1 TSC_IOCCR_G8_IO1 /*!< TSC Group8 IO1 */
|
||||
#define TSC_GROUP8_IO2 TSC_IOCCR_G8_IO2 /*!< TSC Group8 IO2 */
|
||||
#define TSC_GROUP8_IO3 TSC_IOCCR_G8_IO3 /*!< TSC Group8 IO3 */
|
||||
#define TSC_GROUP8_IO4 TSC_IOCCR_G8_IO4 /*!< TSC Group8 IO4 */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -363,70 +375,78 @@ typedef struct
|
|||
/* Exported macros -----------------------------------------------------------*/
|
||||
|
||||
/** @defgroup TSC_Exported_Macros TSC Exported Macros
|
||||
* @{
|
||||
*/
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @brief Reset TSC handle state.
|
||||
* @param __HANDLE__ TSC handle
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_TSC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_TSC_STATE_RESET)
|
||||
#if (USE_HAL_TSC_REGISTER_CALLBACKS == 1)
|
||||
#define __HAL_TSC_RESET_HANDLE_STATE(__HANDLE__) do{ \
|
||||
(__HANDLE__)->State = HAL_TSC_STATE_RESET; \
|
||||
(__HANDLE__)->MspInitCallback = NULL; \
|
||||
(__HANDLE__)->MspDeInitCallback = NULL; \
|
||||
} while(0)
|
||||
#else
|
||||
#define __HAL_TSC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_TSC_STATE_RESET)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enable the TSC peripheral.
|
||||
* @param __HANDLE__ TSC handle
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_TSC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_TSCE)
|
||||
#define __HAL_TSC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_TSCE)
|
||||
|
||||
/**
|
||||
* @brief Disable the TSC peripheral.
|
||||
* @param __HANDLE__ TSC handle
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_TSC_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_TSCE))
|
||||
#define __HAL_TSC_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= (~TSC_CR_TSCE))
|
||||
|
||||
/**
|
||||
* @brief Start acquisition.
|
||||
* @param __HANDLE__ TSC handle
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_TSC_START_ACQ(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_START)
|
||||
#define __HAL_TSC_START_ACQ(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_START)
|
||||
|
||||
/**
|
||||
* @brief Stop acquisition.
|
||||
* @param __HANDLE__ TSC handle
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_TSC_STOP_ACQ(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_START))
|
||||
#define __HAL_TSC_STOP_ACQ(__HANDLE__) ((__HANDLE__)->Instance->CR &= (~TSC_CR_START))
|
||||
|
||||
/**
|
||||
* @brief Set IO default mode to output push-pull low.
|
||||
* @param __HANDLE__ TSC handle
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_TSC_SET_IODEF_OUTPPLOW(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_IODEF))
|
||||
#define __HAL_TSC_SET_IODEF_OUTPPLOW(__HANDLE__) ((__HANDLE__)->Instance->CR &= (~TSC_CR_IODEF))
|
||||
|
||||
/**
|
||||
* @brief Set IO default mode to input floating.
|
||||
* @param __HANDLE__ TSC handle
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_TSC_SET_IODEF_INFLOAT(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_IODEF)
|
||||
#define __HAL_TSC_SET_IODEF_INFLOAT(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_IODEF)
|
||||
|
||||
/**
|
||||
* @brief Set synchronization polarity to falling edge.
|
||||
* @param __HANDLE__ TSC handle
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_TSC_SET_SYNC_POL_FALL(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_SYNCPOL))
|
||||
#define __HAL_TSC_SET_SYNC_POL_FALL(__HANDLE__) ((__HANDLE__)->Instance->CR &= (~TSC_CR_SYNCPOL))
|
||||
|
||||
/**
|
||||
* @brief Set synchronization polarity to rising edge and high level.
|
||||
* @param __HANDLE__ TSC handle
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_TSC_SET_SYNC_POL_RISE_HIGH(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_SYNCPOL)
|
||||
#define __HAL_TSC_SET_SYNC_POL_RISE_HIGH(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_SYNCPOL)
|
||||
|
||||
/**
|
||||
* @brief Enable TSC interrupt.
|
||||
|
@ -434,7 +454,7 @@ typedef struct
|
|||
* @param __INTERRUPT__ TSC interrupt
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_TSC_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
|
||||
#define __HAL_TSC_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
|
||||
|
||||
/**
|
||||
* @brief Disable TSC interrupt.
|
||||
|
@ -442,14 +462,14 @@ typedef struct
|
|||
* @param __INTERRUPT__ TSC interrupt
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_TSC_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (uint32_t)(~(__INTERRUPT__)))
|
||||
#define __HAL_TSC_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (~(__INTERRUPT__)))
|
||||
|
||||
/** @brief Check whether the specified TSC interrupt source is enabled or not.
|
||||
* @param __HANDLE__ TSC Handle
|
||||
* @param __INTERRUPT__ TSC interrupt
|
||||
* @retval SET or RESET
|
||||
*/
|
||||
#define __HAL_TSC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
|
||||
#define __HAL_TSC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
|
||||
|
||||
/**
|
||||
* @brief Check whether the specified TSC flag is set or not.
|
||||
|
@ -457,7 +477,7 @@ typedef struct
|
|||
* @param __FLAG__ TSC flag
|
||||
* @retval SET or RESET
|
||||
*/
|
||||
#define __HAL_TSC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) ? SET : RESET)
|
||||
#define __HAL_TSC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) ? SET : RESET)
|
||||
|
||||
/**
|
||||
* @brief Clear the TSC's pending flag.
|
||||
|
@ -465,7 +485,7 @@ typedef struct
|
|||
* @param __FLAG__ TSC flag
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_TSC_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
|
||||
#define __HAL_TSC_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
|
||||
|
||||
/**
|
||||
* @brief Enable schmitt trigger hysteresis on a group of IOs.
|
||||
|
@ -473,7 +493,7 @@ typedef struct
|
|||
* @param __GX_IOY_MASK__ IOs mask
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_TSC_ENABLE_HYSTERESIS(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOHCR |= (__GX_IOY_MASK__))
|
||||
#define __HAL_TSC_ENABLE_HYSTERESIS(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOHCR |= (__GX_IOY_MASK__))
|
||||
|
||||
/**
|
||||
* @brief Disable schmitt trigger hysteresis on a group of IOs.
|
||||
|
@ -481,7 +501,7 @@ typedef struct
|
|||
* @param __GX_IOY_MASK__ IOs mask
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_TSC_DISABLE_HYSTERESIS(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOHCR &= (uint32_t)(~(__GX_IOY_MASK__)))
|
||||
#define __HAL_TSC_DISABLE_HYSTERESIS(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOHCR &= (~(__GX_IOY_MASK__)))
|
||||
|
||||
/**
|
||||
* @brief Open analog switch on a group of IOs.
|
||||
|
@ -489,7 +509,7 @@ typedef struct
|
|||
* @param __GX_IOY_MASK__ IOs mask
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_TSC_OPEN_ANALOG_SWITCH(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOASCR &= (uint32_t)(~(__GX_IOY_MASK__)))
|
||||
#define __HAL_TSC_OPEN_ANALOG_SWITCH(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOASCR &= (~(__GX_IOY_MASK__)))
|
||||
|
||||
/**
|
||||
* @brief Close analog switch on a group of IOs.
|
||||
|
@ -505,7 +525,7 @@ typedef struct
|
|||
* @param __GX_IOY_MASK__ IOs mask
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_TSC_ENABLE_CHANNEL(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOCCR |= (__GX_IOY_MASK__))
|
||||
#define __HAL_TSC_ENABLE_CHANNEL(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOCCR |= (__GX_IOY_MASK__))
|
||||
|
||||
/**
|
||||
* @brief Disable a group of channel IOs.
|
||||
|
@ -513,7 +533,7 @@ typedef struct
|
|||
* @param __GX_IOY_MASK__ IOs mask
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_TSC_DISABLE_CHANNEL(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOCCR &= (uint32_t)(~(__GX_IOY_MASK__)))
|
||||
#define __HAL_TSC_DISABLE_CHANNEL(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOCCR &= (~(__GX_IOY_MASK__)))
|
||||
|
||||
/**
|
||||
* @brief Enable a group of IOs in sampling mode.
|
||||
|
@ -521,7 +541,7 @@ typedef struct
|
|||
* @param __GX_IOY_MASK__ IOs mask
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_TSC_ENABLE_SAMPLING(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOSCR |= (__GX_IOY_MASK__))
|
||||
#define __HAL_TSC_ENABLE_SAMPLING(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOSCR |= (__GX_IOY_MASK__))
|
||||
|
||||
/**
|
||||
* @brief Disable a group of sampling IOs.
|
||||
|
@ -529,7 +549,7 @@ typedef struct
|
|||
* @param __GX_IOY_MASK__ IOs mask
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_TSC_DISABLE_SAMPLING(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOSCR &= (uint32_t)(~(__GX_IOY_MASK__)))
|
||||
#define __HAL_TSC_DISABLE_SAMPLING(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOSCR &= (~(__GX_IOY_MASK__)))
|
||||
|
||||
/**
|
||||
* @brief Enable acquisition groups.
|
||||
|
@ -545,7 +565,7 @@ typedef struct
|
|||
* @param __GX_MASK__ Groups mask
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_TSC_DISABLE_GROUP(__HANDLE__, __GX_MASK__) ((__HANDLE__)->Instance->IOGCSR &= (uint32_t)(~(__GX_MASK__)))
|
||||
#define __HAL_TSC_DISABLE_GROUP(__HANDLE__, __GX_MASK__) ((__HANDLE__)->Instance->IOGCSR &= (~(__GX_MASK__)))
|
||||
|
||||
/** @brief Gets acquisition group status.
|
||||
* @param __HANDLE__ TSC Handle
|
||||
|
@ -553,7 +573,7 @@ typedef struct
|
|||
* @retval SET or RESET
|
||||
*/
|
||||
#define __HAL_TSC_GET_GROUP_STATUS(__HANDLE__, __GX_INDEX__) \
|
||||
((((__HANDLE__)->Instance->IOGCSR & (uint32_t)((uint32_t)1U << ((__GX_INDEX__) + (uint32_t)16U))) == (uint32_t)((uint32_t)1U << ((__GX_INDEX__) + (uint32_t)16U))) ? TSC_GROUP_COMPLETED : TSC_GROUP_ONGOING)
|
||||
((((__HANDLE__)->Instance->IOGCSR & (uint32_t)(1UL << (((__GX_INDEX__) & 0xFUL) + 16UL))) == (uint32_t)(1UL << (((__GX_INDEX__) & 0xFUL) + 16UL))) ? TSC_GROUP_COMPLETED : TSC_GROUP_ONGOING)
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
@ -565,78 +585,106 @@ typedef struct
|
|||
* @{
|
||||
*/
|
||||
|
||||
#define IS_TSC_CTPH(VAL) (((VAL) == TSC_CTPH_1CYCLE) || \
|
||||
((VAL) == TSC_CTPH_2CYCLES) || \
|
||||
((VAL) == TSC_CTPH_3CYCLES) || \
|
||||
((VAL) == TSC_CTPH_4CYCLES) || \
|
||||
((VAL) == TSC_CTPH_5CYCLES) || \
|
||||
((VAL) == TSC_CTPH_6CYCLES) || \
|
||||
((VAL) == TSC_CTPH_7CYCLES) || \
|
||||
((VAL) == TSC_CTPH_8CYCLES) || \
|
||||
((VAL) == TSC_CTPH_9CYCLES) || \
|
||||
((VAL) == TSC_CTPH_10CYCLES) || \
|
||||
((VAL) == TSC_CTPH_11CYCLES) || \
|
||||
((VAL) == TSC_CTPH_12CYCLES) || \
|
||||
((VAL) == TSC_CTPH_13CYCLES) || \
|
||||
((VAL) == TSC_CTPH_14CYCLES) || \
|
||||
((VAL) == TSC_CTPH_15CYCLES) || \
|
||||
((VAL) == TSC_CTPH_16CYCLES))
|
||||
#define IS_TSC_CTPH(__VALUE__) (((__VALUE__) == TSC_CTPH_1CYCLE) || \
|
||||
((__VALUE__) == TSC_CTPH_2CYCLES) || \
|
||||
((__VALUE__) == TSC_CTPH_3CYCLES) || \
|
||||
((__VALUE__) == TSC_CTPH_4CYCLES) || \
|
||||
((__VALUE__) == TSC_CTPH_5CYCLES) || \
|
||||
((__VALUE__) == TSC_CTPH_6CYCLES) || \
|
||||
((__VALUE__) == TSC_CTPH_7CYCLES) || \
|
||||
((__VALUE__) == TSC_CTPH_8CYCLES) || \
|
||||
((__VALUE__) == TSC_CTPH_9CYCLES) || \
|
||||
((__VALUE__) == TSC_CTPH_10CYCLES) || \
|
||||
((__VALUE__) == TSC_CTPH_11CYCLES) || \
|
||||
((__VALUE__) == TSC_CTPH_12CYCLES) || \
|
||||
((__VALUE__) == TSC_CTPH_13CYCLES) || \
|
||||
((__VALUE__) == TSC_CTPH_14CYCLES) || \
|
||||
((__VALUE__) == TSC_CTPH_15CYCLES) || \
|
||||
((__VALUE__) == TSC_CTPH_16CYCLES))
|
||||
|
||||
#define IS_TSC_CTPL(VAL) (((VAL) == TSC_CTPL_1CYCLE) || \
|
||||
((VAL) == TSC_CTPL_2CYCLES) || \
|
||||
((VAL) == TSC_CTPL_3CYCLES) || \
|
||||
((VAL) == TSC_CTPL_4CYCLES) || \
|
||||
((VAL) == TSC_CTPL_5CYCLES) || \
|
||||
((VAL) == TSC_CTPL_6CYCLES) || \
|
||||
((VAL) == TSC_CTPL_7CYCLES) || \
|
||||
((VAL) == TSC_CTPL_8CYCLES) || \
|
||||
((VAL) == TSC_CTPL_9CYCLES) || \
|
||||
((VAL) == TSC_CTPL_10CYCLES) || \
|
||||
((VAL) == TSC_CTPL_11CYCLES) || \
|
||||
((VAL) == TSC_CTPL_12CYCLES) || \
|
||||
((VAL) == TSC_CTPL_13CYCLES) || \
|
||||
((VAL) == TSC_CTPL_14CYCLES) || \
|
||||
((VAL) == TSC_CTPL_15CYCLES) || \
|
||||
((VAL) == TSC_CTPL_16CYCLES))
|
||||
#define IS_TSC_CTPL(__VALUE__) (((__VALUE__) == TSC_CTPL_1CYCLE) || \
|
||||
((__VALUE__) == TSC_CTPL_2CYCLES) || \
|
||||
((__VALUE__) == TSC_CTPL_3CYCLES) || \
|
||||
((__VALUE__) == TSC_CTPL_4CYCLES) || \
|
||||
((__VALUE__) == TSC_CTPL_5CYCLES) || \
|
||||
((__VALUE__) == TSC_CTPL_6CYCLES) || \
|
||||
((__VALUE__) == TSC_CTPL_7CYCLES) || \
|
||||
((__VALUE__) == TSC_CTPL_8CYCLES) || \
|
||||
((__VALUE__) == TSC_CTPL_9CYCLES) || \
|
||||
((__VALUE__) == TSC_CTPL_10CYCLES) || \
|
||||
((__VALUE__) == TSC_CTPL_11CYCLES) || \
|
||||
((__VALUE__) == TSC_CTPL_12CYCLES) || \
|
||||
((__VALUE__) == TSC_CTPL_13CYCLES) || \
|
||||
((__VALUE__) == TSC_CTPL_14CYCLES) || \
|
||||
((__VALUE__) == TSC_CTPL_15CYCLES) || \
|
||||
((__VALUE__) == TSC_CTPL_16CYCLES))
|
||||
|
||||
#define IS_TSC_SS(VAL) (((VAL) == DISABLE) || ((VAL) == ENABLE))
|
||||
#define IS_TSC_SS(__VALUE__) (((FunctionalState)(__VALUE__) == DISABLE) || ((FunctionalState)(__VALUE__) == ENABLE))
|
||||
|
||||
#define IS_TSC_SSD(VAL) (((VAL) == 0U) || (((VAL) > 0U) && ((VAL) < 128U)))
|
||||
#define IS_TSC_SSD(__VALUE__) (((__VALUE__) == 0UL) || (((__VALUE__) > 0UL) && ((__VALUE__) < 128UL)))
|
||||
|
||||
#define IS_TSC_SS_PRESC(VAL) (((VAL) == TSC_SS_PRESC_DIV1) || ((VAL) == TSC_SS_PRESC_DIV2))
|
||||
#define IS_TSC_SS_PRESC(__VALUE__) (((__VALUE__) == TSC_SS_PRESC_DIV1) || ((__VALUE__) == TSC_SS_PRESC_DIV2))
|
||||
|
||||
#define IS_TSC_PG_PRESC(VAL) (((VAL) == TSC_PG_PRESC_DIV1) || \
|
||||
((VAL) == TSC_PG_PRESC_DIV2) || \
|
||||
((VAL) == TSC_PG_PRESC_DIV4) || \
|
||||
((VAL) == TSC_PG_PRESC_DIV8) || \
|
||||
((VAL) == TSC_PG_PRESC_DIV16) || \
|
||||
((VAL) == TSC_PG_PRESC_DIV32) || \
|
||||
((VAL) == TSC_PG_PRESC_DIV64) || \
|
||||
((VAL) == TSC_PG_PRESC_DIV128))
|
||||
#define IS_TSC_PG_PRESC(__VALUE__) (((__VALUE__) == TSC_PG_PRESC_DIV1) || \
|
||||
((__VALUE__) == TSC_PG_PRESC_DIV2) || \
|
||||
((__VALUE__) == TSC_PG_PRESC_DIV4) || \
|
||||
((__VALUE__) == TSC_PG_PRESC_DIV8) || \
|
||||
((__VALUE__) == TSC_PG_PRESC_DIV16) || \
|
||||
((__VALUE__) == TSC_PG_PRESC_DIV32) || \
|
||||
((__VALUE__) == TSC_PG_PRESC_DIV64) || \
|
||||
((__VALUE__) == TSC_PG_PRESC_DIV128))
|
||||
|
||||
#define IS_TSC_MCV(VAL) (((VAL) == TSC_MCV_255) || \
|
||||
((VAL) == TSC_MCV_511) || \
|
||||
((VAL) == TSC_MCV_1023) || \
|
||||
((VAL) == TSC_MCV_2047) || \
|
||||
((VAL) == TSC_MCV_4095) || \
|
||||
((VAL) == TSC_MCV_8191) || \
|
||||
((VAL) == TSC_MCV_16383))
|
||||
#define IS_TSC_MCV(__VALUE__) (((__VALUE__) == TSC_MCV_255) || \
|
||||
((__VALUE__) == TSC_MCV_511) || \
|
||||
((__VALUE__) == TSC_MCV_1023) || \
|
||||
((__VALUE__) == TSC_MCV_2047) || \
|
||||
((__VALUE__) == TSC_MCV_4095) || \
|
||||
((__VALUE__) == TSC_MCV_8191) || \
|
||||
((__VALUE__) == TSC_MCV_16383))
|
||||
|
||||
#define IS_TSC_IODEF(VAL) (((VAL) == TSC_IODEF_OUT_PP_LOW) || ((VAL) == TSC_IODEF_IN_FLOAT))
|
||||
#define IS_TSC_IODEF(__VALUE__) (((__VALUE__) == TSC_IODEF_OUT_PP_LOW) || ((__VALUE__) == TSC_IODEF_IN_FLOAT))
|
||||
|
||||
#define IS_TSC_SYNC_POL(VAL) (((VAL) == TSC_SYNC_POLARITY_FALLING) || ((VAL) == TSC_SYNC_POLARITY_RISING))
|
||||
#define IS_TSC_SYNC_POL(__VALUE__) (((__VALUE__) == TSC_SYNC_POLARITY_FALLING) || ((__VALUE__) == TSC_SYNC_POLARITY_RISING))
|
||||
|
||||
#define IS_TSC_ACQ_MODE(VAL) (((VAL) == TSC_ACQ_MODE_NORMAL) || ((VAL) == TSC_ACQ_MODE_SYNCHRO))
|
||||
#define IS_TSC_ACQ_MODE(__VALUE__) (((__VALUE__) == TSC_ACQ_MODE_NORMAL) || ((__VALUE__) == TSC_ACQ_MODE_SYNCHRO))
|
||||
|
||||
#define IS_TSC_IOMODE(VAL) (((VAL) == TSC_IOMODE_UNUSED) || \
|
||||
((VAL) == TSC_IOMODE_CHANNEL) || \
|
||||
((VAL) == TSC_IOMODE_SHIELD) || \
|
||||
((VAL) == TSC_IOMODE_SAMPLING))
|
||||
#define IS_TSC_MCE_IT(__VALUE__) (((FunctionalState)(__VALUE__) == DISABLE) || ((FunctionalState)(__VALUE__) == ENABLE))
|
||||
|
||||
#define IS_TSC_MCE_IT(VAL) (((VAL) == DISABLE) || ((VAL) == ENABLE))
|
||||
|
||||
#define IS_TSC_GROUP_INDEX(VAL) (((VAL) == 0U) || (((VAL) > 0U) && ((VAL) < TSC_NB_OF_GROUPS)))
|
||||
#define IS_TSC_GROUP_INDEX(__VALUE__) (((__VALUE__) == 0UL) || (((__VALUE__) > 0UL) && ((__VALUE__) < (uint32_t)TSC_NB_OF_GROUPS)))
|
||||
|
||||
#define IS_TSC_GROUP(__VALUE__) (((__VALUE__) == 0UL) ||\
|
||||
(((__VALUE__) & TSC_GROUP1_IO1) == TSC_GROUP1_IO1) ||\
|
||||
(((__VALUE__) & TSC_GROUP1_IO2) == TSC_GROUP1_IO2) ||\
|
||||
(((__VALUE__) & TSC_GROUP1_IO3) == TSC_GROUP1_IO3) ||\
|
||||
(((__VALUE__) & TSC_GROUP1_IO4) == TSC_GROUP1_IO4) ||\
|
||||
(((__VALUE__) & TSC_GROUP2_IO1) == TSC_GROUP2_IO1) ||\
|
||||
(((__VALUE__) & TSC_GROUP2_IO2) == TSC_GROUP2_IO2) ||\
|
||||
(((__VALUE__) & TSC_GROUP2_IO3) == TSC_GROUP2_IO3) ||\
|
||||
(((__VALUE__) & TSC_GROUP2_IO4) == TSC_GROUP2_IO4) ||\
|
||||
(((__VALUE__) & TSC_GROUP3_IO1) == TSC_GROUP3_IO1) ||\
|
||||
(((__VALUE__) & TSC_GROUP3_IO2) == TSC_GROUP3_IO2) ||\
|
||||
(((__VALUE__) & TSC_GROUP3_IO3) == TSC_GROUP3_IO3) ||\
|
||||
(((__VALUE__) & TSC_GROUP3_IO4) == TSC_GROUP3_IO4) ||\
|
||||
(((__VALUE__) & TSC_GROUP4_IO1) == TSC_GROUP4_IO1) ||\
|
||||
(((__VALUE__) & TSC_GROUP4_IO2) == TSC_GROUP4_IO2) ||\
|
||||
(((__VALUE__) & TSC_GROUP4_IO3) == TSC_GROUP4_IO3) ||\
|
||||
(((__VALUE__) & TSC_GROUP4_IO4) == TSC_GROUP4_IO4) ||\
|
||||
(((__VALUE__) & TSC_GROUP5_IO1) == TSC_GROUP5_IO1) ||\
|
||||
(((__VALUE__) & TSC_GROUP5_IO2) == TSC_GROUP5_IO2) ||\
|
||||
(((__VALUE__) & TSC_GROUP5_IO3) == TSC_GROUP5_IO3) ||\
|
||||
(((__VALUE__) & TSC_GROUP5_IO4) == TSC_GROUP5_IO4) ||\
|
||||
(((__VALUE__) & TSC_GROUP6_IO1) == TSC_GROUP6_IO1) ||\
|
||||
(((__VALUE__) & TSC_GROUP6_IO2) == TSC_GROUP6_IO2) ||\
|
||||
(((__VALUE__) & TSC_GROUP6_IO3) == TSC_GROUP6_IO3) ||\
|
||||
(((__VALUE__) & TSC_GROUP6_IO4) == TSC_GROUP6_IO4) ||\
|
||||
(((__VALUE__) & TSC_GROUP7_IO1) == TSC_GROUP7_IO1) ||\
|
||||
(((__VALUE__) & TSC_GROUP7_IO2) == TSC_GROUP7_IO2) ||\
|
||||
(((__VALUE__) & TSC_GROUP7_IO3) == TSC_GROUP7_IO3) ||\
|
||||
(((__VALUE__) & TSC_GROUP7_IO4) == TSC_GROUP7_IO4) ||\
|
||||
(((__VALUE__) & TSC_GROUP8_IO1) == TSC_GROUP8_IO1) ||\
|
||||
(((__VALUE__) & TSC_GROUP8_IO2) == TSC_GROUP8_IO2) ||\
|
||||
(((__VALUE__) & TSC_GROUP8_IO3) == TSC_GROUP8_IO3) ||\
|
||||
(((__VALUE__) & TSC_GROUP8_IO4) == TSC_GROUP8_IO4))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -647,47 +695,53 @@ typedef struct
|
|||
*/
|
||||
|
||||
/** @addtogroup TSC_Exported_Functions_Group1 Initialization and de-initialization functions
|
||||
* @{
|
||||
*/
|
||||
/* Initialization and de-initialization functions *****************************/
|
||||
HAL_StatusTypeDef HAL_TSC_Init(TSC_HandleTypeDef* htsc);
|
||||
* @{
|
||||
*/
|
||||
/* Initialization and de-initialization functions *****************************/
|
||||
HAL_StatusTypeDef HAL_TSC_Init(TSC_HandleTypeDef *htsc);
|
||||
HAL_StatusTypeDef HAL_TSC_DeInit(TSC_HandleTypeDef *htsc);
|
||||
void HAL_TSC_MspInit(TSC_HandleTypeDef* htsc);
|
||||
void HAL_TSC_MspDeInit(TSC_HandleTypeDef* htsc);
|
||||
void HAL_TSC_MspInit(TSC_HandleTypeDef *htsc);
|
||||
void HAL_TSC_MspDeInit(TSC_HandleTypeDef *htsc);
|
||||
|
||||
/* Callbacks Register/UnRegister functions ***********************************/
|
||||
#if (USE_HAL_TSC_REGISTER_CALLBACKS == 1)
|
||||
HAL_StatusTypeDef HAL_TSC_RegisterCallback(TSC_HandleTypeDef *htsc, HAL_TSC_CallbackIDTypeDef CallbackID, pTSC_CallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_TSC_UnRegisterCallback(TSC_HandleTypeDef *htsc, HAL_TSC_CallbackIDTypeDef CallbackID);
|
||||
#endif /* USE_HAL_TSC_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup TSC_Exported_Functions_Group2 Input and Output operation functions
|
||||
* @{
|
||||
*/
|
||||
* @{
|
||||
*/
|
||||
/* IO operation functions *****************************************************/
|
||||
HAL_StatusTypeDef HAL_TSC_Start(TSC_HandleTypeDef* htsc);
|
||||
HAL_StatusTypeDef HAL_TSC_Start_IT(TSC_HandleTypeDef* htsc);
|
||||
HAL_StatusTypeDef HAL_TSC_Stop(TSC_HandleTypeDef* htsc);
|
||||
HAL_StatusTypeDef HAL_TSC_Stop_IT(TSC_HandleTypeDef* htsc);
|
||||
HAL_StatusTypeDef HAL_TSC_PollForAcquisition(TSC_HandleTypeDef* htsc);
|
||||
TSC_GroupStatusTypeDef HAL_TSC_GroupGetStatus(TSC_HandleTypeDef* htsc, uint32_t gx_index);
|
||||
uint32_t HAL_TSC_GroupGetValue(TSC_HandleTypeDef* htsc, uint32_t gx_index);
|
||||
HAL_StatusTypeDef HAL_TSC_Start(TSC_HandleTypeDef *htsc);
|
||||
HAL_StatusTypeDef HAL_TSC_Start_IT(TSC_HandleTypeDef *htsc);
|
||||
HAL_StatusTypeDef HAL_TSC_Stop(TSC_HandleTypeDef *htsc);
|
||||
HAL_StatusTypeDef HAL_TSC_Stop_IT(TSC_HandleTypeDef *htsc);
|
||||
HAL_StatusTypeDef HAL_TSC_PollForAcquisition(TSC_HandleTypeDef *htsc);
|
||||
TSC_GroupStatusTypeDef HAL_TSC_GroupGetStatus(TSC_HandleTypeDef *htsc, uint32_t gx_index);
|
||||
uint32_t HAL_TSC_GroupGetValue(TSC_HandleTypeDef *htsc, uint32_t gx_index);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup TSC_Exported_Functions_Group3 Peripheral Control functions
|
||||
* @{
|
||||
*/
|
||||
* @{
|
||||
*/
|
||||
/* Peripheral Control functions ***********************************************/
|
||||
HAL_StatusTypeDef HAL_TSC_IOConfig(TSC_HandleTypeDef* htsc, TSC_IOConfigTypeDef* config);
|
||||
HAL_StatusTypeDef HAL_TSC_IODischarge(TSC_HandleTypeDef* htsc, uint32_t choice);
|
||||
HAL_StatusTypeDef HAL_TSC_IOConfig(TSC_HandleTypeDef *htsc, TSC_IOConfigTypeDef *config);
|
||||
HAL_StatusTypeDef HAL_TSC_IODischarge(TSC_HandleTypeDef *htsc, FunctionalState choice);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup TSC_Exported_Functions_Group4 Peripheral State and Errors functions
|
||||
* @{
|
||||
*/
|
||||
* @{
|
||||
*/
|
||||
/* Peripheral State and Error functions ***************************************/
|
||||
HAL_TSC_StateTypeDef HAL_TSC_GetState(TSC_HandleTypeDef* htsc);
|
||||
HAL_TSC_StateTypeDef HAL_TSC_GetState(TSC_HandleTypeDef *htsc);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -696,9 +750,9 @@ HAL_TSC_StateTypeDef HAL_TSC_GetState(TSC_HandleTypeDef* htsc);
|
|||
* @{
|
||||
*/
|
||||
/******* TSC IRQHandler and Callbacks used in Interrupt mode */
|
||||
void HAL_TSC_IRQHandler(TSC_HandleTypeDef* htsc);
|
||||
void HAL_TSC_ConvCpltCallback(TSC_HandleTypeDef* htsc);
|
||||
void HAL_TSC_ErrorCallback(TSC_HandleTypeDef* htsc);
|
||||
void HAL_TSC_IRQHandler(TSC_HandleTypeDef *htsc);
|
||||
void HAL_TSC_ConvCpltCallback(TSC_HandleTypeDef *htsc);
|
||||
void HAL_TSC_ErrorCallback(TSC_HandleTypeDef *htsc);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -719,6 +773,6 @@ void HAL_TSC_ErrorCallback(TSC_HandleTypeDef* htsc);
|
|||
}
|
||||
#endif
|
||||
|
||||
#endif /*__STM32F3xx_TSC_H */
|
||||
#endif /* STM32F3xx_HAL_TSC_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -6,39 +6,23 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_HAL_UART_EX_H
|
||||
#define __STM32F3xx_HAL_UART_EX_H
|
||||
#ifndef STM32F3xx_HAL_UART_EX_H
|
||||
#define STM32F3xx_HAL_UART_EX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
|
@ -53,6 +37,30 @@
|
|||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/** @defgroup UARTEx_Exported_Types UARTEx Exported Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief UART wake up from stop mode parameters
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t WakeUpEvent; /*!< Specifies which event will activate the Wakeup from Stop mode flag (WUF).
|
||||
This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection.
|
||||
If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must
|
||||
be filled up. */
|
||||
|
||||
uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long.
|
||||
This parameter can be a value of @ref UARTEx_WakeUp_Address_Length. */
|
||||
|
||||
uint8_t Address; /*!< UART/USART node address (7-bit long max). */
|
||||
} UART_WakeUpTypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants
|
||||
* @{
|
||||
|
@ -61,18 +69,24 @@
|
|||
/** @defgroup UARTEx_Word_Length UARTEx Word Length
|
||||
* @{
|
||||
*/
|
||||
#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
|
||||
defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
|
||||
defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
|
||||
#define UART_WORDLENGTH_7B ((uint32_t)USART_CR1_M1) /*!< 7-bit long UART frame */
|
||||
#define UART_WORDLENGTH_8B (0x00000000U) /*!< 8-bit long UART frame */
|
||||
#define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M0) /*!< 9-bit long UART frame */
|
||||
#if defined(USART_CR1_M1)
|
||||
#define UART_WORDLENGTH_7B USART_CR1_M1 /*!< 7-bit long UART frame */
|
||||
#endif /* USART_CR1_M1 */
|
||||
#define UART_WORDLENGTH_8B 0x00000000U /*!< 8-bit long UART frame */
|
||||
#if defined (USART_CR1_M0)
|
||||
#define UART_WORDLENGTH_9B USART_CR1_M0 /*!< 9-bit long UART frame */
|
||||
#else
|
||||
#define UART_WORDLENGTH_8B (0x00000000U) /*!< 8-bit long UART frame */
|
||||
#define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M) /*!< 9-bit long UART frame */
|
||||
#endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
|
||||
/* STM32F303x8 || STM32F334x8 || STM32F328xx || */
|
||||
/* STM32F301x8 || STM32F302x8 || STM32F318xx */
|
||||
#define UART_WORDLENGTH_9B USART_CR1_M /*!< 9-bit long UART frame */
|
||||
#endif /* USART_CR1_M0 */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup UARTEx_WakeUp_Address_Length UARTEx WakeUp Address Length
|
||||
* @{
|
||||
*/
|
||||
#define UART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit long wake-up address */
|
||||
#define UART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit long wake-up address */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -92,13 +106,23 @@
|
|||
*/
|
||||
|
||||
/* Initialization and de-initialization functions ****************************/
|
||||
HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, uint32_t DeassertionTime);
|
||||
HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime,
|
||||
uint32_t DeassertionTime);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* IO operation functions *****************************************************/
|
||||
/** @addtogroup UARTEx_Exported_Functions_Group2
|
||||
* @{
|
||||
*/
|
||||
|
||||
void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart);
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup UARTEx_Exported_Functions_Group3
|
||||
* @{
|
||||
|
@ -108,8 +132,9 @@ HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity,
|
|||
HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection);
|
||||
HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart);
|
||||
HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart);
|
||||
|
||||
HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength);
|
||||
void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart);
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
@ -129,8 +154,7 @@ void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart);
|
|||
* @param __CLOCKSOURCE__ output variable.
|
||||
* @retval UART clocking source, written in __CLOCKSOURCE__.
|
||||
*/
|
||||
#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
|
||||
defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)
|
||||
#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)
|
||||
#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
|
||||
do { \
|
||||
if((__HANDLE__)->Instance == USART1) \
|
||||
|
@ -243,8 +267,7 @@ void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart);
|
|||
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
|
||||
} \
|
||||
} while(0U)
|
||||
#elif defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
|
||||
defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
|
||||
#elif defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
|
||||
#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
|
||||
do { \
|
||||
if((__HANDLE__)->Instance == USART1) \
|
||||
|
@ -352,11 +375,9 @@ void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart);
|
|||
(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
|
||||
} \
|
||||
} while(0U)
|
||||
#endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
|
||||
/* STM32F302xC || STM32F303xC || STM32F358xx */
|
||||
#endif /* STM32F302xE || STM32F303xE || STM32F398xx || STM32F302xC || STM32F303xC || STM32F358xx */
|
||||
|
||||
|
||||
/** @brief Compute the UART mask to apply to retrieve the received data
|
||||
/** @brief Report the UART mask to apply to retrieve the received data
|
||||
* according to the word length and to the parity bits activation.
|
||||
* @note If PCE = 1, the parity bit is not included in the data extracted
|
||||
* by the reception API().
|
||||
|
@ -365,92 +386,103 @@ void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart);
|
|||
* @param __HANDLE__ specifies the UART Handle.
|
||||
* @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field.
|
||||
*/
|
||||
#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
|
||||
defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
|
||||
defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
|
||||
#if defined (USART_CR1_M1)
|
||||
#define UART_MASK_COMPUTATION(__HANDLE__) \
|
||||
do { \
|
||||
if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x01FFU ; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x00FFU ; \
|
||||
} \
|
||||
} \
|
||||
else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
|
||||
{ \
|
||||
} \
|
||||
} \
|
||||
else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x00FFU ; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x007FU ; \
|
||||
} \
|
||||
} \
|
||||
else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
|
||||
{ \
|
||||
} \
|
||||
} \
|
||||
else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x007FU ; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x003FU ; \
|
||||
} \
|
||||
} \
|
||||
} while(0U)
|
||||
} \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x0000U; \
|
||||
} \
|
||||
} while(0U)
|
||||
|
||||
#else
|
||||
#define UART_MASK_COMPUTATION(__HANDLE__) \
|
||||
do { \
|
||||
if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x01FFU ; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x00FFU ; \
|
||||
} \
|
||||
} \
|
||||
else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
|
||||
{ \
|
||||
} \
|
||||
} \
|
||||
else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x00FFU ; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x007FU ; \
|
||||
} \
|
||||
} \
|
||||
} while(0U)
|
||||
#endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
|
||||
/* STM32F303x8 || STM32F334x8 || STM32F328xx || */
|
||||
/* STM32F301x8 || STM32F302x8 || STM32F318xx */
|
||||
} \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x0000U; \
|
||||
} \
|
||||
} while(0U)
|
||||
|
||||
#endif /* USART_CR1_M1 */
|
||||
|
||||
/**
|
||||
* @brief Ensure that UART frame length is valid.
|
||||
* @param __LENGTH__ UART frame length.
|
||||
* @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
|
||||
*/
|
||||
#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
|
||||
defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
|
||||
defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
|
||||
#if defined (USART_CR1_M1)
|
||||
#define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) || \
|
||||
((__LENGTH__) == UART_WORDLENGTH_8B) || \
|
||||
((__LENGTH__) == UART_WORDLENGTH_9B))
|
||||
#else
|
||||
#define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_8B) || \
|
||||
((__LENGTH__) == UART_WORDLENGTH_9B))
|
||||
#endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
|
||||
/* STM32F303x8 || STM32F334x8 || STM32F328xx || */
|
||||
/* STM32F301x8 || STM32F302x8 || STM32F318xx */
|
||||
#endif /* USART_CR1_M1 */
|
||||
|
||||
/**
|
||||
* @brief Ensure that UART wake-up address length is valid.
|
||||
* @param __ADDRESS__ UART wake-up address length.
|
||||
* @retval SET (__ADDRESS__ is valid) or RESET (__ADDRESS__ is invalid)
|
||||
*/
|
||||
#define IS_UART_ADDRESSLENGTH_DETECT(__ADDRESS__) (((__ADDRESS__) == UART_ADDRESS_DETECT_4B) || \
|
||||
((__ADDRESS__) == UART_ADDRESS_DETECT_7B))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -469,7 +501,6 @@ void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart);
|
|||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F3xx_HAL_UART_EX_H */
|
||||
#endif /* STM32F3xx_HAL_UART_EX_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
||||
|
|
|
@ -6,39 +6,23 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_HAL_USART_H
|
||||
#define __STM32F3xx_HAL_USART_H
|
||||
#ifndef STM32F3xx_HAL_USART_H
|
||||
#define STM32F3xx_HAL_USART_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
|
@ -64,7 +48,11 @@ typedef struct
|
|||
{
|
||||
uint32_t BaudRate; /*!< This member configures the Usart communication baud rate.
|
||||
The baud rate is computed using the following formula:
|
||||
Baud Rate Register = ((PCLKx) / ((huart->Init.BaudRate))). */
|
||||
Baud Rate Register[15:4] = ((2 * fclk_pres) / ((huart->Init.BaudRate)))[15:4]
|
||||
Baud Rate Register[3] = 0
|
||||
Baud Rate Register[2:0] = (((2 * fclk_pres) / ((huart->Init.BaudRate)))[3:0]) >> 1
|
||||
where fclk_pres is the USART input clock frequency
|
||||
@note Oversampling by 8 is systematically applied to achieve high baud rates. */
|
||||
|
||||
uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
|
||||
This parameter can be a value of @ref USARTEx_Word_Length. */
|
||||
|
@ -91,7 +79,8 @@ typedef struct
|
|||
uint32_t CLKLastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted
|
||||
data bit (MSB) has to be output on the SCLK pin in synchronous mode.
|
||||
This parameter can be a value of @ref USART_Last_Bit. */
|
||||
}USART_InitTypeDef;
|
||||
|
||||
} USART_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL USART State structures definition
|
||||
|
@ -106,7 +95,7 @@ typedef enum
|
|||
HAL_USART_STATE_BUSY_TX_RX = 0x32U, /*!< Data Transmission Reception process is ongoing */
|
||||
HAL_USART_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
|
||||
HAL_USART_STATE_ERROR = 0x04U /*!< Error */
|
||||
}HAL_USART_StateTypeDef;
|
||||
} HAL_USART_StateTypeDef;
|
||||
|
||||
/**
|
||||
* @brief USART clock sources definitions
|
||||
|
@ -119,43 +108,85 @@ typedef enum
|
|||
USART_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */
|
||||
USART_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */
|
||||
USART_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */
|
||||
}USART_ClockSourceTypeDef;
|
||||
|
||||
} USART_ClockSourceTypeDef;
|
||||
|
||||
/**
|
||||
* @brief USART handle Structure definition
|
||||
*/
|
||||
typedef struct
|
||||
typedef struct __USART_HandleTypeDef
|
||||
{
|
||||
USART_TypeDef *Instance; /*!< USART registers base address */
|
||||
USART_TypeDef *Instance; /*!< USART registers base address */
|
||||
|
||||
USART_InitTypeDef Init; /*!< USART communication parameters */
|
||||
USART_InitTypeDef Init; /*!< USART communication parameters */
|
||||
|
||||
uint8_t *pTxBuffPtr; /*!< Pointer to USART Tx transfer Buffer */
|
||||
uint8_t *pTxBuffPtr; /*!< Pointer to USART Tx transfer Buffer */
|
||||
|
||||
uint16_t TxXferSize; /*!< USART Tx Transfer size */
|
||||
uint16_t TxXferSize; /*!< USART Tx Transfer size */
|
||||
|
||||
__IO uint16_t TxXferCount; /*!< USART Tx Transfer Counter */
|
||||
__IO uint16_t TxXferCount; /*!< USART Tx Transfer Counter */
|
||||
|
||||
uint8_t *pRxBuffPtr; /*!< Pointer to USART Rx transfer Buffer */
|
||||
uint8_t *pRxBuffPtr; /*!< Pointer to USART Rx transfer Buffer */
|
||||
|
||||
uint16_t RxXferSize; /*!< USART Rx Transfer size */
|
||||
uint16_t RxXferSize; /*!< USART Rx Transfer size */
|
||||
|
||||
__IO uint16_t RxXferCount; /*!< USART Rx Transfer Counter */
|
||||
__IO uint16_t RxXferCount; /*!< USART Rx Transfer Counter */
|
||||
|
||||
uint16_t Mask; /*!< USART Rx RDR register mask */
|
||||
uint16_t Mask; /*!< USART Rx RDR register mask */
|
||||
|
||||
DMA_HandleTypeDef *hdmatx; /*!< USART Tx DMA Handle parameters */
|
||||
void (*RxISR)(struct __USART_HandleTypeDef *husart); /*!< Function pointer on Rx IRQ handler */
|
||||
|
||||
DMA_HandleTypeDef *hdmarx; /*!< USART Rx DMA Handle parameters */
|
||||
void (*TxISR)(struct __USART_HandleTypeDef *husart); /*!< Function pointer on Tx IRQ handler */
|
||||
|
||||
HAL_LockTypeDef Lock; /*!< Locking object */
|
||||
DMA_HandleTypeDef *hdmatx; /*!< USART Tx DMA Handle parameters */
|
||||
|
||||
__IO HAL_USART_StateTypeDef State; /*!< USART communication state */
|
||||
DMA_HandleTypeDef *hdmarx; /*!< USART Rx DMA Handle parameters */
|
||||
|
||||
__IO uint32_t ErrorCode; /*!< USART Error code */
|
||||
HAL_LockTypeDef Lock; /*!< Locking object */
|
||||
|
||||
}USART_HandleTypeDef;
|
||||
__IO HAL_USART_StateTypeDef State; /*!< USART communication state */
|
||||
|
||||
__IO uint32_t ErrorCode; /*!< USART Error code */
|
||||
|
||||
#if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
|
||||
void (* TxHalfCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Tx Half Complete Callback */
|
||||
void (* TxCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Tx Complete Callback */
|
||||
void (* RxHalfCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Rx Half Complete Callback */
|
||||
void (* RxCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Rx Complete Callback */
|
||||
void (* TxRxCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Tx Rx Complete Callback */
|
||||
void (* ErrorCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Error Callback */
|
||||
void (* AbortCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Abort Complete Callback */
|
||||
|
||||
void (* MspInitCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Msp Init callback */
|
||||
void (* MspDeInitCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Msp DeInit callback */
|
||||
#endif /* USE_HAL_USART_REGISTER_CALLBACKS */
|
||||
|
||||
} USART_HandleTypeDef;
|
||||
|
||||
#if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
|
||||
/**
|
||||
* @brief HAL USART Callback ID enumeration definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_USART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< USART Tx Half Complete Callback ID */
|
||||
HAL_USART_TX_COMPLETE_CB_ID = 0x01U, /*!< USART Tx Complete Callback ID */
|
||||
HAL_USART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< USART Rx Half Complete Callback ID */
|
||||
HAL_USART_RX_COMPLETE_CB_ID = 0x03U, /*!< USART Rx Complete Callback ID */
|
||||
HAL_USART_TX_RX_COMPLETE_CB_ID = 0x04U, /*!< USART Tx Rx Complete Callback ID */
|
||||
HAL_USART_ERROR_CB_ID = 0x05U, /*!< USART Error Callback ID */
|
||||
HAL_USART_ABORT_COMPLETE_CB_ID = 0x06U, /*!< USART Abort Complete Callback ID */
|
||||
|
||||
HAL_USART_MSPINIT_CB_ID = 0x09U, /*!< USART MspInit callback ID */
|
||||
HAL_USART_MSPDEINIT_CB_ID = 0x0AU /*!< USART MspDeInit callback ID */
|
||||
|
||||
} HAL_USART_CallbackIDTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL USART Callback pointer definition
|
||||
*/
|
||||
typedef void (*pUSART_CallbackTypeDef)(USART_HandleTypeDef *husart); /*!< pointer to an USART callback function */
|
||||
|
||||
#endif /* USE_HAL_USART_REGISTER_CALLBACKS */
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
@ -166,15 +197,18 @@ typedef struct
|
|||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Error USART Error
|
||||
/** @defgroup USART_Error_Definition USART Error Definition
|
||||
* @{
|
||||
*/
|
||||
#define HAL_USART_ERROR_NONE (0x00000000U) /*!< No error */
|
||||
#define HAL_USART_ERROR_PE (0x00000001U) /*!< Parity error */
|
||||
#define HAL_USART_ERROR_NE (0x00000002U) /*!< Noise error */
|
||||
#define HAL_USART_ERROR_FE (0x00000004U) /*!< frame error */
|
||||
#define HAL_USART_ERROR_ORE (0x00000008U) /*!< Overrun error */
|
||||
#define HAL_USART_ERROR_DMA (0x00000010U) /*!< DMA transfer error */
|
||||
#define HAL_USART_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */
|
||||
#define HAL_USART_ERROR_PE ((uint32_t)0x00000001U) /*!< Parity error */
|
||||
#define HAL_USART_ERROR_NE ((uint32_t)0x00000002U) /*!< Noise error */
|
||||
#define HAL_USART_ERROR_FE ((uint32_t)0x00000004U) /*!< Frame error */
|
||||
#define HAL_USART_ERROR_ORE ((uint32_t)0x00000008U) /*!< Overrun error */
|
||||
#define HAL_USART_ERROR_DMA ((uint32_t)0x00000010U) /*!< DMA transfer error */
|
||||
#if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
|
||||
#define HAL_USART_ERROR_INVALID_CALLBACK ((uint32_t)0x00000040U) /*!< Invalid Callback error */
|
||||
#endif /* USE_HAL_USART_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -182,10 +216,10 @@ typedef struct
|
|||
/** @defgroup USART_Stop_Bits USART Number of Stop Bits
|
||||
* @{
|
||||
*/
|
||||
#define USART_STOPBITS_0_5 ((uint32_t)USART_CR2_STOP_0) /*!< USART frame with 0.5 stop bit */
|
||||
#define USART_STOPBITS_1 (0x00000000U) /*!< USART frame with 1 stop bit */
|
||||
#define USART_STOPBITS_1_5 ((uint32_t)(USART_CR2_STOP_0 | USART_CR2_STOP_1)) /*!< USART frame with 1.5 stop bits */
|
||||
#define USART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) /*!< USART frame with 2 stop bits */
|
||||
#define USART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< USART frame with 0.5 stop bit */
|
||||
#define USART_STOPBITS_1 0x00000000U /*!< USART frame with 1 stop bit */
|
||||
#define USART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< USART frame with 1.5 stop bits */
|
||||
#define USART_STOPBITS_2 USART_CR2_STOP_1 /*!< USART frame with 2 stop bits */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -193,9 +227,9 @@ typedef struct
|
|||
/** @defgroup USART_Parity USART Parity
|
||||
* @{
|
||||
*/
|
||||
#define USART_PARITY_NONE (0x00000000U) /*!< No parity */
|
||||
#define USART_PARITY_EVEN ((uint32_t)USART_CR1_PCE) /*!< Even parity */
|
||||
#define USART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) /*!< Odd parity */
|
||||
#define USART_PARITY_NONE 0x00000000U /*!< No parity */
|
||||
#define USART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */
|
||||
#define USART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -203,9 +237,18 @@ typedef struct
|
|||
/** @defgroup USART_Mode USART Mode
|
||||
* @{
|
||||
*/
|
||||
#define USART_MODE_RX ((uint32_t)USART_CR1_RE) /*!< RX mode */
|
||||
#define USART_MODE_TX ((uint32_t)USART_CR1_TE) /*!< TX mode */
|
||||
#define USART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE)) /*!< RX and TX mode */
|
||||
#define USART_MODE_RX USART_CR1_RE /*!< RX mode */
|
||||
#define USART_MODE_TX USART_CR1_TE /*!< TX mode */
|
||||
#define USART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USART_Over_Sampling USART Over Sampling
|
||||
* @{
|
||||
*/
|
||||
#define USART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */
|
||||
#define USART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -213,8 +256,8 @@ typedef struct
|
|||
/** @defgroup USART_Clock USART Clock
|
||||
* @{
|
||||
*/
|
||||
#define USART_CLOCK_DISABLE (0x00000000U) /*!< USART clock disable */
|
||||
#define USART_CLOCK_ENABLE ((uint32_t)USART_CR2_CLKEN) /*!< USART clock enable */
|
||||
#define USART_CLOCK_DISABLE 0x00000000U /*!< USART clock disable */
|
||||
#define USART_CLOCK_ENABLE USART_CR2_CLKEN /*!< USART clock enable */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -222,8 +265,8 @@ typedef struct
|
|||
/** @defgroup USART_Clock_Polarity USART Clock Polarity
|
||||
* @{
|
||||
*/
|
||||
#define USART_POLARITY_LOW (0x00000000U) /*!< USART Clock signal is steady Low */
|
||||
#define USART_POLARITY_HIGH ((uint32_t)USART_CR2_CPOL) /*!< USART Clock signal is steady High */
|
||||
#define USART_POLARITY_LOW 0x00000000U /*!< Driver enable signal is active high */
|
||||
#define USART_POLARITY_HIGH USART_CR2_CPOL /*!< Driver enable signal is active low */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -231,8 +274,8 @@ typedef struct
|
|||
/** @defgroup USART_Clock_Phase USART Clock Phase
|
||||
* @{
|
||||
*/
|
||||
#define USART_PHASE_1EDGE (0x00000000U) /*!< USART frame phase on first clock transition */
|
||||
#define USART_PHASE_2EDGE ((uint32_t)USART_CR2_CPHA) /*!< USART frame phase on second clock transition */
|
||||
#define USART_PHASE_1EDGE 0x00000000U /*!< USART frame phase on first clock transition */
|
||||
#define USART_PHASE_2EDGE USART_CR2_CPHA /*!< USART frame phase on second clock transition */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -240,17 +283,18 @@ typedef struct
|
|||
/** @defgroup USART_Last_Bit USART Last Bit
|
||||
* @{
|
||||
*/
|
||||
#define USART_LASTBIT_DISABLE (0x00000000U) /*!< USART frame last data bit clock pulse not output to SCLK pin */
|
||||
#define USART_LASTBIT_ENABLE ((uint32_t)USART_CR2_LBCL) /*!< USART frame last data bit clock pulse output to SCLK pin */
|
||||
#define USART_LASTBIT_DISABLE 0x00000000U /*!< USART frame last data bit clock pulse not output to SCLK pin */
|
||||
#define USART_LASTBIT_ENABLE USART_CR2_LBCL /*!< USART frame last data bit clock pulse output to SCLK pin */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup USART_Request_Parameters USART Request Parameters
|
||||
* @{
|
||||
*/
|
||||
#define USART_RXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_RXFRQ) /*!< Receive Data flush Request */
|
||||
#define USART_TXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_TXFRQ) /*!< Transmit data flush Request */
|
||||
#define USART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */
|
||||
#define USART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -260,20 +304,20 @@ typedef struct
|
|||
* - 0xXXXX : Flag mask in the ISR register
|
||||
* @{
|
||||
*/
|
||||
#define USART_FLAG_REACK (0x00400000U) /*!< USART receive enable acknowledge flag */
|
||||
#define USART_FLAG_TEACK (0x00200000U) /*!< USART transmit enable acknowledge flag */
|
||||
#define USART_FLAG_BUSY (0x00010000U) /*!< USART busy flag */
|
||||
#define USART_FLAG_CTS (0x00000400U) /*!< USART clear to send flag */
|
||||
#define USART_FLAG_CTSIF (0x00000200U) /*!< USART clear to send interrupt flag */
|
||||
#define USART_FLAG_LBDF (0x00000100U) /*!< USART LIN break detection flag */
|
||||
#define USART_FLAG_TXE (0x00000080U) /*!< USART transmit data register empty */
|
||||
#define USART_FLAG_TC (0x00000040U) /*!< USART transmission complete */
|
||||
#define USART_FLAG_RXNE (0x00000020U) /*!< USART read data register not empty */
|
||||
#define USART_FLAG_IDLE (0x00000010U) /*!< USART idle flag */
|
||||
#define USART_FLAG_ORE (0x00000008U) /*!< USART overrun error */
|
||||
#define USART_FLAG_NE (0x00000004U) /*!< USART noise error */
|
||||
#define USART_FLAG_FE (0x00000002U) /*!< USART frame error */
|
||||
#define USART_FLAG_PE (0x00000001U) /*!< USART parity error */
|
||||
#define USART_FLAG_REACK USART_ISR_REACK /*!< USART receive enable acknowledge flag */
|
||||
#define USART_FLAG_TEACK USART_ISR_TEACK /*!< USART transmit enable acknowledge flag */
|
||||
#define USART_FLAG_BUSY USART_ISR_BUSY /*!< USART busy flag */
|
||||
#define USART_FLAG_CTS USART_ISR_CTS /*!< USART clear to send flag */
|
||||
#define USART_FLAG_CTSIF USART_ISR_CTSIF /*!< USART clear to send interrupt flag */
|
||||
#define USART_FLAG_LBDF USART_ISR_LBDF /*!< USART LIN break detection flag */
|
||||
#define USART_FLAG_TXE USART_ISR_TXE /*!< USART transmit data register empty */
|
||||
#define USART_FLAG_TC USART_ISR_TC /*!< USART transmission complete */
|
||||
#define USART_FLAG_RXNE USART_ISR_RXNE /*!< USART read data register not empty */
|
||||
#define USART_FLAG_IDLE USART_ISR_IDLE /*!< USART idle flag */
|
||||
#define USART_FLAG_ORE USART_ISR_ORE /*!< USART overrun error */
|
||||
#define USART_FLAG_NE USART_ISR_NE /*!< USART noise error */
|
||||
#define USART_FLAG_FE USART_ISR_FE /*!< USART frame error */
|
||||
#define USART_FLAG_PE USART_ISR_PE /*!< USART parity error */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -289,15 +333,16 @@ typedef struct
|
|||
* @{
|
||||
*/
|
||||
|
||||
#define USART_IT_PE ((uint16_t)0x0028U) /*!< USART parity error interruption */
|
||||
#define USART_IT_TXE ((uint16_t)0x0727U) /*!< USART transmit data register empty interruption */
|
||||
#define USART_IT_TC ((uint16_t)0x0626U) /*!< USART transmission complete interruption */
|
||||
#define USART_IT_RXNE ((uint16_t)0x0525U) /*!< USART read data register not empty interruption */
|
||||
#define USART_IT_IDLE ((uint16_t)0x0424U) /*!< USART idle interruption */
|
||||
#define USART_IT_ERR ((uint16_t)0x0060U) /*!< USART error interruption */
|
||||
#define USART_IT_ORE ((uint16_t)0x0300U) /*!< USART overrun error interruption */
|
||||
#define USART_IT_NE ((uint16_t)0x0200U) /*!< USART noise error interruption */
|
||||
#define USART_IT_FE ((uint16_t)0x0100U) /*!< USART frame error interruption */
|
||||
#define USART_IT_PE 0x0028U /*!< USART parity error interruption */
|
||||
#define USART_IT_TXE 0x0727U /*!< USART transmit data register empty interruption */
|
||||
#define USART_IT_TC 0x0626U /*!< USART transmission complete interruption */
|
||||
#define USART_IT_RXNE 0x0525U /*!< USART read data register not empty interruption */
|
||||
#define USART_IT_IDLE 0x0424U /*!< USART idle interruption */
|
||||
#define USART_IT_ERR 0x0060U /*!< USART error interruption */
|
||||
#define USART_IT_ORE 0x0300U /*!< USART overrun error interruption */
|
||||
#define USART_IT_NE 0x0200U /*!< USART noise error interruption */
|
||||
#define USART_IT_FE 0x0100U /*!< USART frame error interruption */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -305,13 +350,13 @@ typedef struct
|
|||
/** @defgroup USART_IT_CLEAR_Flags USART Interruption Clear Flags
|
||||
* @{
|
||||
*/
|
||||
#define USART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */
|
||||
#define USART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */
|
||||
#define USART_CLEAR_NEF USART_ICR_NCF /*!< Noise detected Clear Flag */
|
||||
#define USART_CLEAR_OREF USART_ICR_ORECF /*!< OverRun Error Clear Flag */
|
||||
#define USART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */
|
||||
#define USART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */
|
||||
#define USART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */
|
||||
#define USART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */
|
||||
#define USART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */
|
||||
#define USART_CLEAR_NEF USART_ICR_NCF /*!< Noise Error detected Clear Flag */
|
||||
#define USART_CLEAR_OREF USART_ICR_ORECF /*!< OverRun Error Clear Flag */
|
||||
#define USART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */
|
||||
#define USART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */
|
||||
#define USART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -319,7 +364,11 @@ typedef struct
|
|||
/** @defgroup USART_Interruption_Mask USART Interruption Flags Mask
|
||||
* @{
|
||||
*/
|
||||
#define USART_IT_MASK ((uint16_t)0x001FU) /*!< USART interruptions flags mask */
|
||||
#define USART_IT_MASK 0x001FU /*!< USART interruptions flags mask */
|
||||
#define USART_CR_MASK 0x00E0U /*!< USART control register mask */
|
||||
#define USART_CR_POS 5U /*!< USART control register position */
|
||||
#define USART_ISR_MASK 0x1F00U /*!< USART ISR register mask */
|
||||
#define USART_ISR_POS 8U /*!< USART ISR register position */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -333,21 +382,28 @@ typedef struct
|
|||
* @{
|
||||
*/
|
||||
|
||||
/** @brief Reset USART handle state.
|
||||
/** @brief Reset USART handle state.
|
||||
* @param __HANDLE__ USART handle.
|
||||
* @retval None
|
||||
*/
|
||||
#if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
|
||||
#define __HAL_USART_RESET_HANDLE_STATE(__HANDLE__) do{ \
|
||||
(__HANDLE__)->State = HAL_USART_STATE_RESET; \
|
||||
(__HANDLE__)->MspInitCallback = NULL; \
|
||||
(__HANDLE__)->MspDeInitCallback = NULL; \
|
||||
} while(0U)
|
||||
#else
|
||||
#define __HAL_USART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_USART_STATE_RESET)
|
||||
#endif /* USE_HAL_USART_REGISTER_CALLBACKS */
|
||||
|
||||
/** @brief Flush the USART Data registers.
|
||||
/** @brief Flush the USART Data registers
|
||||
* @param __HANDLE__ specifies the USART Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_USART_FLUSH_DRREGISTER(__HANDLE__) \
|
||||
do{ \
|
||||
SET_BIT((__HANDLE__)->Instance->RQR, USART_RXDATA_FLUSH_REQUEST); \
|
||||
SET_BIT((__HANDLE__)->Instance->RQR, USART_TXDATA_FLUSH_REQUEST); \
|
||||
} while(0U)
|
||||
#define __HAL_USART_FLUSH_DRREGISTER(__HANDLE__) \
|
||||
do{ \
|
||||
SET_BIT((__HANDLE__)->Instance->RQR, USART_RXDATA_FLUSH_REQUEST); \
|
||||
SET_BIT((__HANDLE__)->Instance->RQR, USART_TXDATA_FLUSH_REQUEST); \
|
||||
} while(0U)
|
||||
|
||||
/** @brief Check whether the specified USART flag is set or not.
|
||||
* @param __HANDLE__ specifies the USART Handle
|
||||
|
@ -373,12 +429,12 @@ typedef struct
|
|||
* @param __HANDLE__ specifies the USART Handle.
|
||||
* @param __FLAG__ specifies the flag to check.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg @ref USART_CLEAR_PEF
|
||||
* @arg @ref USART_CLEAR_FEF
|
||||
* @arg @ref USART_CLEAR_NEF
|
||||
* @arg @ref USART_CLEAR_OREF
|
||||
* @arg @ref USART_CLEAR_IDLEF
|
||||
* @arg @ref USART_CLEAR_TCF
|
||||
* @arg @ref USART_CLEAR_PEF Parity Error Clear Flag
|
||||
* @arg @ref USART_CLEAR_FEF Framing Error Clear Flag
|
||||
* @arg @ref USART_CLEAR_NEF Noise detected Clear Flag
|
||||
* @arg @ref USART_CLEAR_OREF Overrun Error Clear Flag
|
||||
* @arg @ref USART_CLEAR_IDLEF IDLE line detected Clear Flag
|
||||
* @arg @ref USART_CLEAR_TCF Transmission Complete Clear Flag
|
||||
* @arg @ref USART_CLEAR_CTSF
|
||||
* @retval None
|
||||
*/
|
||||
|
@ -414,72 +470,75 @@ typedef struct
|
|||
*/
|
||||
#define __HAL_USART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_IDLEF)
|
||||
|
||||
|
||||
|
||||
/** @brief Enable the specified USART interrupt.
|
||||
* @param __HANDLE__ specifies the USART Handle.
|
||||
* @param __INTERRUPT__ specifies the USART interrupt source to enable.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg @ref USART_IT_TXE Transmit Data Register empty interrupt
|
||||
* @arg @ref USART_IT_TC Transmission complete interrupt
|
||||
* @arg @ref USART_IT_RXNE Receive Data register not empty interrupt
|
||||
* @arg @ref USART_IT_IDLE Idle line detection interrupt
|
||||
* @arg @ref USART_IT_PE Parity Error interrupt
|
||||
* @arg @ref USART_IT_ERR Error interrupt(Frame error, noise error, overrun error)
|
||||
* @arg @ref USART_IT_TXE Transmit Data Register empty interrupt
|
||||
* @arg @ref USART_IT_TC Transmission complete interrupt
|
||||
* @arg @ref USART_IT_RXNE Receive Data register not empty interrupt
|
||||
* @arg @ref USART_IT_IDLE Idle line detection interrupt
|
||||
* @arg @ref USART_IT_PE Parity Error interrupt
|
||||
* @arg @ref USART_IT_ERR Error interrupt(Frame error, noise error, overrun error)
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_USART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((__INTERRUPT__) & 0xFFU) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
|
||||
((((__INTERRUPT__) & 0xFFU) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
|
||||
((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))))
|
||||
#define __HAL_USART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((__INTERRUPT__) & USART_CR_MASK) >> USART_CR_POS) == 1U)? ((__HANDLE__)->Instance->CR1 |= ((uint32_t)1U << ((__INTERRUPT__) & USART_IT_MASK))): \
|
||||
((((__INTERRUPT__) & USART_CR_MASK) >> USART_CR_POS) == 2U)? ((__HANDLE__)->Instance->CR2 |= ((uint32_t)1U << ((__INTERRUPT__) & USART_IT_MASK))): \
|
||||
((__HANDLE__)->Instance->CR3 |= ((uint32_t)1U << ((__INTERRUPT__) & USART_IT_MASK))))
|
||||
|
||||
/** @brief Disable the specified USART interrupt.
|
||||
* @param __HANDLE__ specifies the USART Handle.
|
||||
* @param __INTERRUPT__ specifies the USART interrupt source to disable.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg @ref USART_IT_TXE Transmit Data Register empty interrupt
|
||||
* @arg @ref USART_IT_TC Transmission complete interrupt
|
||||
* @arg @ref USART_IT_RXNE Receive Data register not empty interrupt
|
||||
* @arg @ref USART_IT_IDLE Idle line detection interrupt
|
||||
* @arg @ref USART_IT_PE Parity Error interrupt
|
||||
* @arg @ref USART_IT_ERR Error interrupt(Frame error, noise error, overrun error)
|
||||
* @arg @ref USART_IT_TXE Transmit Data Register empty interrupt
|
||||
* @arg @ref USART_IT_TC Transmission complete interrupt
|
||||
* @arg @ref USART_IT_RXNE Receive Data register not empty interrupt
|
||||
* @arg @ref USART_IT_IDLE Idle line detection interrupt
|
||||
* @arg @ref USART_IT_PE Parity Error interrupt
|
||||
* @arg @ref USART_IT_ERR Error interrupt(Frame error, noise error, overrun error)
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_USART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((__INTERRUPT__) & 0xFFU) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
|
||||
((((__INTERRUPT__) & 0xFFU) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
|
||||
((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))))
|
||||
#define __HAL_USART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((__INTERRUPT__) & USART_CR_MASK) >> USART_CR_POS) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ ((uint32_t)1U << ((__INTERRUPT__) & USART_IT_MASK))): \
|
||||
((((__INTERRUPT__) & USART_CR_MASK) >> USART_CR_POS) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ ((uint32_t)1U << ((__INTERRUPT__) & USART_IT_MASK))): \
|
||||
((__HANDLE__)->Instance->CR3 &= ~ ((uint32_t)1U << ((__INTERRUPT__) & USART_IT_MASK))))
|
||||
|
||||
|
||||
/** @brief Check whether the specified USART interrupt has occurred or not.
|
||||
* @param __HANDLE__ specifies the USART Handle.
|
||||
* @param __IT__ specifies the USART interrupt source to check.
|
||||
* @param __INTERRUPT__ specifies the USART interrupt source to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg @ref USART_IT_TXE Transmit Data Register empty interrupt
|
||||
* @arg @ref USART_IT_TC Transmission complete interrupt
|
||||
* @arg @ref USART_IT_RXNE Receive Data register not empty interrupt
|
||||
* @arg @ref USART_IT_IDLE Idle line detection interrupt
|
||||
* @arg @ref USART_IT_ORE OverRun Error interrupt
|
||||
* @arg @ref USART_IT_NE Noise Error interrupt
|
||||
* @arg @ref USART_IT_FE Framing Error interrupt
|
||||
* @arg @ref USART_IT_PE Parity Error interrupt
|
||||
* @retval The new state of __IT__ (TRUE or FALSE).
|
||||
* @arg @ref USART_IT_TXE Transmit Data Register empty interrupt
|
||||
* @arg @ref USART_IT_TC Transmission complete interrupt
|
||||
* @arg @ref USART_IT_RXNE Receive Data register not empty interrupt
|
||||
* @arg @ref USART_IT_IDLE Idle line detection interrupt
|
||||
* @arg @ref USART_IT_ORE OverRun Error interrupt
|
||||
* @arg @ref USART_IT_NE Noise Error interrupt
|
||||
* @arg @ref USART_IT_FE Framing Error interrupt
|
||||
* @arg @ref USART_IT_PE Parity Error interrupt
|
||||
* @retval The new state of __INTERRUPT__ (SET or RESET).
|
||||
*/
|
||||
#define __HAL_USART_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & (1U << ((__IT__)>> 0x08U)))
|
||||
#define __HAL_USART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR\
|
||||
& ((uint32_t)0x01U << (((__INTERRUPT__) & USART_ISR_MASK)>> USART_ISR_POS))) != 0U) ? SET : RESET)
|
||||
|
||||
/** @brief Check whether the specified USART interrupt source is enabled or not.
|
||||
* @param __HANDLE__ specifies the USART Handle.
|
||||
* @param __IT__ specifies the USART interrupt source to check.
|
||||
* @param __INTERRUPT__ specifies the USART interrupt source to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg @ref USART_IT_TXE Transmit Data Register empty interrupt
|
||||
* @arg @ref USART_IT_TC Transmission complete interrupt
|
||||
* @arg @ref USART_IT_RXNE Receive Data register not empty interrupt
|
||||
* @arg @ref USART_IT_IDLE Idle line detection interrupt
|
||||
* @arg @ref USART_IT_ORE OverRun Error interrupt
|
||||
* @arg @ref USART_IT_NE Noise Error interrupt
|
||||
* @arg @ref USART_IT_FE Framing Error interrupt
|
||||
* @arg @ref USART_IT_PE Parity Error interrupt
|
||||
* @retval The new state of __IT__ (TRUE or FALSE).
|
||||
* @arg @ref USART_IT_TXE Transmit Data Register empty interrupt
|
||||
* @arg @ref USART_IT_TC Transmission complete interrupt
|
||||
* @arg @ref USART_IT_RXNE Receive Data register not empty interrupt
|
||||
* @arg @ref USART_IT_IDLE Idle line detection interrupt
|
||||
* @arg @ref USART_IT_ORE OverRun Error interrupt
|
||||
* @arg @ref USART_IT_NE Noise Error interrupt
|
||||
* @arg @ref USART_IT_FE Framing Error interrupt
|
||||
* @arg @ref USART_IT_PE Parity Error interrupt
|
||||
* @retval The new state of __INTERRUPT__ (SET or RESET).
|
||||
*/
|
||||
#define __HAL_USART_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5U) == 1U)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5U) == 2U)? \
|
||||
(__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (1U << \
|
||||
(((uint16_t)(__IT__)) & USART_IT_MASK)))
|
||||
#define __HAL_USART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 0x05U) == 0x01U) ? (__HANDLE__)->Instance->CR1 : \
|
||||
(((((uint8_t)(__INTERRUPT__)) >> 0x05U) == 0x02U) ? (__HANDLE__)->Instance->CR2 : \
|
||||
(__HANDLE__)->Instance->CR3)) & (0x01U << (((uint16_t)(__INTERRUPT__)) & USART_IT_MASK))) != 0U) ? SET : RESET)
|
||||
|
||||
|
||||
/** @brief Clear the specified USART ISR flag, in setting the proper ICR register flag.
|
||||
|
@ -487,12 +546,12 @@ typedef struct
|
|||
* @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set
|
||||
* to clear the corresponding interrupt.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg @ref USART_CLEAR_PEF Parity Error Clear Flag
|
||||
* @arg @ref USART_CLEAR_FEF Framing Error Clear Flag
|
||||
* @arg @ref USART_CLEAR_NEF Noise detected Clear Flag
|
||||
* @arg @ref USART_CLEAR_OREF OverRun Error Clear Flag
|
||||
* @arg @ref USART_CLEAR_IDLEF IDLE line detected Clear Flag
|
||||
* @arg @ref USART_CLEAR_TCF Transmission Complete Clear Flag
|
||||
* @arg @ref USART_CLEAR_PEF Parity Error Clear Flag
|
||||
* @arg @ref USART_CLEAR_FEF Framing Error Clear Flag
|
||||
* @arg @ref USART_CLEAR_NEF Noise detected Clear Flag
|
||||
* @arg @ref USART_CLEAR_OREF Overrun Error Clear Flag
|
||||
* @arg @ref USART_CLEAR_IDLEF IDLE line detected Clear Flag
|
||||
* @arg @ref USART_CLEAR_TCF Transmission Complete Clear Flag
|
||||
* @arg @ref USART_CLEAR_CTSF CTS Interrupt Clear Flag
|
||||
* @retval None
|
||||
*/
|
||||
|
@ -507,7 +566,7 @@ typedef struct
|
|||
*
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_USART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (__REQ__))
|
||||
#define __HAL_USART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__))
|
||||
|
||||
/** @brief Enable the USART one bit sample method.
|
||||
* @param __HANDLE__ specifies the USART Handle.
|
||||
|
@ -519,19 +578,19 @@ typedef struct
|
|||
* @param __HANDLE__ specifies the USART Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_USART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_ONEBIT))
|
||||
#define __HAL_USART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT)
|
||||
|
||||
/** @brief Enable USART.
|
||||
* @param __HANDLE__ specifies the USART Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_USART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
|
||||
#define __HAL_USART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
|
||||
|
||||
/** @brief Disable USART.
|
||||
* @param __HANDLE__ specifies the USART Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_USART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
|
||||
#define __HAL_USART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
@ -542,13 +601,19 @@ typedef struct
|
|||
* @{
|
||||
*/
|
||||
|
||||
/** @brief BRR division operation to set BRR register in 8-bit oversampling mode.
|
||||
* @param __PCLK__ USART clock.
|
||||
* @param __BAUD__ Baud rate set by the user.
|
||||
* @retval Division result
|
||||
*/
|
||||
#define USART_DIV_SAMPLING8(__PCLK__, __BAUD__) ((((__PCLK__)*2U) + ((__BAUD__)/2U)) / (__BAUD__))
|
||||
|
||||
/** @brief Check USART Baud rate.
|
||||
* @param __BAUDRATE__ Baudrate specified by the user.
|
||||
* The maximum Baud Rate is derived from the maximum clock on F3 (i.e. 72 MHz)
|
||||
* divided by the smallest oversampling used on the USART (i.e. 8).
|
||||
* @retval Test result (TRUE or FALSE).
|
||||
*/
|
||||
#define IS_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 9000001U)
|
||||
* divided by the smallest oversampling used on the USART (i.e. 8)
|
||||
* @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid) */
|
||||
#define IS_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 9000000U)
|
||||
|
||||
/**
|
||||
* @brief Ensure that USART frame number of stop bits is valid.
|
||||
|
@ -576,6 +641,14 @@ typedef struct
|
|||
*/
|
||||
#define IS_USART_MODE(__MODE__) ((((__MODE__) & 0xFFFFFFF3U) == 0x00U) && ((__MODE__) != 0x00U))
|
||||
|
||||
/**
|
||||
* @brief Ensure that USART oversampling is valid.
|
||||
* @param __SAMPLING__ USART oversampling.
|
||||
* @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid)
|
||||
*/
|
||||
#define IS_USART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == USART_OVERSAMPLING_16) || \
|
||||
((__SAMPLING__) == USART_OVERSAMPLING_8))
|
||||
|
||||
/**
|
||||
* @brief Ensure that USART clock state is valid.
|
||||
* @param __CLOCK__ USART clock state.
|
||||
|
@ -636,6 +709,13 @@ HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart);
|
|||
void HAL_USART_MspInit(USART_HandleTypeDef *husart);
|
||||
void HAL_USART_MspDeInit(USART_HandleTypeDef *husart);
|
||||
|
||||
/* Callbacks Register/UnRegister functions ***********************************/
|
||||
#if (USE_HAL_USART_REGISTER_CALLBACKS == 1)
|
||||
HAL_StatusTypeDef HAL_USART_RegisterCallback(USART_HandleTypeDef *husart, HAL_USART_CallbackIDTypeDef CallbackID,
|
||||
pUSART_CallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_USART_UnRegisterCallback(USART_HandleTypeDef *husart, HAL_USART_CallbackIDTypeDef CallbackID);
|
||||
#endif /* USE_HAL_USART_REGISTER_CALLBACKS */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -647,13 +727,16 @@ void HAL_USART_MspDeInit(USART_HandleTypeDef *husart);
|
|||
/* IO operation functions *****************************************************/
|
||||
HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData,
|
||||
uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData,
|
||||
uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData,
|
||||
uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart);
|
||||
HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart);
|
||||
HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart);
|
||||
|
@ -662,21 +745,19 @@ HAL_StatusTypeDef HAL_USART_Abort(USART_HandleTypeDef *husart);
|
|||
HAL_StatusTypeDef HAL_USART_Abort_IT(USART_HandleTypeDef *husart);
|
||||
|
||||
void HAL_USART_IRQHandler(USART_HandleTypeDef *husart);
|
||||
void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart);
|
||||
void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart);
|
||||
void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart);
|
||||
void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart);
|
||||
void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart);
|
||||
void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart);
|
||||
void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart);
|
||||
void HAL_USART_AbortCpltCallback (USART_HandleTypeDef *husart);
|
||||
void HAL_USART_AbortCpltCallback(USART_HandleTypeDef *husart);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Peripheral Control functions ***********************************************/
|
||||
|
||||
/** @addtogroup USART_Exported_Functions_Group3 Peripheral State and Error functions
|
||||
/** @addtogroup USART_Exported_Functions_Group4 Peripheral State and Error functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
@ -704,7 +785,6 @@ uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart);
|
|||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F3xx_HAL_USART_H */
|
||||
#endif /* STM32F3xx_HAL_USART_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
||||
|
|
|
@ -6,39 +6,23 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_HAL_USART_EX_H
|
||||
#define __STM32F3xx_HAL_USART_EX_H
|
||||
#ifndef STM32F3xx_HAL_USART_EX_H
|
||||
#define STM32F3xx_HAL_USART_EX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
|
@ -61,22 +45,19 @@
|
|||
/** @defgroup USARTEx_Word_Length USARTEx Word Length
|
||||
* @{
|
||||
*/
|
||||
#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
|
||||
defined(STM32F334x8) || \
|
||||
defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
|
||||
#if defined(USART_CR1_M0)&& defined(USART_CR1_M1)
|
||||
#define USART_WORDLENGTH_7B ((uint32_t)USART_CR1_M1) /*!< 7-bit long USART frame */
|
||||
#define USART_WORDLENGTH_8B (0x00000000U) /*!< 8-bit long USART frame */
|
||||
#define USART_WORDLENGTH_9B ((uint32_t)USART_CR1_M0) /*!< 9-bit long USART frame */
|
||||
#else
|
||||
#elif defined(USART_CR1_M)
|
||||
#define USART_WORDLENGTH_8B (0x00000000U) /*!< 8-bit long USART frame */
|
||||
#define USART_WORDLENGTH_9B ((uint32_t)USART_CR1_M) /*!< 9-bit long USART frame */
|
||||
#endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
|
||||
/* STM32F334x8 || */
|
||||
/* STM32F301x8 || STM32F302x8 || STM32F318xx */
|
||||
#endif
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -91,117 +72,191 @@
|
|||
* @param __CLOCKSOURCE__ output variable.
|
||||
* @retval the USART clocking source, written in __CLOCKSOURCE__.
|
||||
*/
|
||||
#if defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
|
||||
defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
|
||||
/** @brief Report the USART clock source.
|
||||
* @param __HANDLE__ specifies the USART Handle.
|
||||
* @param __CLOCKSOURCE__ output variable.
|
||||
* @retval USART clocking source, written in __CLOCKSOURCE__.
|
||||
*/
|
||||
#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx)
|
||||
#define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
|
||||
do { \
|
||||
if((__HANDLE__)->Instance == USART1) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART1_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART1CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_HSI: \
|
||||
do { \
|
||||
if((__HANDLE__)->Instance == USART1) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART1_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART1CLKSOURCE_PCLK2: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK2; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_SYSCLK: \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_LSE: \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == USART2) \
|
||||
{ \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == USART3) \
|
||||
{ \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == USART2) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART2_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART2CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == USART3) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART3_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART3CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_USART3CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART3CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART3CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
|
||||
} \
|
||||
} \
|
||||
} while(0U)
|
||||
#elif defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
|
||||
#define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
|
||||
do { \
|
||||
if((__HANDLE__)->Instance == USART1) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART1_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART1CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == USART2) \
|
||||
{ \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == USART3) \
|
||||
{ \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
|
||||
} \
|
||||
} while(0U)
|
||||
#else
|
||||
#define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
|
||||
do { \
|
||||
if((__HANDLE__)->Instance == USART1) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART1_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART1CLKSOURCE_PCLK2: \
|
||||
do { \
|
||||
if((__HANDLE__)->Instance == USART1) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART1_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART1CLKSOURCE_PCLK2: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK2; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_HSI: \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_SYSCLK: \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_LSE: \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == USART2) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART2_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART2CLKSOURCE_PCLK1: \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == USART2) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART2_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART2CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_HSI: \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_SYSCLK: \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_LSE: \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == USART3) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART3_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART3CLKSOURCE_PCLK1: \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == USART3) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART3_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART3CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_USART3CLKSOURCE_HSI: \
|
||||
break; \
|
||||
case RCC_USART3CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART3CLKSOURCE_SYSCLK: \
|
||||
break; \
|
||||
case RCC_USART3CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART3CLKSOURCE_LSE: \
|
||||
break; \
|
||||
case RCC_USART3CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
|
||||
} \
|
||||
} \
|
||||
} while(0U)
|
||||
#endif /* STM32F303x8 || STM32F334x8 || STM32F328xx */
|
||||
|
||||
#endif /* STM32F302xE || STM32F303xE || STM32F398xx || STM32F302xC || STM32F303xC || STM32F358xx */
|
||||
/** @brief Compute the USART mask to apply to retrieve the received data
|
||||
* according to the word length and to the parity bits activation.
|
||||
* @note If PCE = 1, the parity bit is not included in the data extracted
|
||||
|
@ -211,98 +266,126 @@
|
|||
* @param __HANDLE__ specifies the USART Handle.
|
||||
* @retval None, the mask to apply to USART RDR register is stored in (__HANDLE__)->Mask field.
|
||||
*/
|
||||
#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
|
||||
defined(STM32F334x8) || \
|
||||
defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
|
||||
#if defined(USART_CR1_M0)&& defined(USART_CR1_M1)
|
||||
#define USART_MASK_COMPUTATION(__HANDLE__) \
|
||||
do { \
|
||||
if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_9B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x01FFU ; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x00FFU ; \
|
||||
} \
|
||||
} \
|
||||
else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_8B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x00FFU ; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x007FU ; \
|
||||
} \
|
||||
} \
|
||||
else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_7B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x007FU ; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x003FU ; \
|
||||
} \
|
||||
} \
|
||||
} while(0U)
|
||||
#else
|
||||
if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_9B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x01FFU; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x00FFU; \
|
||||
} \
|
||||
} \
|
||||
else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_8B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x00FFU; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x007FU; \
|
||||
} \
|
||||
} \
|
||||
else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_7B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x007FU; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x003FU; \
|
||||
} \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x0000U; \
|
||||
} \
|
||||
} while(0U)
|
||||
#elif defined(USART_CR1_M)
|
||||
#define USART_MASK_COMPUTATION(__HANDLE__) \
|
||||
do { \
|
||||
if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_9B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x01FFU ; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x00FFU ; \
|
||||
} \
|
||||
} \
|
||||
else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_8B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x00FFU ; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x007FU ; \
|
||||
} \
|
||||
} \
|
||||
} while(0U)
|
||||
#endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
|
||||
/* STM32F334x8 || */
|
||||
/* STM32F301x8 || STM32F302x8 || STM32F318xx */
|
||||
|
||||
if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_9B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x01FFU; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x00FFU; \
|
||||
} \
|
||||
} \
|
||||
else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_8B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x00FFU; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x007FU; \
|
||||
} \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x0000U; \
|
||||
} \
|
||||
} while(0U)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Ensure that USART frame length is valid.
|
||||
* @param __LENGTH__ USART frame length.
|
||||
* @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
|
||||
*/
|
||||
#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
|
||||
defined(STM32F334x8) || \
|
||||
defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
|
||||
#if defined(USART_CR1_M0)&& defined(USART_CR1_M1)
|
||||
#define IS_USART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == USART_WORDLENGTH_7B) || \
|
||||
((__LENGTH__) == USART_WORDLENGTH_8B) || \
|
||||
((__LENGTH__) == USART_WORDLENGTH_9B))
|
||||
#else
|
||||
#elif defined(USART_CR1_M)
|
||||
#define IS_USART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == USART_WORDLENGTH_8B) || \
|
||||
((__LENGTH__) == USART_WORDLENGTH_9B))
|
||||
#endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
|
||||
/* STM32F334x8 || */
|
||||
/* STM32F301x8 || STM32F302x8 || STM32F318xx */
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @addtogroup USARTEx_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup USARTEx_Exported_Functions_Group1
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* IO operation functions *****************************************************/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup USARTEx_Exported_Functions_Group2
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Peripheral Control functions ***********************************************/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
@ -316,7 +399,6 @@
|
|||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F3xx_HAL_USART_EX_H */
|
||||
#endif /* STM32F3xx_HAL_USART_EX_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
||||
|
|
|
@ -6,39 +6,23 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_HAL_WWDG_H
|
||||
#define __STM32F3xx_HAL_WWDG_H
|
||||
#ifndef STM32F3xx_HAL_WWDG_H
|
||||
#define STM32F3xx_HAL_WWDG_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
|
@ -67,26 +51,52 @@ typedef struct
|
|||
This parameter can be a value of @ref WWDG_Prescaler */
|
||||
|
||||
uint32_t Window; /*!< Specifies the WWDG window value to be compared to the downcounter.
|
||||
This parameter must be a number Min_Data = 0x40 and Max_Data = 0x7FU */
|
||||
This parameter must be a number Min_Data = 0x40 and Max_Data = 0x7F */
|
||||
|
||||
uint32_t Counter; /*!< Specifies the WWDG free-running downcounter value.
|
||||
This parameter must be a number between Min_Data = 0x40 and Max_Data = 0x7FU */
|
||||
This parameter must be a number between Min_Data = 0x40 and Max_Data = 0x7F */
|
||||
|
||||
uint32_t EWIMode ; /*!< Specifies if WWDG Early Wakeup Interupt is enable or not.
|
||||
This parameter can be a value of @ref WWDG_EWI_Mode */
|
||||
|
||||
}WWDG_InitTypeDef;
|
||||
} WWDG_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief WWDG handle Structure definition
|
||||
*/
|
||||
#if (USE_HAL_WWDG_REGISTER_CALLBACKS == 1)
|
||||
typedef struct __WWDG_HandleTypeDef
|
||||
#else
|
||||
typedef struct
|
||||
#endif
|
||||
{
|
||||
WWDG_TypeDef *Instance; /*!< Register base address */
|
||||
WWDG_TypeDef *Instance; /*!< Register base address */
|
||||
|
||||
WWDG_InitTypeDef Init; /*!< WWDG required parameters */
|
||||
WWDG_InitTypeDef Init; /*!< WWDG required parameters */
|
||||
|
||||
}WWDG_HandleTypeDef;
|
||||
#if (USE_HAL_WWDG_REGISTER_CALLBACKS == 1)
|
||||
void (* EwiCallback)(struct __WWDG_HandleTypeDef *hwwdg); /*!< WWDG Early WakeUp Interrupt callback */
|
||||
|
||||
void (* MspInitCallback)(struct __WWDG_HandleTypeDef *hwwdg); /*!< WWDG Msp Init callback */
|
||||
#endif
|
||||
} WWDG_HandleTypeDef;
|
||||
|
||||
#if (USE_HAL_WWDG_REGISTER_CALLBACKS == 1)
|
||||
/**
|
||||
* @brief HAL WWDG common Callback ID enumeration definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_WWDG_EWI_CB_ID = 0x00u, /*!< WWDG EWI callback ID */
|
||||
HAL_WWDG_MSPINIT_CB_ID = 0x01u, /*!< WWDG MspInit callback ID */
|
||||
} HAL_WWDG_CallbackIDTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL WWDG Callback pointer definition
|
||||
*/
|
||||
typedef void (*pWWDG_CallbackTypeDef)(WWDG_HandleTypeDef *hppp); /*!< pointer to a WWDG common callback functions */
|
||||
|
||||
#endif
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -117,10 +127,10 @@ typedef struct
|
|||
/** @defgroup WWDG_Prescaler WWDG Prescaler
|
||||
* @{
|
||||
*/
|
||||
#define WWDG_PRESCALER_1 0x00000000u /*!< WWDG counter clock = (PCLK1/4096U)/1U */
|
||||
#define WWDG_PRESCALER_2 WWDG_CFR_WDGTB_0 /*!< WWDG counter clock = (PCLK1/4096U)/2U */
|
||||
#define WWDG_PRESCALER_4 WWDG_CFR_WDGTB_1 /*!< WWDG counter clock = (PCLK1/4096U)/4U */
|
||||
#define WWDG_PRESCALER_8 WWDG_CFR_WDGTB /*!< WWDG counter clock = (PCLK1/4096U)/8U */
|
||||
#define WWDG_PRESCALER_1 0x00000000u /*!< WWDG counter clock = (PCLK1/4096)/1 */
|
||||
#define WWDG_PRESCALER_2 WWDG_CFR_WDGTB_0 /*!< WWDG counter clock = (PCLK1/4096)/2 */
|
||||
#define WWDG_PRESCALER_4 WWDG_CFR_WDGTB_1 /*!< WWDG counter clock = (PCLK1/4096)/4 */
|
||||
#define WWDG_PRESCALER_8 (WWDG_CFR_WDGTB_1 | WWDG_CFR_WDGTB_0) /*!< WWDG counter clock = (PCLK1/4096)/8 */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -143,9 +153,9 @@ typedef struct
|
|||
/** @defgroup WWDG_Private_Macros WWDG Private Macros
|
||||
* @{
|
||||
*/
|
||||
#define IS_WWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == WWDG_PRESCALER_1) || \
|
||||
((__PRESCALER__) == WWDG_PRESCALER_2) || \
|
||||
((__PRESCALER__) == WWDG_PRESCALER_4) || \
|
||||
#define IS_WWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == WWDG_PRESCALER_1) || \
|
||||
((__PRESCALER__) == WWDG_PRESCALER_2) || \
|
||||
((__PRESCALER__) == WWDG_PRESCALER_4) || \
|
||||
((__PRESCALER__) == WWDG_PRESCALER_8))
|
||||
|
||||
#define IS_WWDG_WINDOW(__WINDOW__) (((__WINDOW__) >= WWDG_CFR_W_6) && ((__WINDOW__) <= WWDG_CFR_W))
|
||||
|
@ -174,7 +184,7 @@ typedef struct
|
|||
|
||||
/**
|
||||
* @brief Enable the WWDG early wakeup interrupt.
|
||||
* @param __HANDLE__ WWDG handle
|
||||
* @param __HANDLE__: WWDG handle
|
||||
* @param __INTERRUPT__ specifies the interrupt to enable.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg WWDG_IT_EWI: Early wakeup interrupt
|
||||
|
@ -229,7 +239,8 @@ typedef struct
|
|||
* @arg WWDG_IT_EWI: Early Wakeup Interrupt
|
||||
* @retval state of __INTERRUPT__ (TRUE or FALSE).
|
||||
*/
|
||||
#define __HAL_WWDG_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CFR & (__INTERRUPT__)) == (__INTERRUPT__))
|
||||
#define __HAL_WWDG_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CFR\
|
||||
& (__INTERRUPT__)) == (__INTERRUPT__))
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
@ -247,6 +258,12 @@ typedef struct
|
|||
/* Initialization/de-initialization functions **********************************/
|
||||
HAL_StatusTypeDef HAL_WWDG_Init(WWDG_HandleTypeDef *hwwdg);
|
||||
void HAL_WWDG_MspInit(WWDG_HandleTypeDef *hwwdg);
|
||||
/* Callbacks Register/UnRegister functions ***********************************/
|
||||
#if (USE_HAL_WWDG_REGISTER_CALLBACKS == 1)
|
||||
HAL_StatusTypeDef HAL_WWDG_RegisterCallback(WWDG_HandleTypeDef *hwwdg, HAL_WWDG_CallbackIDTypeDef CallbackID, pWWDG_CallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_WWDG_UnRegisterCallback(WWDG_HandleTypeDef *hwwdg, HAL_WWDG_CallbackIDTypeDef CallbackID);
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -257,7 +274,7 @@ void HAL_WWDG_MspInit(WWDG_HandleTypeDef *hwwdg);
|
|||
/* I/O operation functions ******************************************************/
|
||||
HAL_StatusTypeDef HAL_WWDG_Refresh(WWDG_HandleTypeDef *hwwdg);
|
||||
void HAL_WWDG_IRQHandler(WWDG_HandleTypeDef *hwwdg);
|
||||
void HAL_WWDG_EarlyWakeupCallback(WWDG_HandleTypeDef* hwwdg);
|
||||
void HAL_WWDG_EarlyWakeupCallback(WWDG_HandleTypeDef *hwwdg);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -278,6 +295,6 @@ void HAL_WWDG_EarlyWakeupCallback(WWDG_HandleTypeDef* hwwdg);
|
|||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F3xx_HAL_WWDG_H */
|
||||
#endif /* STM32F3xx_HAL_WWDG_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
|
@ -6,29 +6,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
@ -271,25 +255,25 @@ extern "C" {
|
|||
|
||||
/* Definition of channels ID bitfield information to be inserted into */
|
||||
/* channels literals definition. */
|
||||
#define ADC_CHANNEL_0_BITFIELD (ADC_AWD2CR_AWD2CH_0)
|
||||
#define ADC_CHANNEL_1_BITFIELD (ADC_AWD2CR_AWD2CH_1)
|
||||
#define ADC_CHANNEL_2_BITFIELD (ADC_AWD2CR_AWD2CH_2)
|
||||
#define ADC_CHANNEL_3_BITFIELD (ADC_AWD2CR_AWD2CH_3)
|
||||
#define ADC_CHANNEL_4_BITFIELD (ADC_AWD2CR_AWD2CH_4)
|
||||
#define ADC_CHANNEL_5_BITFIELD (ADC_AWD2CR_AWD2CH_5)
|
||||
#define ADC_CHANNEL_6_BITFIELD (ADC_AWD2CR_AWD2CH_6)
|
||||
#define ADC_CHANNEL_7_BITFIELD (ADC_AWD2CR_AWD2CH_7)
|
||||
#define ADC_CHANNEL_8_BITFIELD (ADC_AWD2CR_AWD2CH_8)
|
||||
#define ADC_CHANNEL_9_BITFIELD (ADC_AWD2CR_AWD2CH_9)
|
||||
#define ADC_CHANNEL_10_BITFIELD (ADC_AWD2CR_AWD2CH_10)
|
||||
#define ADC_CHANNEL_11_BITFIELD (ADC_AWD2CR_AWD2CH_11)
|
||||
#define ADC_CHANNEL_12_BITFIELD (ADC_AWD2CR_AWD2CH_12)
|
||||
#define ADC_CHANNEL_13_BITFIELD (ADC_AWD2CR_AWD2CH_13)
|
||||
#define ADC_CHANNEL_14_BITFIELD (ADC_AWD2CR_AWD2CH_14)
|
||||
#define ADC_CHANNEL_15_BITFIELD (ADC_AWD2CR_AWD2CH_15)
|
||||
#define ADC_CHANNEL_16_BITFIELD (ADC_AWD2CR_AWD2CH_16)
|
||||
#define ADC_CHANNEL_17_BITFIELD (ADC_AWD2CR_AWD2CH_17)
|
||||
#define ADC_CHANNEL_18_BITFIELD (ADC_AWD2CR_AWD2CH_18)
|
||||
#define ADC_CHANNEL_0_BITFIELD 0x00000001UL
|
||||
#define ADC_CHANNEL_1_BITFIELD 0x00000002UL
|
||||
#define ADC_CHANNEL_2_BITFIELD 0x00000004UL
|
||||
#define ADC_CHANNEL_3_BITFIELD 0x00000008UL
|
||||
#define ADC_CHANNEL_4_BITFIELD 0x00000010UL
|
||||
#define ADC_CHANNEL_5_BITFIELD 0x00000020UL
|
||||
#define ADC_CHANNEL_6_BITFIELD 0x00000040UL
|
||||
#define ADC_CHANNEL_7_BITFIELD 0x00000080UL
|
||||
#define ADC_CHANNEL_8_BITFIELD 0x00000100UL
|
||||
#define ADC_CHANNEL_9_BITFIELD 0x00000200UL
|
||||
#define ADC_CHANNEL_10_BITFIELD 0x00000400UL
|
||||
#define ADC_CHANNEL_11_BITFIELD 0x00000800UL
|
||||
#define ADC_CHANNEL_12_BITFIELD 0x00001000UL
|
||||
#define ADC_CHANNEL_13_BITFIELD 0x00002000UL
|
||||
#define ADC_CHANNEL_14_BITFIELD 0x00004000UL
|
||||
#define ADC_CHANNEL_15_BITFIELD 0x00008000UL
|
||||
#define ADC_CHANNEL_16_BITFIELD 0x00010000UL
|
||||
#define ADC_CHANNEL_17_BITFIELD 0x00020000UL
|
||||
#define ADC_CHANNEL_18_BITFIELD 0x00040000UL
|
||||
|
||||
/* Definition of channels sampling time information to be inserted into */
|
||||
/* channels literals definition. */
|
||||
|
@ -323,7 +307,7 @@ extern "C" {
|
|||
#define ADC_SINGLEDIFF_CALIB_START_MASK (ADC_CR_ADCALDIF)
|
||||
#define ADC_SINGLEDIFF_CALIB_FACTOR_MASK (ADC_CALFACT_CALFACT_D | ADC_CALFACT_CALFACT_S)
|
||||
#define ADC_SINGLEDIFF_CHANNEL_MASK (ADC_CHANNEL_ID_BITFIELD_MASK) /* Equivalent to ADC_DIFSEL_DIFSEL */
|
||||
#define ADC_SINGLEDIFF_CHANNEL_SHIFT_MASK (ADC_CALFACT_CALFACT_S_5) /* Bit chosen to perform of shift when single mode is selected, shift value out of channels bits range. */
|
||||
#define ADC_SINGLEDIFF_CHANNEL_SHIFT_MASK (ADC_CALFACT_CALFACT_S_4 | ADC_CALFACT_CALFACT_S_3) /* Bits chosen to perform of shift when single mode is selected, shift value out of channels bits range. */
|
||||
|
||||
|
||||
/* Internal mask for ADC analog watchdog: */
|
||||
|
@ -384,9 +368,9 @@ extern "C" {
|
|||
#define VREFINT_CAL_ADDR ((uint16_t*) ((uint32_t)0x1FFFF7BAU)) /* Internal voltage reference, address of parameter VREFINT_CAL: VrefInt ADC raw data acquired at temperature 30 DegC (tolerance: +-5 DegC), Vref+ = 3.3 V (tolerance: +-10 mV). */
|
||||
#define VREFINT_CAL_VREF ((uint32_t) 3300U) /* Analog voltage reference (Vref+) value with which temperature sensor has been calibrated in production (tolerance: +-10 mV) (unit: mV). */
|
||||
/* Temperature sensor */
|
||||
#define TEMPSENSOR_CAL1_ADDR ((uint16_t*) ((uint32_t)0x1FFFF7B8U)) /* Internal temperature sensor, address of parameter TS_CAL1: On STM32F3, temperature sensor ADC raw data acquired at temperature 25 DegC (tolerance: +-5 DegC), Vref+ = 3.3 V (tolerance: +-10 mV). */
|
||||
#define TEMPSENSOR_CAL1_ADDR ((uint16_t*) ((uint32_t)0x1FFFF7B8U)) /* Internal temperature sensor, address of parameter TS_CAL1: On STM32F3, temperature sensor ADC raw data acquired at temperature 30 DegC (tolerance: +-5 DegC), Vref+ = 3.3 V (tolerance: +-10 mV). */
|
||||
#define TEMPSENSOR_CAL2_ADDR ((uint16_t*) ((uint32_t)0x1FFFF7C2U)) /* Internal temperature sensor, address of parameter TS_CAL2: On STM32F3, temperature sensor ADC raw data acquired at temperature 110 DegC (tolerance: +-5 DegC), Vref+ = 3.3 V (tolerance: +-10 mV). */
|
||||
#define TEMPSENSOR_CAL1_TEMP (( int32_t) 25) /* Internal temperature sensor, temperature at which temperature sensor has been calibrated in production for data into TEMPSENSOR_CAL1_ADDR (tolerance: +-5 DegC) (unit: DegC). */
|
||||
#define TEMPSENSOR_CAL1_TEMP (( int32_t) 30) /* Internal temperature sensor, temperature at which temperature sensor has been calibrated in production for data into TEMPSENSOR_CAL1_ADDR (tolerance: +-5 DegC) (unit: DegC). */
|
||||
#define TEMPSENSOR_CAL2_TEMP (( int32_t) 110) /* Internal temperature sensor, temperature at which temperature sensor has been calibrated in production for data into TEMPSENSOR_CAL2_ADDR (tolerance: +-5 DegC) (unit: DegC). */
|
||||
#define TEMPSENSOR_CAL_VREFANALOG ((uint32_t) 3300U) /* Analog voltage reference (Vref+) voltage with which temperature sensor has been calibrated in production (+-10 mV) (unit: mV). */
|
||||
|
||||
|
@ -2424,7 +2408,7 @@ typedef struct
|
|||
* On STM32F3, refer to device datasheet parameter "Avg_Slope".
|
||||
* @param __TEMPSENSOR_TYP_CALX_V__ Device datasheet data: Temperature sensor voltage typical value (at temperature and Vref+ defined in parameters below) (unit: mV).
|
||||
* On STM32F3, refer to device datasheet parameter "V25" (corresponding to TS_CAL1).
|
||||
* @param __TEMPSENSOR_CALX_TEMP__ Device datasheet data: Temperature at which temperature sensor voltage (see parameter above) is corresponding (unit: mV)
|
||||
* @param __TEMPSENSOR_CALX_TEMP__ Device datasheet data: Temperature at which temperature sensor voltage (see parameter above) is corresponding (unit: DegC)
|
||||
* @param __VREFANALOG_VOLTAGE__ Analog voltage reference (Vref+) voltage (unit: mV)
|
||||
* @param __TEMPSENSOR_ADC_DATA__ ADC conversion data of internal temperature sensor (unit: digital value).
|
||||
* @param __ADC_RESOLUTION__ ADC resolution at which internal temperature sensor voltage has been measured.
|
||||
|
@ -4984,7 +4968,7 @@ __STATIC_INLINE void LL_ADC_SetChannelSingleDiff(ADC_TypeDef *ADCx, uint32_t Cha
|
|||
/* shifted out of range of bits of channels in single or differential mode. */
|
||||
MODIFY_REG(ADCx->DIFSEL,
|
||||
Channel & ADC_SINGLEDIFF_CHANNEL_MASK,
|
||||
(Channel & ADC_SINGLEDIFF_CHANNEL_MASK) & (ADC_DIFSEL_DIFSEL << (SingleDiff & ADC_SINGLEDIFF_CHANNEL_SHIFT_MASK)));
|
||||
(Channel & ADC_SINGLEDIFF_CHANNEL_MASK) & (ADC_DIFSEL_DIFSEL >> (SingleDiff & ADC_SINGLEDIFF_CHANNEL_SHIFT_MASK)));
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -8733,7 +8717,7 @@ typedef struct
|
|||
* On STM32F37x, refer to device datasheet parameter "Avg_Slope".
|
||||
* @param __TEMPSENSOR_TYP_CALX_V__ Device datasheet data: Temperature sensor voltage typical value (at temperature and Vref+ defined in parameters below) (unit: mV).
|
||||
* On STM32F37x, refer to device datasheet parameter "V25".
|
||||
* @param __TEMPSENSOR_CALX_TEMP__ Device datasheet data: Temperature at which temperature sensor voltage (see parameter above) is corresponding (unit: mV)
|
||||
* @param __TEMPSENSOR_CALX_TEMP__ Device datasheet data: Temperature at which temperature sensor voltage (see parameter above) is corresponding (unit: degC)
|
||||
* @param __VREFANALOG_VOLTAGE__ Analog voltage reference (Vref+) voltage (unit: mV)
|
||||
* @param __TEMPSENSOR_ADC_DATA__ ADC conversion data of internal temperature sensor (unit: digital value).
|
||||
* @param __ADC_RESOLUTION__ ADC resolution at which internal temperature sensor voltage has been measured.
|
||||
|
|
|
@ -23,29 +23,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
|
|
@ -6,29 +6,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
|
|
@ -22,29 +22,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
|
|
@ -6,36 +6,20 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_LL_CRC_H
|
||||
#define __STM32F3xx_LL_CRC_H
|
||||
#ifndef STM32F3xx_LL_CRC_H
|
||||
#define STM32F3xx_LL_CRC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
@ -134,7 +118,7 @@ extern "C" {
|
|||
* @param __VALUE__ Value to be written in the register
|
||||
* @retval None
|
||||
*/
|
||||
#define LL_CRC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
|
||||
#define LL_CRC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, __VALUE__)
|
||||
|
||||
/**
|
||||
* @brief Read a value in CRC register
|
||||
|
@ -352,7 +336,10 @@ __STATIC_INLINE void LL_CRC_FeedData32(CRC_TypeDef *CRCx, uint32_t InData)
|
|||
*/
|
||||
__STATIC_INLINE void LL_CRC_FeedData16(CRC_TypeDef *CRCx, uint16_t InData)
|
||||
{
|
||||
*(uint16_t __IO *)(&CRCx->DR) = (uint16_t) InData;
|
||||
__IO uint16_t *pReg;
|
||||
|
||||
pReg = (__IO uint16_t *)(__IO void *)(&CRCx->DR); /* Derogation MisraC2012 R.11.5 */
|
||||
*pReg = InData;
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -431,7 +418,7 @@ __STATIC_INLINE uint32_t LL_CRC_Read_IDR(CRC_TypeDef *CRCx)
|
|||
* @note This register can be used as a temporary storage location for one byte.
|
||||
* @rmtoll IDR IDR LL_CRC_Write_IDR
|
||||
* @param CRCx CRC Instance
|
||||
* @param InData value to be stored in CRC_IDR register (8-bit) between between Min_Data=0 and Max_Data=0xFF
|
||||
* @param InData value to be stored in CRC_IDR register (8-bit) between Min_Data=0 and Max_Data=0xFF
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_CRC_Write_IDR(CRC_TypeDef *CRCx, uint32_t InData)
|
||||
|
@ -472,6 +459,6 @@ ErrorStatus LL_CRC_DeInit(CRC_TypeDef *CRCx);
|
|||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F3xx_LL_CRC_H */
|
||||
#endif /* STM32F3xx_LL_CRC_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
|
@ -6,29 +6,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
|
|
@ -6,29 +6,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
|
|
@ -6,29 +6,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -6,29 +6,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -6,36 +6,20 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_LL_I2C_H
|
||||
#define __STM32F3xx_LL_I2C_H
|
||||
#ifndef STM32F3xx_LL_I2C_H
|
||||
#define STM32F3xx_LL_I2C_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
@ -431,7 +415,7 @@ __STATIC_INLINE void LL_I2C_Disable(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsEnabled(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->CR1, I2C_CR1_PE) == (I2C_CR1_PE));
|
||||
return ((READ_BIT(I2Cx->CR1, I2C_CR1_PE) == (I2C_CR1_PE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -513,7 +497,7 @@ __STATIC_INLINE void LL_I2C_DisableAnalogFilter(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsEnabledAnalogFilter(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->CR1, I2C_CR1_ANFOFF) != (I2C_CR1_ANFOFF));
|
||||
return ((READ_BIT(I2Cx->CR1, I2C_CR1_ANFOFF) != (I2C_CR1_ANFOFF)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -546,7 +530,7 @@ __STATIC_INLINE void LL_I2C_DisableDMAReq_TX(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsEnabledDMAReq_TX(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN) == (I2C_CR1_TXDMAEN));
|
||||
return ((READ_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN) == (I2C_CR1_TXDMAEN)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -579,7 +563,7 @@ __STATIC_INLINE void LL_I2C_DisableDMAReq_RX(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsEnabledDMAReq_RX(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN) == (I2C_CR1_RXDMAEN));
|
||||
return ((READ_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN) == (I2C_CR1_RXDMAEN)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -594,7 +578,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsEnabledDMAReq_RX(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_DMA_GetRegAddr(I2C_TypeDef *I2Cx, uint32_t Direction)
|
||||
{
|
||||
register uint32_t data_reg_addr = 0U;
|
||||
register uint32_t data_reg_addr;
|
||||
|
||||
if (Direction == LL_I2C_DMA_REG_DATA_TRANSMIT)
|
||||
{
|
||||
|
@ -642,7 +626,7 @@ __STATIC_INLINE void LL_I2C_DisableClockStretching(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsEnabledClockStretching(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH) != (I2C_CR1_NOSTRETCH));
|
||||
return ((READ_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH) != (I2C_CR1_NOSTRETCH)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -675,7 +659,7 @@ __STATIC_INLINE void LL_I2C_DisableSlaveByteControl(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsEnabledSlaveByteControl(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->CR1, I2C_CR1_SBC) == (I2C_CR1_SBC));
|
||||
return ((READ_BIT(I2Cx->CR1, I2C_CR1_SBC) == (I2C_CR1_SBC)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -715,7 +699,7 @@ __STATIC_INLINE void LL_I2C_DisableWakeUpFromStop(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsEnabledWakeUpFromStop(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->CR1, I2C_CR1_WUPEN) == (I2C_CR1_WUPEN));
|
||||
return ((READ_BIT(I2Cx->CR1, I2C_CR1_WUPEN) == (I2C_CR1_WUPEN)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -750,7 +734,7 @@ __STATIC_INLINE void LL_I2C_DisableGeneralCall(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsEnabledGeneralCall(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->CR1, I2C_CR1_GCEN) == (I2C_CR1_GCEN));
|
||||
return ((READ_BIT(I2Cx->CR1, I2C_CR1_GCEN) == (I2C_CR1_GCEN)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -827,7 +811,7 @@ __STATIC_INLINE void LL_I2C_DisableOwnAddress1(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsEnabledOwnAddress1(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN) == (I2C_OAR1_OA1EN));
|
||||
return ((READ_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN) == (I2C_OAR1_OA1EN)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -883,7 +867,7 @@ __STATIC_INLINE void LL_I2C_DisableOwnAddress2(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsEnabledOwnAddress2(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN) == (I2C_OAR2_OA2EN));
|
||||
return ((READ_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN) == (I2C_OAR2_OA2EN)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1038,7 +1022,7 @@ __STATIC_INLINE void LL_I2C_DisableSMBusAlert(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusAlert(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->CR1, I2C_CR1_ALERTEN) == (I2C_CR1_ALERTEN));
|
||||
return ((READ_BIT(I2Cx->CR1, I2C_CR1_ALERTEN) == (I2C_CR1_ALERTEN)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1077,7 +1061,7 @@ __STATIC_INLINE void LL_I2C_DisableSMBusPEC(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPEC(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->CR1, I2C_CR1_PECEN) == (I2C_CR1_PECEN));
|
||||
return ((READ_BIT(I2Cx->CR1, I2C_CR1_PECEN) == (I2C_CR1_PECEN)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1242,7 +1226,7 @@ __STATIC_INLINE void LL_I2C_DisableSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t Cloc
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t ClockTimeout)
|
||||
{
|
||||
return (READ_BIT(I2Cx->TIMEOUTR, (I2C_TIMEOUTR_TIMOUTEN | I2C_TIMEOUTR_TEXTEN)) == (ClockTimeout));
|
||||
return ((READ_BIT(I2Cx->TIMEOUTR, (I2C_TIMEOUTR_TIMOUTEN | I2C_TIMEOUTR_TEXTEN)) == (ClockTimeout)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1283,7 +1267,7 @@ __STATIC_INLINE void LL_I2C_DisableIT_TX(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_TX(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->CR1, I2C_CR1_TXIE) == (I2C_CR1_TXIE));
|
||||
return ((READ_BIT(I2Cx->CR1, I2C_CR1_TXIE) == (I2C_CR1_TXIE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1316,7 +1300,7 @@ __STATIC_INLINE void LL_I2C_DisableIT_RX(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_RX(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->CR1, I2C_CR1_RXIE) == (I2C_CR1_RXIE));
|
||||
return ((READ_BIT(I2Cx->CR1, I2C_CR1_RXIE) == (I2C_CR1_RXIE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1349,7 +1333,7 @@ __STATIC_INLINE void LL_I2C_DisableIT_ADDR(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_ADDR(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE));
|
||||
return ((READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1382,7 +1366,7 @@ __STATIC_INLINE void LL_I2C_DisableIT_NACK(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_NACK(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->CR1, I2C_CR1_NACKIE) == (I2C_CR1_NACKIE));
|
||||
return ((READ_BIT(I2Cx->CR1, I2C_CR1_NACKIE) == (I2C_CR1_NACKIE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1415,7 +1399,7 @@ __STATIC_INLINE void LL_I2C_DisableIT_STOP(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_STOP(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->CR1, I2C_CR1_STOPIE) == (I2C_CR1_STOPIE));
|
||||
return ((READ_BIT(I2Cx->CR1, I2C_CR1_STOPIE) == (I2C_CR1_STOPIE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1454,7 +1438,7 @@ __STATIC_INLINE void LL_I2C_DisableIT_TC(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_TC(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->CR1, I2C_CR1_TCIE) == (I2C_CR1_TCIE));
|
||||
return ((READ_BIT(I2Cx->CR1, I2C_CR1_TCIE) == (I2C_CR1_TCIE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1505,7 +1489,7 @@ __STATIC_INLINE void LL_I2C_DisableIT_ERR(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_ERR(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->CR1, I2C_CR1_ERRIE) == (I2C_CR1_ERRIE));
|
||||
return ((READ_BIT(I2Cx->CR1, I2C_CR1_ERRIE) == (I2C_CR1_ERRIE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1526,7 +1510,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_ERR(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TXE(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->ISR, I2C_ISR_TXE) == (I2C_ISR_TXE));
|
||||
return ((READ_BIT(I2Cx->ISR, I2C_ISR_TXE) == (I2C_ISR_TXE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1539,7 +1523,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TXE(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TXIS(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->ISR, I2C_ISR_TXIS) == (I2C_ISR_TXIS));
|
||||
return ((READ_BIT(I2Cx->ISR, I2C_ISR_TXIS) == (I2C_ISR_TXIS)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1552,7 +1536,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TXIS(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_RXNE(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->ISR, I2C_ISR_RXNE) == (I2C_ISR_RXNE));
|
||||
return ((READ_BIT(I2Cx->ISR, I2C_ISR_RXNE) == (I2C_ISR_RXNE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1565,7 +1549,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_RXNE(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ADDR(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->ISR, I2C_ISR_ADDR) == (I2C_ISR_ADDR));
|
||||
return ((READ_BIT(I2Cx->ISR, I2C_ISR_ADDR) == (I2C_ISR_ADDR)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1578,7 +1562,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ADDR(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_NACK(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->ISR, I2C_ISR_NACKF) == (I2C_ISR_NACKF));
|
||||
return ((READ_BIT(I2Cx->ISR, I2C_ISR_NACKF) == (I2C_ISR_NACKF)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1591,7 +1575,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_NACK(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_STOP(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->ISR, I2C_ISR_STOPF) == (I2C_ISR_STOPF));
|
||||
return ((READ_BIT(I2Cx->ISR, I2C_ISR_STOPF) == (I2C_ISR_STOPF)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1604,7 +1588,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_STOP(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TC(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->ISR, I2C_ISR_TC) == (I2C_ISR_TC));
|
||||
return ((READ_BIT(I2Cx->ISR, I2C_ISR_TC) == (I2C_ISR_TC)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1617,7 +1601,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TC(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TCR(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->ISR, I2C_ISR_TCR) == (I2C_ISR_TCR));
|
||||
return ((READ_BIT(I2Cx->ISR, I2C_ISR_TCR) == (I2C_ISR_TCR)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1630,7 +1614,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TCR(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_BERR(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->ISR, I2C_ISR_BERR) == (I2C_ISR_BERR));
|
||||
return ((READ_BIT(I2Cx->ISR, I2C_ISR_BERR) == (I2C_ISR_BERR)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1643,7 +1627,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_BERR(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ARLO(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->ISR, I2C_ISR_ARLO) == (I2C_ISR_ARLO));
|
||||
return ((READ_BIT(I2Cx->ISR, I2C_ISR_ARLO) == (I2C_ISR_ARLO)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1656,7 +1640,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ARLO(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_OVR(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->ISR, I2C_ISR_OVR) == (I2C_ISR_OVR));
|
||||
return ((READ_BIT(I2Cx->ISR, I2C_ISR_OVR) == (I2C_ISR_OVR)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1671,7 +1655,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_OVR(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_PECERR(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->ISR, I2C_ISR_PECERR) == (I2C_ISR_PECERR));
|
||||
return ((READ_BIT(I2Cx->ISR, I2C_ISR_PECERR) == (I2C_ISR_PECERR)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1686,7 +1670,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_PECERR(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->ISR, I2C_ISR_TIMEOUT) == (I2C_ISR_TIMEOUT));
|
||||
return ((READ_BIT(I2Cx->ISR, I2C_ISR_TIMEOUT) == (I2C_ISR_TIMEOUT)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1702,7 +1686,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_ALERT(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->ISR, I2C_ISR_ALERT) == (I2C_ISR_ALERT));
|
||||
return ((READ_BIT(I2Cx->ISR, I2C_ISR_ALERT) == (I2C_ISR_ALERT)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1715,7 +1699,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_ALERT(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_BUSY(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->ISR, I2C_ISR_BUSY) == (I2C_ISR_BUSY));
|
||||
return ((READ_BIT(I2Cx->ISR, I2C_ISR_BUSY) == (I2C_ISR_BUSY)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1876,7 +1860,7 @@ __STATIC_INLINE void LL_I2C_DisableAutoEndMode(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsEnabledAutoEndMode(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->CR2, I2C_CR2_AUTOEND) == (I2C_CR2_AUTOEND));
|
||||
return ((READ_BIT(I2Cx->CR2, I2C_CR2_AUTOEND) == (I2C_CR2_AUTOEND)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1911,7 +1895,7 @@ __STATIC_INLINE void LL_I2C_DisableReloadMode(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsEnabledReloadMode(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->CR2, I2C_CR2_RELOAD) == (I2C_CR2_RELOAD));
|
||||
return ((READ_BIT(I2Cx->CR2, I2C_CR2_RELOAD) == (I2C_CR2_RELOAD)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -2010,7 +1994,7 @@ __STATIC_INLINE void LL_I2C_DisableAuto10BitRead(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsEnabledAuto10BitRead(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->CR2, I2C_CR2_HEAD10R) != (I2C_CR2_HEAD10R));
|
||||
return ((READ_BIT(I2Cx->CR2, I2C_CR2_HEAD10R) != (I2C_CR2_HEAD10R)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -2108,7 +2092,7 @@ __STATIC_INLINE void LL_I2C_HandleTransfer(I2C_TypeDef *I2Cx, uint32_t SlaveAddr
|
|||
{
|
||||
MODIFY_REG(I2Cx->CR2, I2C_CR2_SADD | I2C_CR2_ADD10 | (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) | I2C_CR2_START | I2C_CR2_STOP | I2C_CR2_RELOAD |
|
||||
I2C_CR2_NBYTES | I2C_CR2_AUTOEND | I2C_CR2_HEAD10R,
|
||||
SlaveAddr | SlaveAddrSize | TransferSize << I2C_CR2_NBYTES_Pos | EndMode | Request);
|
||||
SlaveAddr | SlaveAddrSize | (TransferSize << I2C_CR2_NBYTES_Pos) | EndMode | Request);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -2163,7 +2147,7 @@ __STATIC_INLINE void LL_I2C_EnableSMBusPECCompare(I2C_TypeDef *I2Cx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPECCompare(I2C_TypeDef *I2Cx)
|
||||
{
|
||||
return (READ_BIT(I2Cx->CR2, I2C_CR2_PECBYTE) == (I2C_CR2_PECBYTE));
|
||||
return ((READ_BIT(I2Cx->CR2, I2C_CR2_PECBYTE) == (I2C_CR2_PECBYTE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -2211,8 +2195,8 @@ __STATIC_INLINE void LL_I2C_TransmitData8(I2C_TypeDef *I2Cx, uint8_t Data)
|
|||
* @{
|
||||
*/
|
||||
|
||||
uint32_t LL_I2C_Init(I2C_TypeDef *I2Cx, LL_I2C_InitTypeDef *I2C_InitStruct);
|
||||
uint32_t LL_I2C_DeInit(I2C_TypeDef *I2Cx);
|
||||
ErrorStatus LL_I2C_Init(I2C_TypeDef *I2Cx, LL_I2C_InitTypeDef *I2C_InitStruct);
|
||||
ErrorStatus LL_I2C_DeInit(I2C_TypeDef *I2Cx);
|
||||
void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct);
|
||||
|
||||
|
||||
|
@ -2239,6 +2223,6 @@ void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct);
|
|||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F3xx_LL_I2C_H */
|
||||
#endif /* STM32F3xx_LL_I2C_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
|
@ -6,36 +6,20 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_LL_IWDG_H
|
||||
#define __STM32F3xx_LL_IWDG_H
|
||||
#ifndef STM32F3xx_LL_IWDG_H
|
||||
#define STM32F3xx_LL_IWDG_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
@ -61,12 +45,10 @@ extern "C" {
|
|||
/** @defgroup IWDG_LL_Private_Constants IWDG Private Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define LL_IWDG_KEY_RELOAD 0x0000AAAAU /*!< IWDG Reload Counter Enable */
|
||||
#define LL_IWDG_KEY_ENABLE 0x0000CCCCU /*!< IWDG Peripheral Enable */
|
||||
#define LL_IWDG_KEY_WR_ACCESS_ENABLE 0x00005555U /*!< IWDG KR Write Access Enable */
|
||||
#define LL_IWDG_KEY_WR_ACCESS_DISABLE 0x00000000U /*!< IWDG KR Write Access Disable */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -86,7 +68,6 @@ extern "C" {
|
|||
#define LL_IWDG_SR_PVU IWDG_SR_PVU /*!< Watchdog prescaler value update */
|
||||
#define LL_IWDG_SR_RVU IWDG_SR_RVU /*!< Watchdog counter reload value update */
|
||||
#define LL_IWDG_SR_WVU IWDG_SR_WVU /*!< Watchdog counter window value update */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -160,7 +141,7 @@ extern "C" {
|
|||
*/
|
||||
__STATIC_INLINE void LL_IWDG_Enable(IWDG_TypeDef *IWDGx)
|
||||
{
|
||||
WRITE_REG(IWDG->KR, LL_IWDG_KEY_ENABLE);
|
||||
WRITE_REG(IWDGx->KR, LL_IWDG_KEY_ENABLE);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -171,7 +152,7 @@ __STATIC_INLINE void LL_IWDG_Enable(IWDG_TypeDef *IWDGx)
|
|||
*/
|
||||
__STATIC_INLINE void LL_IWDG_ReloadCounter(IWDG_TypeDef *IWDGx)
|
||||
{
|
||||
WRITE_REG(IWDG->KR, LL_IWDG_KEY_RELOAD);
|
||||
WRITE_REG(IWDGx->KR, LL_IWDG_KEY_RELOAD);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -182,7 +163,7 @@ __STATIC_INLINE void LL_IWDG_ReloadCounter(IWDG_TypeDef *IWDGx)
|
|||
*/
|
||||
__STATIC_INLINE void LL_IWDG_EnableWriteAccess(IWDG_TypeDef *IWDGx)
|
||||
{
|
||||
WRITE_REG(IWDG->KR, LL_IWDG_KEY_WR_ACCESS_ENABLE);
|
||||
WRITE_REG(IWDGx->KR, LL_IWDG_KEY_WR_ACCESS_ENABLE);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -193,7 +174,7 @@ __STATIC_INLINE void LL_IWDG_EnableWriteAccess(IWDG_TypeDef *IWDGx)
|
|||
*/
|
||||
__STATIC_INLINE void LL_IWDG_DisableWriteAccess(IWDG_TypeDef *IWDGx)
|
||||
{
|
||||
WRITE_REG(IWDG->KR, LL_IWDG_KEY_WR_ACCESS_DISABLE);
|
||||
WRITE_REG(IWDGx->KR, LL_IWDG_KEY_WR_ACCESS_DISABLE);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -230,7 +211,7 @@ __STATIC_INLINE void LL_IWDG_SetPrescaler(IWDG_TypeDef *IWDGx, uint32_t Prescale
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(IWDG_TypeDef *IWDGx)
|
||||
{
|
||||
return (uint32_t)(READ_REG(IWDGx->PR));
|
||||
return (READ_REG(IWDGx->PR));
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -253,7 +234,7 @@ __STATIC_INLINE void LL_IWDG_SetReloadCounter(IWDG_TypeDef *IWDGx, uint32_t Coun
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(IWDG_TypeDef *IWDGx)
|
||||
{
|
||||
return (uint32_t)(READ_REG(IWDGx->RLR));
|
||||
return (READ_REG(IWDGx->RLR));
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -276,7 +257,7 @@ __STATIC_INLINE void LL_IWDG_SetWindow(IWDG_TypeDef *IWDGx, uint32_t Window)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_IWDG_GetWindow(IWDG_TypeDef *IWDGx)
|
||||
{
|
||||
return (uint32_t)(READ_REG(IWDGx->WINR));
|
||||
return (READ_REG(IWDGx->WINR));
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -295,7 +276,7 @@ __STATIC_INLINE uint32_t LL_IWDG_GetWindow(IWDG_TypeDef *IWDGx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(IWDG_TypeDef *IWDGx)
|
||||
{
|
||||
return (READ_BIT(IWDGx->SR, IWDG_SR_PVU) == (IWDG_SR_PVU));
|
||||
return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU) == (IWDG_SR_PVU)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -306,7 +287,7 @@ __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(IWDG_TypeDef *IWDGx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(IWDG_TypeDef *IWDGx)
|
||||
{
|
||||
return (READ_BIT(IWDGx->SR, IWDG_SR_RVU) == (IWDG_SR_RVU));
|
||||
return ((READ_BIT(IWDGx->SR, IWDG_SR_RVU) == (IWDG_SR_RVU)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -317,7 +298,7 @@ __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(IWDG_TypeDef *IWDGx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_WVU(IWDG_TypeDef *IWDGx)
|
||||
{
|
||||
return (READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU));
|
||||
return ((READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -330,7 +311,7 @@ __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_WVU(IWDG_TypeDef *IWDGx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_IWDG_IsReady(IWDG_TypeDef *IWDGx)
|
||||
{
|
||||
return (READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U);
|
||||
return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -346,7 +327,7 @@ __STATIC_INLINE uint32_t LL_IWDG_IsReady(IWDG_TypeDef *IWDGx)
|
|||
* @}
|
||||
*/
|
||||
|
||||
#endif /* IWDG) */
|
||||
#endif /* IWDG */
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
@ -356,6 +337,6 @@ __STATIC_INLINE uint32_t LL_IWDG_IsReady(IWDG_TypeDef *IWDGx)
|
|||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F3xx_LL_IWDG_H */
|
||||
#endif /* STM32F3xx_LL_IWDG_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
|
@ -6,36 +6,20 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_LL_OPAMP_H
|
||||
#define __STM32F3xx_LL_OPAMP_H
|
||||
#ifndef STM32F3xx_LL_OPAMP_H
|
||||
#define STM32F3xx_LL_OPAMP_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
@ -142,7 +126,7 @@ typedef struct
|
|||
/** @defgroup OPAMP_LL_EC_MODE OPAMP mode calibration or functional.
|
||||
* @{
|
||||
*/
|
||||
#define LL_OPAMP_MODE_FUNCTIONAL ((uint32_t)0x00000000U) /*!< OPAMP functional mode */
|
||||
#define LL_OPAMP_MODE_FUNCTIONAL (0x00000000U) /*!< OPAMP functional mode */
|
||||
#define LL_OPAMP_MODE_CALIBRATION (OPAMP_CSR_CALON) /*!< OPAMP calibration mode */
|
||||
/**
|
||||
* @}
|
||||
|
@ -151,7 +135,7 @@ typedef struct
|
|||
/** @defgroup OPAMP_LL_EC_FUNCTIONAL_MODE OPAMP functional mode
|
||||
* @{
|
||||
*/
|
||||
#define LL_OPAMP_MODE_STANDALONE ((uint32_t)0x00000000U) /*!< OPAMP functional mode, OPAMP operation in standalone */
|
||||
#define LL_OPAMP_MODE_STANDALONE (0x00000000U) /*!< OPAMP functional mode, OPAMP operation in standalone */
|
||||
#define LL_OPAMP_MODE_FOLLOWER (OPAMP_CSR_VMSEL_1 | OPAMP_CSR_VMSEL_0) /*!< OPAMP functional mode, OPAMP operation in follower */
|
||||
#define LL_OPAMP_MODE_PGA (OPAMP_CSR_VMSEL_1) /*!< OPAMP functional mode, OPAMP operation in PGA */
|
||||
#define LL_OPAMP_MODE_PGA_EXT_FILT_IO0 (OPAMP_CSR_PGGAIN_3 | OPAMP_CSR_VMSEL_1) /*!< OPAMP functional mode, OPAMP operation in PGA with external filtering on OPAMP input IO0. */
|
||||
|
@ -163,7 +147,7 @@ typedef struct
|
|||
/** @defgroup OPAMP_LL_EC_MODE_PGA_GAIN OPAMP PGA gain (relevant when OPAMP is in functional mode PGA)
|
||||
* @{
|
||||
*/
|
||||
#define LL_OPAMP_PGA_GAIN_2 ((uint32_t)0x00000000U) /*!< OPAMP PGA gain 2 */
|
||||
#define LL_OPAMP_PGA_GAIN_2 (0x00000000U) /*!< OPAMP PGA gain 2 */
|
||||
#define LL_OPAMP_PGA_GAIN_4 (OPAMP_CSR_PGGAIN_0) /*!< OPAMP PGA gain 4 */
|
||||
#define LL_OPAMP_PGA_GAIN_8 (OPAMP_CSR_PGGAIN_1) /*!< OPAMP PGA gain 8 */
|
||||
#define LL_OPAMP_PGA_GAIN_16 (OPAMP_CSR_PGGAIN_1 | OPAMP_CSR_PGGAIN_0 ) /*!< OPAMP PGA gain 16 */
|
||||
|
@ -175,7 +159,7 @@ typedef struct
|
|||
* @{
|
||||
*/
|
||||
#define LL_OPAMP_INPUT_NONINVERT_IO0 (OPAMP_CSR_VPSEL) /*!< OPAMP non inverting input connected to GPIO pin (pin PA1 for OPAMP1, pin PA7 for OPAMP2, pin PB0 for OPAMP3, pin PB13 for OPAMP4) */
|
||||
#define LL_OPAMP_INPUT_NONINVERT_IO1 ((uint32_t)0x00000000) /*!< OPAMP non inverting input connected to GPIO pin (pin PA7 for OPAMP1, pin PD14 for OPAMP2, pin PB13 for OPAMP3, pin PD11 for OPAMP4) */
|
||||
#define LL_OPAMP_INPUT_NONINVERT_IO1 (0x00000000) /*!< OPAMP non inverting input connected to GPIO pin (pin PA7 for OPAMP1, pin PD14 for OPAMP2, pin PB13 for OPAMP3, pin PD11 for OPAMP4) */
|
||||
#define LL_OPAMP_INPUT_NONINVERT_IO2 (OPAMP_CSR_VPSEL_1) /*!< OPAMP non inverting input connected to GPIO pin (pin PA3 for OPAMP1, pin PB0 for OPAMP2, pin PA1 for OPAMP3, pin PB11 for OPAMP4) */
|
||||
#define LL_OPAMP_INPUT_NONINVERT_IO3 (OPAMP_CSR_VPSEL_0) /*!< OPAMP non inverting input connected to GPIO pin (pin PA5 for OPAMP1, pin PB14 for OPAMP2, pin PA5 for OPAMP3, pin PA4 for OPAMP4) */
|
||||
#define LL_OPAMP_INPUT_NONINV_DAC1_CH1 (LL_OPAMP_INPUT_NONINVERT_IO3) /*!< OPAMP non inverting input connected to DAC1 channel1 output (specific to OPAMP instances: OPAMP4) */
|
||||
|
@ -187,7 +171,7 @@ typedef struct
|
|||
/** @defgroup OPAMP_LL_EC_INPUT_INVERTING OPAMP input inverting
|
||||
* @{
|
||||
*/
|
||||
#define LL_OPAMP_INPUT_INVERT_IO0 ((uint32_t)0x00000000U) /*!< OPAMP inverting input connected to GPIO pin (pin PC5 for OPAMP1, pin PC5 for OPAMP2, pin PB10 for OPAMP3, pin PB10 for OPAMP4). Note: OPAMP inverting input is used with OPAMP in mode standalone or PGA with external capacitors for filtering circuit. Otherwise (OPAMP in mode follower), OPAMP inverting input is not used (not connected to GPIO pin). */
|
||||
#define LL_OPAMP_INPUT_INVERT_IO0 (0x00000000U) /*!< OPAMP inverting input connected to GPIO pin (pin PC5 for OPAMP1, pin PC5 for OPAMP2, pin PB10 for OPAMP3, pin PB10 for OPAMP4). Note: OPAMP inverting input is used with OPAMP in mode standalone or PGA with external capacitors for filtering circuit. Otherwise (OPAMP in mode follower), OPAMP inverting input is not used (not connected to GPIO pin). */
|
||||
#define LL_OPAMP_INPUT_INVERT_IO1 (OPAMP_CSR_VMSEL_0) /*!< OPAMP inverting input connected to GPIO pin (pin PA3 for OPAMP1, pin PA5 for OPAMP2, pin PB2 for OPAMP3, pin PD8 for OPAMP4). Note: OPAMP inverting input is used with OPAMP in mode standalone or PGA with external capacitors for filtering circuit. Otherwise (OPAMP in mode follower), OPAMP inverting input is not used (not connected to GPIO pin). */
|
||||
#define LL_OPAMP_INPUT_INVERT_CONNECT_NO (OPAMP_CSR_VMSEL_1) /*!< OPAMP inverting input not externally connected (intended for OPAMP in mode follower or PGA without external capacitors for filtering). Note: On this STM32 serie, this literal include cases of value 0x11 for mode follower and value 0x10 for mode PGA. */
|
||||
/**
|
||||
|
@ -220,7 +204,7 @@ typedef struct
|
|||
/** @defgroup OPAMP_LL_EC_INPUT_MUX_MODE OPAMP inputs multiplexer mode
|
||||
* @{
|
||||
*/
|
||||
#define LL_OPAMP_INPUT_MUX_DISABLE ((uint32_t)0x00000000U) /*!< OPAMP inputs multiplexer mode dosabled. */
|
||||
#define LL_OPAMP_INPUT_MUX_DISABLE (0x00000000U) /*!< OPAMP inputs multiplexer mode dosabled. */
|
||||
#define LL_OPAMP_INPUT_MUX_TIM1_CH6 (OPAMP_CSR_TCMEN) /*!< OPAMP inputs multiplexer mode enabled, controlled by TIM1 CC6. */
|
||||
/**
|
||||
* @}
|
||||
|
@ -229,7 +213,7 @@ typedef struct
|
|||
/** @defgroup OPAMP_LL_EC_VREF_OUTPUT OPAMP internal reference voltage path state to output
|
||||
* @{
|
||||
*/
|
||||
#define LL_OPAMP_VREF_OUTPUT_DISABLE ((uint32_t)0x00000000U) /*!< OPAMP internal reference voltage path to output is disabled. */
|
||||
#define LL_OPAMP_VREF_OUTPUT_DISABLE (0x00000000U) /*!< OPAMP internal reference voltage path to output is disabled. */
|
||||
#define LL_OPAMP_VREF_OUTPUT_ENABLE (OPAMP_CSR_TSTREF) /*!< OPAMP internal reference voltage path to output is enabled. */
|
||||
/**
|
||||
* @}
|
||||
|
@ -238,7 +222,7 @@ typedef struct
|
|||
/** @defgroup OPAMP_LL_EC_TRIMMING_MODE OPAMP trimming mode
|
||||
* @{
|
||||
*/
|
||||
#define LL_OPAMP_TRIMMING_FACTORY ((uint32_t)0x00000000U) /*!< OPAMP trimming factors set to factory values */
|
||||
#define LL_OPAMP_TRIMMING_FACTORY (0x00000000U) /*!< OPAMP trimming factors set to factory values */
|
||||
#define LL_OPAMP_TRIMMING_USER (OPAMP_CSR_USERTRIM) /*!< OPAMP trimming factors set to user values */
|
||||
/**
|
||||
* @}
|
||||
|
@ -274,7 +258,7 @@ typedef struct
|
|||
/* Literal set to maximum value (refer to device datasheet, */
|
||||
/* parameter "tWAKEUP"). */
|
||||
/* Unit: us */
|
||||
#define LL_OPAMP_DELAY_STARTUP_US ((uint32_t) 5U) /*!< Delay for OPAMP startup time */
|
||||
#define LL_OPAMP_DELAY_STARTUP_US (5U) /*!< Delay for OPAMP startup time */
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
@ -298,7 +282,7 @@ typedef struct
|
|||
* @param __VALUE__ Value to be written in the register
|
||||
* @retval None
|
||||
*/
|
||||
#define LL_OPAMP_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
|
||||
#define LL_OPAMP_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, (__VALUE__))
|
||||
|
||||
/**
|
||||
* @brief Read a value in OPAMP register
|
||||
|
@ -306,7 +290,7 @@ typedef struct
|
|||
* @param __REG__ Register to be read
|
||||
* @retval Register value
|
||||
*/
|
||||
#define LL_OPAMP_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
|
||||
#define LL_OPAMP_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -581,7 +565,7 @@ __STATIC_INLINE uint32_t LL_OPAMP_GetInputNonInvertingSecondary(OPAMP_TypeDef *O
|
|||
* @arg @ref LL_OPAMP_INPUT_INVERT_IO1_SEC
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_OPAMP_SetInputInvertingSecondary (OPAMP_TypeDef *OPAMPx, uint32_t InputInverting)
|
||||
__STATIC_INLINE void LL_OPAMP_SetInputInvertingSecondary(OPAMP_TypeDef *OPAMPx, uint32_t InputInverting)
|
||||
{
|
||||
MODIFY_REG(OPAMPx->CSR, OPAMP_CSR_VMSSEL, InputInverting);
|
||||
}
|
||||
|
@ -708,7 +692,7 @@ __STATIC_INLINE uint32_t LL_OPAMP_GetCalibrationSelection(OPAMP_TypeDef *OPAMPx)
|
|||
register uint32_t CalibrationSelection = (uint32_t)(READ_BIT(OPAMPx->CSR, OPAMP_CSR_CALSEL));
|
||||
|
||||
return (CalibrationSelection |
|
||||
((OPAMP_CSR_TRIMOFFSETN) << (POSITION_VAL(OPAMP_CSR_TRIMOFFSETP) * (CalibrationSelection && OPAMP_CSR_CALSEL))));
|
||||
(((CalibrationSelection & OPAMP_CSR_CALSEL) == 0UL) ? OPAMP_CSR_TRIMOFFSETN : OPAMP_CSR_TRIMOFFSETP));
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -749,7 +733,7 @@ __STATIC_INLINE uint32_t LL_OPAMP_GetCalibrationVrefOutput(OPAMP_TypeDef *OPAMPx
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_OPAMP_IsCalibrationOutputSet(OPAMP_TypeDef *OPAMPx)
|
||||
{
|
||||
return (READ_BIT(OPAMPx->CSR, OPAMP_CSR_OUTCAL) == OPAMP_CSR_OUTCAL);
|
||||
return ((READ_BIT(OPAMPx->CSR, OPAMP_CSR_OUTCAL) == OPAMP_CSR_OUTCAL) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -769,7 +753,7 @@ __STATIC_INLINE void LL_OPAMP_SetTrimmingValue(OPAMP_TypeDef* OPAMPx, uint32_t T
|
|||
{
|
||||
MODIFY_REG(OPAMPx->CSR,
|
||||
(TransistorsDiffPair & OPAMP_TRIMMING_VALUE_MASK),
|
||||
TrimmingValue << (POSITION_VAL(TransistorsDiffPair & OPAMP_TRIMMING_VALUE_MASK)));
|
||||
TrimmingValue << ((TransistorsDiffPair == LL_OPAMP_TRIMMING_NMOS) ? OPAMP_CSR_TRIMOFFSETN_Pos : OPAMP_CSR_TRIMOFFSETP_Pos));
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -787,8 +771,7 @@ __STATIC_INLINE void LL_OPAMP_SetTrimmingValue(OPAMP_TypeDef* OPAMPx, uint32_t T
|
|||
__STATIC_INLINE uint32_t LL_OPAMP_GetTrimmingValue(OPAMP_TypeDef* OPAMPx, uint32_t TransistorsDiffPair)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(OPAMPx->CSR, (TransistorsDiffPair & OPAMP_TRIMMING_VALUE_MASK))
|
||||
>> (POSITION_VAL(TransistorsDiffPair & OPAMP_TRIMMING_VALUE_MASK))
|
||||
);
|
||||
>> ((TransistorsDiffPair == LL_OPAMP_TRIMMING_NMOS) ? OPAMP_CSR_TRIMOFFSETN_Pos : OPAMP_CSR_TRIMOFFSETP_Pos));
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -832,7 +815,7 @@ __STATIC_INLINE void LL_OPAMP_Disable(OPAMP_TypeDef *OPAMPx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_OPAMP_IsEnabled(OPAMP_TypeDef *OPAMPx)
|
||||
{
|
||||
return (READ_BIT(OPAMPx->CSR, OPAMP_CSR_OPAMPxEN) == (OPAMP_CSR_OPAMPxEN));
|
||||
return ((READ_BIT(OPAMPx->CSR, OPAMP_CSR_OPAMPxEN) == (OPAMP_CSR_OPAMPxEN)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -859,7 +842,7 @@ __STATIC_INLINE void LL_OPAMP_Lock(OPAMP_TypeDef *OPAMPx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_OPAMP_IsLocked(OPAMP_TypeDef *OPAMPx)
|
||||
{
|
||||
return (READ_BIT(OPAMPx->CSR, OPAMP_CSR_LOCK) == (OPAMP_CSR_LOCK));
|
||||
return ((READ_BIT(OPAMPx->CSR, OPAMP_CSR_LOCK) == (OPAMP_CSR_LOCK)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -898,6 +881,6 @@ void LL_OPAMP_StructInit(LL_OPAMP_InitTypeDef *OPAMP_InitStruct);
|
|||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F3xx_LL_OPAMP_H */
|
||||
#endif /* STM32F3xx_LL_OPAMP_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
|
@ -6,29 +6,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
|
|
@ -6,29 +6,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
@ -790,6 +774,7 @@ typedef struct
|
|||
/** @defgroup RCC_LL_EC_PLLSOURCE PLL SOURCE
|
||||
* @{
|
||||
*/
|
||||
#define LL_RCC_PLLSOURCE_NONE 0x00000000U /*!< No clock selected as main PLL entry clock source */
|
||||
#define LL_RCC_PLLSOURCE_HSE RCC_CFGR_PLLSRC_HSE_PREDIV /*!< HSE/PREDIV clock selected as PLL entry clock source */
|
||||
#if defined(RCC_PLLSRC_PREDIV1_SUPPORT)
|
||||
#define LL_RCC_PLLSOURCE_HSI RCC_CFGR_PLLSRC_HSI_PREDIV /*!< HSI/PREDIV clock selected as PLL entry clock source */
|
||||
|
@ -2308,10 +2293,29 @@ __STATIC_INLINE void LL_RCC_PLL_ConfigDomain_SYS(uint32_t Source, uint32_t PLLMu
|
|||
}
|
||||
#endif /* RCC_PLLSRC_PREDIV1_SUPPORT */
|
||||
|
||||
/**
|
||||
* @brief Configure PLL clock source
|
||||
* @rmtoll CFGR PLLSRC LL_RCC_PLL_SetMainSource
|
||||
* @param PLLSource This parameter can be one of the following values:
|
||||
* @arg @ref LL_RCC_PLLSOURCE_NONE
|
||||
* @arg @ref LL_RCC_PLLSOURCE_HSI (*)
|
||||
* @arg @ref LL_RCC_PLLSOURCE_HSI_DIV_2 (*)
|
||||
* @arg @ref LL_RCC_PLLSOURCE_HSE
|
||||
* @arg @ref LL_RCC_PLLSOURCE_HSI48 (*)
|
||||
*
|
||||
* (*) value not defined in all devices
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_RCC_PLL_SetMainSource(uint32_t PLLSource)
|
||||
{
|
||||
MODIFY_REG(RCC->CFGR, RCC_CFGR_PLLSRC, PLLSource);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get the oscillator used as PLL clock source.
|
||||
* @rmtoll CFGR PLLSRC LL_RCC_PLL_GetMainSource
|
||||
* @retval Returned value can be one of the following values:
|
||||
* @arg @ref LL_RCC_PLLSOURCE_NONE
|
||||
* @arg @ref LL_RCC_PLLSOURCE_HSI (*)
|
||||
* @arg @ref LL_RCC_PLLSOURCE_HSI_DIV_2 (*)
|
||||
* @arg @ref LL_RCC_PLLSOURCE_HSE
|
||||
|
|
|
@ -6,29 +6,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
@ -922,7 +906,7 @@ __STATIC_INLINE void LL_RTC_EnablePushPullMode(RTC_TypeDef *RTCx, uint32_t PinMa
|
|||
* @arg @ref LL_RTC_PIN_PC15
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_RTC_DisablePushPullMode(RTC_TypeDef* RTCx, uint32_t PinMask)
|
||||
__STATIC_INLINE void LL_RTC_DisablePushPullMode(RTC_TypeDef *RTCx, uint32_t PinMask)
|
||||
{
|
||||
CLEAR_BIT(RTCx->TAFCR, PinMask);
|
||||
}
|
||||
|
@ -938,7 +922,7 @@ __STATIC_INLINE void LL_RTC_DisablePushPullMode(RTC_TypeDef* RTCx, uint32_t PinM
|
|||
* @arg @ref LL_RTC_PIN_PC15
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_RTC_SetOutputPin(RTC_TypeDef* RTCx, uint32_t PinMask)
|
||||
__STATIC_INLINE void LL_RTC_SetOutputPin(RTC_TypeDef *RTCx, uint32_t PinMask)
|
||||
{
|
||||
SET_BIT(RTCx->TAFCR, (PinMask >> 1));
|
||||
}
|
||||
|
@ -954,7 +938,7 @@ __STATIC_INLINE void LL_RTC_SetOutputPin(RTC_TypeDef* RTCx, uint32_t PinMask)
|
|||
* @arg @ref LL_RTC_PIN_PC15
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_RTC_ResetOutputPin(RTC_TypeDef* RTCx, uint32_t PinMask)
|
||||
__STATIC_INLINE void LL_RTC_ResetOutputPin(RTC_TypeDef *RTCx, uint32_t PinMask)
|
||||
{
|
||||
CLEAR_BIT(RTCx->TAFCR, (PinMask >> 1));
|
||||
}
|
||||
|
@ -1251,7 +1235,7 @@ __STATIC_INLINE void LL_RTC_TIME_SetMinute(RTC_TypeDef *RTCx, uint32_t Minutes)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_RTC_TIME_GetMinute(RTC_TypeDef *RTCx)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(RTCx->TR, (RTC_TR_MNT | RTC_TR_MNU))>> RTC_TR_MNU_Pos);
|
||||
return (uint32_t)(READ_BIT(RTCx->TR, (RTC_TR_MNT | RTC_TR_MNU)) >> RTC_TR_MNU_Pos);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1572,7 +1556,7 @@ __STATIC_INLINE void LL_RTC_DATE_SetMonth(RTC_TypeDef *RTCx, uint32_t Month)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_RTC_DATE_GetMonth(RTC_TypeDef *RTCx)
|
||||
{
|
||||
return (uint32_t)((READ_BIT(RTCx->DR, (RTC_DR_MT | RTC_DR_MU)))>> RTC_DR_MU_Pos);
|
||||
return (uint32_t)((READ_BIT(RTCx->DR, (RTC_DR_MT | RTC_DR_MU))) >> RTC_DR_MU_Pos);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1891,7 +1875,7 @@ __STATIC_INLINE void LL_RTC_ALMA_SetHour(RTC_TypeDef *RTCx, uint32_t Hours)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_RTC_ALMA_GetHour(RTC_TypeDef *RTCx)
|
||||
{
|
||||
return (uint32_t)(( READ_BIT(RTCx->ALRMAR, (RTC_ALRMAR_HT | RTC_ALRMAR_HU))) >> RTC_ALRMAR_HU_Pos);
|
||||
return (uint32_t)((READ_BIT(RTCx->ALRMAR, (RTC_ALRMAR_HT | RTC_ALRMAR_HU))) >> RTC_ALRMAR_HU_Pos);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -2151,7 +2135,7 @@ __STATIC_INLINE void LL_RTC_ALMB_DisableWeekday(RTC_TypeDef *RTCx)
|
|||
*/
|
||||
__STATIC_INLINE void LL_RTC_ALMB_SetDay(RTC_TypeDef *RTCx, uint32_t Day)
|
||||
{
|
||||
MODIFY_REG(RTC->ALRMBR, (RTC_ALRMBR_DT | RTC_ALRMBR_DU),
|
||||
MODIFY_REG(RTCx->ALRMBR, (RTC_ALRMBR_DT | RTC_ALRMBR_DU),
|
||||
(((Day & 0xF0U) << (RTC_ALRMBR_DT_Pos - 4U)) | ((Day & 0x0FU) << RTC_ALRMBR_DU_Pos)));
|
||||
}
|
||||
|
||||
|
@ -2165,7 +2149,7 @@ __STATIC_INLINE void LL_RTC_ALMB_SetDay(RTC_TypeDef *RTCx, uint32_t Day)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_RTC_ALMB_GetDay(RTC_TypeDef *RTCx)
|
||||
{
|
||||
return (uint32_t)(( READ_BIT(RTCx->ALRMBR, (RTC_ALRMBR_DT | RTC_ALRMBR_DU))) >> RTC_ALRMBR_DU_Pos);
|
||||
return (uint32_t)((READ_BIT(RTCx->ALRMBR, (RTC_ALRMBR_DT | RTC_ALRMBR_DU))) >> RTC_ALRMBR_DU_Pos);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -2285,7 +2269,7 @@ __STATIC_INLINE void LL_RTC_ALMB_SetMinute(RTC_TypeDef *RTCx, uint32_t Minutes)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_RTC_ALMB_GetMinute(RTC_TypeDef *RTCx)
|
||||
{
|
||||
return (uint32_t)((READ_BIT(RTCx->ALRMBR, (RTC_ALRMBR_MNT | RTC_ALRMBR_MNU))) >> RTC_ALRMBR_MNU_Pos);
|
||||
return (uint32_t)((READ_BIT(RTCx->ALRMBR, (RTC_ALRMBR_MNT | RTC_ALRMBR_MNU))) >> RTC_ALRMBR_MNU_Pos);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -2342,7 +2326,7 @@ __STATIC_INLINE void LL_RTC_ALMB_ConfigTime(RTC_TypeDef *RTCx, uint32_t Format12
|
|||
(((Minutes & 0xF0U) << (RTC_ALRMBR_MNT_Pos - 4U)) | ((Minutes & 0x0FU) << RTC_ALRMBR_MNU_Pos)) | \
|
||||
(((Seconds & 0xF0U) << (RTC_ALRMBR_ST_Pos - 4U)) | ((Seconds & 0x0FU) << RTC_ALRMBR_SU_Pos));
|
||||
|
||||
MODIFY_REG(RTCx->ALRMBR, RTC_ALRMBR_PM| RTC_ALRMBR_HT | RTC_ALRMBR_HU | RTC_ALRMBR_MNT | RTC_ALRMBR_MNU | RTC_ALRMBR_ST | RTC_ALRMBR_SU, temp);
|
||||
MODIFY_REG(RTCx->ALRMBR, RTC_ALRMBR_PM | RTC_ALRMBR_HT | RTC_ALRMBR_HU | RTC_ALRMBR_MNT | RTC_ALRMBR_MNU | RTC_ALRMBR_ST | RTC_ALRMBR_SU, temp);
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
@ -6,36 +6,20 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_LL_SPI_H
|
||||
#define __STM32F3xx_LL_SPI_H
|
||||
#ifndef STM32F3xx_LL_SPI_H
|
||||
#define STM32F3xx_LL_SPI_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
@ -397,7 +381,7 @@ __STATIC_INLINE void LL_SPI_Disable(SPI_TypeDef *SPIx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_SPI_IsEnabled(SPI_TypeDef *SPIx)
|
||||
{
|
||||
return (READ_BIT(SPIx->CR1, SPI_CR1_SPE) == (SPI_CR1_SPE));
|
||||
return ((READ_BIT(SPIx->CR1, SPI_CR1_SPE) == (SPI_CR1_SPE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -738,7 +722,7 @@ __STATIC_INLINE void LL_SPI_DisableCRC(SPI_TypeDef *SPIx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_SPI_IsEnabledCRC(SPI_TypeDef *SPIx)
|
||||
{
|
||||
return (READ_BIT(SPIx->CR1, SPI_CR1_CRCEN) == (SPI_CR1_CRCEN));
|
||||
return ((READ_BIT(SPIx->CR1, SPI_CR1_CRCEN) == (SPI_CR1_CRCEN)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -902,7 +886,7 @@ __STATIC_INLINE void LL_SPI_DisableNSSPulseMgt(SPI_TypeDef *SPIx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_SPI_IsEnabledNSSPulse(SPI_TypeDef *SPIx)
|
||||
{
|
||||
return (READ_BIT(SPIx->CR2, SPI_CR2_NSSP) == (SPI_CR2_NSSP));
|
||||
return ((READ_BIT(SPIx->CR2, SPI_CR2_NSSP) == (SPI_CR2_NSSP)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -921,7 +905,7 @@ __STATIC_INLINE uint32_t LL_SPI_IsEnabledNSSPulse(SPI_TypeDef *SPIx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_RXNE(SPI_TypeDef *SPIx)
|
||||
{
|
||||
return (READ_BIT(SPIx->SR, SPI_SR_RXNE) == (SPI_SR_RXNE));
|
||||
return ((READ_BIT(SPIx->SR, SPI_SR_RXNE) == (SPI_SR_RXNE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -932,7 +916,7 @@ __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_RXNE(SPI_TypeDef *SPIx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_TXE(SPI_TypeDef *SPIx)
|
||||
{
|
||||
return (READ_BIT(SPIx->SR, SPI_SR_TXE) == (SPI_SR_TXE));
|
||||
return ((READ_BIT(SPIx->SR, SPI_SR_TXE) == (SPI_SR_TXE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -943,7 +927,7 @@ __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_TXE(SPI_TypeDef *SPIx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_CRCERR(SPI_TypeDef *SPIx)
|
||||
{
|
||||
return (READ_BIT(SPIx->SR, SPI_SR_CRCERR) == (SPI_SR_CRCERR));
|
||||
return ((READ_BIT(SPIx->SR, SPI_SR_CRCERR) == (SPI_SR_CRCERR)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -954,7 +938,7 @@ __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_CRCERR(SPI_TypeDef *SPIx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_MODF(SPI_TypeDef *SPIx)
|
||||
{
|
||||
return (READ_BIT(SPIx->SR, SPI_SR_MODF) == (SPI_SR_MODF));
|
||||
return ((READ_BIT(SPIx->SR, SPI_SR_MODF) == (SPI_SR_MODF)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -965,7 +949,7 @@ __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_MODF(SPI_TypeDef *SPIx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_OVR(SPI_TypeDef *SPIx)
|
||||
{
|
||||
return (READ_BIT(SPIx->SR, SPI_SR_OVR) == (SPI_SR_OVR));
|
||||
return ((READ_BIT(SPIx->SR, SPI_SR_OVR) == (SPI_SR_OVR)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -983,7 +967,7 @@ __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_OVR(SPI_TypeDef *SPIx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_BSY(SPI_TypeDef *SPIx)
|
||||
{
|
||||
return (READ_BIT(SPIx->SR, SPI_SR_BSY) == (SPI_SR_BSY));
|
||||
return ((READ_BIT(SPIx->SR, SPI_SR_BSY) == (SPI_SR_BSY)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -994,7 +978,7 @@ __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_BSY(SPI_TypeDef *SPIx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_FRE(SPI_TypeDef *SPIx)
|
||||
{
|
||||
return (READ_BIT(SPIx->SR, SPI_SR_FRE) == (SPI_SR_FRE));
|
||||
return ((READ_BIT(SPIx->SR, SPI_SR_FRE) == (SPI_SR_FRE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1048,11 +1032,10 @@ __STATIC_INLINE void LL_SPI_ClearFlag_CRCERR(SPI_TypeDef *SPIx)
|
|||
*/
|
||||
__STATIC_INLINE void LL_SPI_ClearFlag_MODF(SPI_TypeDef *SPIx)
|
||||
{
|
||||
__IO uint32_t tmpreg;
|
||||
tmpreg = SPIx->SR;
|
||||
(void) tmpreg;
|
||||
tmpreg = CLEAR_BIT(SPIx->CR1, SPI_CR1_SPE);
|
||||
(void) tmpreg;
|
||||
__IO uint32_t tmpreg_sr;
|
||||
tmpreg_sr = SPIx->SR;
|
||||
(void) tmpreg_sr;
|
||||
CLEAR_BIT(SPIx->CR1, SPI_CR1_SPE);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1170,7 +1153,7 @@ __STATIC_INLINE void LL_SPI_DisableIT_TXE(SPI_TypeDef *SPIx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_ERR(SPI_TypeDef *SPIx)
|
||||
{
|
||||
return (READ_BIT(SPIx->CR2, SPI_CR2_ERRIE) == (SPI_CR2_ERRIE));
|
||||
return ((READ_BIT(SPIx->CR2, SPI_CR2_ERRIE) == (SPI_CR2_ERRIE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1181,7 +1164,7 @@ __STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_ERR(SPI_TypeDef *SPIx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_RXNE(SPI_TypeDef *SPIx)
|
||||
{
|
||||
return (READ_BIT(SPIx->CR2, SPI_CR2_RXNEIE) == (SPI_CR2_RXNEIE));
|
||||
return ((READ_BIT(SPIx->CR2, SPI_CR2_RXNEIE) == (SPI_CR2_RXNEIE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1192,7 +1175,7 @@ __STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_RXNE(SPI_TypeDef *SPIx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_TXE(SPI_TypeDef *SPIx)
|
||||
{
|
||||
return (READ_BIT(SPIx->CR2, SPI_CR2_TXEIE) == (SPI_CR2_TXEIE));
|
||||
return ((READ_BIT(SPIx->CR2, SPI_CR2_TXEIE) == (SPI_CR2_TXEIE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1233,7 +1216,7 @@ __STATIC_INLINE void LL_SPI_DisableDMAReq_RX(SPI_TypeDef *SPIx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_SPI_IsEnabledDMAReq_RX(SPI_TypeDef *SPIx)
|
||||
{
|
||||
return (READ_BIT(SPIx->CR2, SPI_CR2_RXDMAEN) == (SPI_CR2_RXDMAEN));
|
||||
return ((READ_BIT(SPIx->CR2, SPI_CR2_RXDMAEN) == (SPI_CR2_RXDMAEN)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1266,7 +1249,7 @@ __STATIC_INLINE void LL_SPI_DisableDMAReq_TX(SPI_TypeDef *SPIx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_SPI_IsEnabledDMAReq_TX(SPI_TypeDef *SPIx)
|
||||
{
|
||||
return (READ_BIT(SPIx->CR2, SPI_CR2_TXDMAEN) == (SPI_CR2_TXDMAEN));
|
||||
return ((READ_BIT(SPIx->CR2, SPI_CR2_TXDMAEN) == (SPI_CR2_TXDMAEN)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1331,7 +1314,7 @@ __STATIC_INLINE uint32_t LL_SPI_GetDMAParity_TX(SPI_TypeDef *SPIx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_SPI_DMA_GetRegAddr(SPI_TypeDef *SPIx)
|
||||
{
|
||||
return (uint32_t) & (SPIx->DR);
|
||||
return (uint32_t) &(SPIx->DR);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1378,7 +1361,7 @@ __STATIC_INLINE void LL_SPI_TransmitData8(SPI_TypeDef *SPIx, uint8_t TxData)
|
|||
*spidr = TxData;
|
||||
#else
|
||||
*((__IO uint8_t *)&SPIx->DR) = TxData;
|
||||
#endif
|
||||
#endif /* __GNUC__ */
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1394,8 +1377,8 @@ __STATIC_INLINE void LL_SPI_TransmitData16(SPI_TypeDef *SPIx, uint16_t TxData)
|
|||
__IO uint16_t *spidr = ((__IO uint16_t *)&SPIx->DR);
|
||||
*spidr = TxData;
|
||||
#else
|
||||
*((__IO uint16_t *)&SPIx->DR) = TxData;
|
||||
#endif
|
||||
SPIx->DR = TxData;
|
||||
#endif /* __GNUC__ */
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1676,7 +1659,7 @@ __STATIC_INLINE void LL_I2S_Disable(SPI_TypeDef *SPIx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2S_IsEnabled(SPI_TypeDef *SPIx)
|
||||
{
|
||||
return (READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SE) == (SPI_I2SCFGR_I2SE));
|
||||
return ((READ_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SE) == (SPI_I2SCFGR_I2SE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1885,7 +1868,7 @@ __STATIC_INLINE void LL_I2S_DisableMasterClock(SPI_TypeDef *SPIx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2S_IsEnabledMasterClock(SPI_TypeDef *SPIx)
|
||||
{
|
||||
return (READ_BIT(SPIx->I2SPR, SPI_I2SPR_MCKOE) == (SPI_I2SPR_MCKOE));
|
||||
return ((READ_BIT(SPIx->I2SPR, SPI_I2SPR_MCKOE) == (SPI_I2SPR_MCKOE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1948,7 +1931,7 @@ __STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_OVR(SPI_TypeDef *SPIx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_UDR(SPI_TypeDef *SPIx)
|
||||
{
|
||||
return (READ_BIT(SPIx->SR, SPI_SR_UDR) == (SPI_SR_UDR));
|
||||
return ((READ_BIT(SPIx->SR, SPI_SR_UDR) == (SPI_SR_UDR)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1973,7 +1956,7 @@ __STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_FRE(SPI_TypeDef *SPIx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_I2S_IsActiveFlag_CHSIDE(SPI_TypeDef *SPIx)
|
||||
{
|
||||
return (READ_BIT(SPIx->SR, SPI_SR_CHSIDE) == (SPI_SR_CHSIDE));
|
||||
return ((READ_BIT(SPIx->SR, SPI_SR_CHSIDE) == (SPI_SR_CHSIDE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -2266,6 +2249,6 @@ ErrorStatus LL_I2S_InitFullDuplex(SPI_TypeDef *I2Sxext, LL_I2S_InitTypeDef *I2S_
|
|||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F3xx_LL_SPI_H */
|
||||
#endif /* STM32F3xx_LL_SPI_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
|
@ -18,29 +18,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -6,36 +6,20 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_LL_USART_H
|
||||
#define __STM32F3xx_LL_USART_H
|
||||
#ifndef STM32F3xx_LL_USART_H
|
||||
#define STM32F3xx_LL_USART_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
@ -58,13 +42,6 @@ extern "C" {
|
|||
/* Private variables ---------------------------------------------------------*/
|
||||
|
||||
/* Private constants ---------------------------------------------------------*/
|
||||
/** @defgroup USART_LL_Private_Constants USART Private Constants
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
#if defined(USE_FULL_LL_DRIVER)
|
||||
/** @defgroup USART_LL_Private_Macros USART Private Macros
|
||||
|
@ -86,6 +63,7 @@ extern "C" {
|
|||
*/
|
||||
typedef struct
|
||||
{
|
||||
|
||||
uint32_t BaudRate; /*!< This field defines expected Usart communication baud rate.
|
||||
|
||||
This feature can be modified afterwards using unitary function @ref LL_USART_SetBaudRate().*/
|
||||
|
@ -171,7 +149,7 @@ typedef struct
|
|||
*/
|
||||
#define LL_USART_ICR_PECF USART_ICR_PECF /*!< Parity error flag */
|
||||
#define LL_USART_ICR_FECF USART_ICR_FECF /*!< Framing error flag */
|
||||
#define LL_USART_ICR_NCF USART_ICR_NCF /*!< Noise detected flag */
|
||||
#define LL_USART_ICR_NCF USART_ICR_NCF /*!< Noise error detected flag */
|
||||
#define LL_USART_ICR_ORECF USART_ICR_ORECF /*!< Overrun error flag */
|
||||
#define LL_USART_ICR_IDLECF USART_ICR_IDLECF /*!< Idle line detected flag */
|
||||
#define LL_USART_ICR_TCCF USART_ICR_TCCF /*!< Transmission complete flag */
|
||||
|
@ -275,7 +253,7 @@ typedef struct
|
|||
#else
|
||||
#define LL_USART_DATAWIDTH_8B 0x00000000U /*!< 8 bits word length : Start bit, 8 data bits, n stop bits */
|
||||
#define LL_USART_DATAWIDTH_9B USART_CR1_M /*!< 9 bits word length : Start bit, 9 data bits, n stop bits */
|
||||
#endif
|
||||
#endif/* USART_7BITS_SUPPORT */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -505,7 +483,8 @@ typedef struct
|
|||
* @param __BAUDRATE__ Baud rate value to achieve
|
||||
* @retval USARTDIV value to be used for BRR register filling in OverSampling_8 case
|
||||
*/
|
||||
#define __LL_USART_DIV_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) ((((__PERIPHCLK__)*2) + ((__BAUDRATE__)/2))/(__BAUDRATE__))
|
||||
#define __LL_USART_DIV_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) ((((__PERIPHCLK__)*2U)\
|
||||
+ ((__BAUDRATE__)/2U))/(__BAUDRATE__))
|
||||
|
||||
/**
|
||||
* @brief Compute USARTDIV value according to Peripheral Clock and
|
||||
|
@ -514,7 +493,7 @@ typedef struct
|
|||
* @param __BAUDRATE__ Baud rate value to achieve
|
||||
* @retval USARTDIV value to be used for BRR register filling in OverSampling_16 case
|
||||
*/
|
||||
#define __LL_USART_DIV_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (((__PERIPHCLK__) + ((__BAUDRATE__)/2))/(__BAUDRATE__))
|
||||
#define __LL_USART_DIV_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (((__PERIPHCLK__) + ((__BAUDRATE__)/2U))/(__BAUDRATE__))
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
@ -567,7 +546,7 @@ __STATIC_INLINE void LL_USART_Disable(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabled(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR1, USART_CR1_UE) == (USART_CR1_UE));
|
||||
return ((READ_BIT(USARTx->CR1, USART_CR1_UE) == (USART_CR1_UE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -609,7 +588,7 @@ __STATIC_INLINE void LL_USART_DisableInStopMode(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledInStopMode(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR1, USART_CR1_UESM) == (USART_CR1_UESM));
|
||||
return ((READ_BIT(USARTx->CR1, USART_CR1_UESM) == (USART_CR1_UESM)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -816,7 +795,7 @@ __STATIC_INLINE void LL_USART_DisableMuteMode(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledMuteMode(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR1, USART_CR1_MME) == (USART_CR1_MME));
|
||||
return ((READ_BIT(USARTx->CR1, USART_CR1_MME) == (USART_CR1_MME)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1004,7 +983,7 @@ __STATIC_INLINE void LL_USART_DisableSCLKOutput(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledSCLKOutput(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR2, USART_CR2_CLKEN) == (USART_CR2_CLKEN));
|
||||
return ((READ_BIT(USARTx->CR2, USART_CR2_CLKEN) == (USART_CR2_CLKEN)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1251,7 +1230,7 @@ __STATIC_INLINE void LL_USART_DisableAutoBaudRate(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledAutoBaud(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR2, USART_CR2_ABREN) == (USART_CR2_ABREN));
|
||||
return ((READ_BIT(USARTx->CR2, USART_CR2_ABREN) == (USART_CR2_ABREN)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1319,7 +1298,7 @@ __STATIC_INLINE void LL_USART_DisableRxTimeout(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledRxTimeout(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR2, USART_CR2_RTOEN) == (USART_CR2_RTOEN));
|
||||
return ((READ_BIT(USARTx->CR2, USART_CR2_RTOEN) == (USART_CR2_RTOEN)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1498,7 +1477,7 @@ __STATIC_INLINE void LL_USART_DisableOneBitSamp(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledOneBitSamp(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR3, USART_CR3_ONEBIT) == (USART_CR3_ONEBIT));
|
||||
return ((READ_BIT(USARTx->CR3, USART_CR3_ONEBIT) == (USART_CR3_ONEBIT)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1531,7 +1510,7 @@ __STATIC_INLINE void LL_USART_DisableOverrunDetect(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledOverrunDetect(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR3, USART_CR3_OVRDIS) != USART_CR3_OVRDIS);
|
||||
return ((READ_BIT(USARTx->CR3, USART_CR3_OVRDIS) != USART_CR3_OVRDIS) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1586,8 +1565,8 @@ __STATIC_INLINE uint32_t LL_USART_GetWKUPType(USART_TypeDef *USARTx)
|
|||
__STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling,
|
||||
uint32_t BaudRate)
|
||||
{
|
||||
register uint32_t usartdiv = 0x0U;
|
||||
register uint32_t brrtemp = 0x0U;
|
||||
uint32_t usartdiv;
|
||||
register uint32_t brrtemp;
|
||||
|
||||
if (OverSampling == LL_USART_OVERSAMPLING_8)
|
||||
{
|
||||
|
@ -1617,16 +1596,20 @@ __STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx, uint32_t Periph
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_GetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling)
|
||||
{
|
||||
register uint32_t usartdiv = 0x0U;
|
||||
register uint32_t usartdiv;
|
||||
register uint32_t brrresult = 0x0U;
|
||||
|
||||
usartdiv = USARTx->BRR;
|
||||
|
||||
if (OverSampling == LL_USART_OVERSAMPLING_8)
|
||||
if (usartdiv == 0U)
|
||||
{
|
||||
if ((usartdiv & 0xFFF7U) != 0U)
|
||||
/* Do not perform a division by 0 */
|
||||
}
|
||||
else if (OverSampling == LL_USART_OVERSAMPLING_8)
|
||||
{
|
||||
usartdiv = (uint16_t)((usartdiv & 0xFFF0U) | ((usartdiv & 0x0007U) << 1U)) ;
|
||||
if (usartdiv != 0U)
|
||||
{
|
||||
usartdiv = (uint16_t)((usartdiv & 0xFFF0U) | ((usartdiv & 0x0007U) << 1U)) ;
|
||||
brrresult = (PeriphClk * 2U) / usartdiv;
|
||||
}
|
||||
}
|
||||
|
@ -1730,7 +1713,7 @@ __STATIC_INLINE void LL_USART_DisableIrda(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledIrda(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN));
|
||||
return ((READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1776,7 +1759,7 @@ __STATIC_INLINE uint32_t LL_USART_GetIrdaPowerMode(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE void LL_USART_SetIrdaPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue)
|
||||
{
|
||||
MODIFY_REG(USARTx->GTPR, USART_GTPR_PSC, PrescalerValue);
|
||||
MODIFY_REG(USARTx->GTPR, (uint16_t)USART_GTPR_PSC, (uint16_t)PrescalerValue);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1837,7 +1820,7 @@ __STATIC_INLINE void LL_USART_DisableSmartcardNACK(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcardNACK(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR3, USART_CR3_NACK) == (USART_CR3_NACK));
|
||||
return ((READ_BIT(USARTx->CR3, USART_CR3_NACK) == (USART_CR3_NACK)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1876,7 +1859,7 @@ __STATIC_INLINE void LL_USART_DisableSmartcard(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcard(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR3, USART_CR3_SCEN) == (USART_CR3_SCEN));
|
||||
return ((READ_BIT(USARTx->CR3, USART_CR3_SCEN) == (USART_CR3_SCEN)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1923,7 +1906,7 @@ __STATIC_INLINE uint32_t LL_USART_GetSmartcardAutoRetryCount(USART_TypeDef *USAR
|
|||
*/
|
||||
__STATIC_INLINE void LL_USART_SetSmartcardPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue)
|
||||
{
|
||||
MODIFY_REG(USARTx->GTPR, USART_GTPR_PSC, PrescalerValue);
|
||||
MODIFY_REG(USARTx->GTPR, (uint16_t)USART_GTPR_PSC, (uint16_t)PrescalerValue);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1952,7 +1935,7 @@ __STATIC_INLINE uint32_t LL_USART_GetSmartcardPrescaler(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE void LL_USART_SetSmartcardGuardTime(USART_TypeDef *USARTx, uint32_t GuardTime)
|
||||
{
|
||||
MODIFY_REG(USARTx->GTPR, USART_GTPR_GT, GuardTime << USART_GTPR_GT_Pos);
|
||||
MODIFY_REG(USARTx->GTPR, (uint16_t)USART_GTPR_GT, (uint16_t)(GuardTime << USART_GTPR_GT_Pos));
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -2013,7 +1996,7 @@ __STATIC_INLINE void LL_USART_DisableHalfDuplex(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledHalfDuplex(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL));
|
||||
return ((READ_BIT(USARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -2091,7 +2074,7 @@ __STATIC_INLINE void LL_USART_DisableLIN(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledLIN(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR2, USART_CR2_LINEN) == (USART_CR2_LINEN));
|
||||
return ((READ_BIT(USARTx->CR2, USART_CR2_LINEN) == (USART_CR2_LINEN)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -2192,7 +2175,7 @@ __STATIC_INLINE void LL_USART_DisableDEMode(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledDEMode(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR3, USART_CR3_DEM) == (USART_CR3_DEM));
|
||||
return ((READ_BIT(USARTx->CR3, USART_CR3_DEM) == (USART_CR3_DEM)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -2263,7 +2246,8 @@ __STATIC_INLINE void LL_USART_ConfigAsyncMode(USART_TypeDef *USARTx)
|
|||
{
|
||||
/* In Asynchronous mode, the following bits must be kept cleared:
|
||||
- LINEN, CLKEN bits in the USART_CR2 register,
|
||||
- SCEN, IREN and HDSEL bits in the USART_CR3 register.*/
|
||||
- SCEN, IREN and HDSEL bits in the USART_CR3 register.
|
||||
*/
|
||||
CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
|
||||
CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));
|
||||
}
|
||||
|
@ -2299,7 +2283,8 @@ __STATIC_INLINE void LL_USART_ConfigSyncMode(USART_TypeDef *USARTx)
|
|||
{
|
||||
/* In Synchronous mode, the following bits must be kept cleared:
|
||||
- LINEN bit in the USART_CR2 register,
|
||||
- SCEN, IREN and HDSEL bits in the USART_CR3 register.*/
|
||||
- SCEN, IREN and HDSEL bits in the USART_CR3 register.
|
||||
*/
|
||||
CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN));
|
||||
CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));
|
||||
/* set the UART/USART in Synchronous mode */
|
||||
|
@ -2339,7 +2324,8 @@ __STATIC_INLINE void LL_USART_ConfigLINMode(USART_TypeDef *USARTx)
|
|||
{
|
||||
/* In LIN mode, the following bits must be kept cleared:
|
||||
- STOP and CLKEN bits in the USART_CR2 register,
|
||||
- IREN, SCEN and HDSEL bits in the USART_CR3 register.*/
|
||||
- IREN, SCEN and HDSEL bits in the USART_CR3 register.
|
||||
*/
|
||||
CLEAR_BIT(USARTx->CR2, (USART_CR2_CLKEN | USART_CR2_STOP));
|
||||
CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL));
|
||||
/* Set the UART/USART in LIN mode */
|
||||
|
@ -2377,7 +2363,8 @@ __STATIC_INLINE void LL_USART_ConfigHalfDuplexMode(USART_TypeDef *USARTx)
|
|||
{
|
||||
/* In Half Duplex mode, the following bits must be kept cleared:
|
||||
- LINEN and CLKEN bits in the USART_CR2 register,
|
||||
- SCEN and IREN bits in the USART_CR3 register.*/
|
||||
- SCEN and IREN bits in the USART_CR3 register.
|
||||
*/
|
||||
CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
|
||||
CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN));
|
||||
/* set the UART/USART in Half Duplex mode */
|
||||
|
@ -2417,7 +2404,8 @@ __STATIC_INLINE void LL_USART_ConfigSmartcardMode(USART_TypeDef *USARTx)
|
|||
{
|
||||
/* In Smartcard mode, the following bits must be kept cleared:
|
||||
- LINEN bit in the USART_CR2 register,
|
||||
- IREN and HDSEL bits in the USART_CR3 register.*/
|
||||
- IREN and HDSEL bits in the USART_CR3 register.
|
||||
*/
|
||||
CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN));
|
||||
CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL));
|
||||
/* Configure Stop bits to 1.5 bits */
|
||||
|
@ -2460,7 +2448,8 @@ __STATIC_INLINE void LL_USART_ConfigIrdaMode(USART_TypeDef *USARTx)
|
|||
{
|
||||
/* In IRDA mode, the following bits must be kept cleared:
|
||||
- LINEN, STOP and CLKEN bits in the USART_CR2 register,
|
||||
- SCEN and HDSEL bits in the USART_CR3 register.*/
|
||||
- SCEN and HDSEL bits in the USART_CR3 register.
|
||||
*/
|
||||
CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN | USART_CR2_STOP));
|
||||
CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL));
|
||||
/* set the UART/USART in IRDA mode */
|
||||
|
@ -2498,7 +2487,8 @@ __STATIC_INLINE void LL_USART_ConfigMultiProcessMode(USART_TypeDef *USARTx)
|
|||
{
|
||||
/* In Multi Processor mode, the following bits must be kept cleared:
|
||||
- LINEN and CLKEN bits in the USART_CR2 register,
|
||||
- IREN, SCEN and HDSEL bits in the USART_CR3 register.*/
|
||||
- IREN, SCEN and HDSEL bits in the USART_CR3 register.
|
||||
*/
|
||||
CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
|
||||
CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
|
||||
}
|
||||
|
@ -2519,7 +2509,7 @@ __STATIC_INLINE void LL_USART_ConfigMultiProcessMode(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_PE(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->ISR, USART_ISR_PE) == (USART_ISR_PE));
|
||||
return ((READ_BIT(USARTx->ISR, USART_ISR_PE) == (USART_ISR_PE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -2530,18 +2520,18 @@ __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_PE(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_FE(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->ISR, USART_ISR_FE) == (USART_ISR_FE));
|
||||
return ((READ_BIT(USARTx->ISR, USART_ISR_FE) == (USART_ISR_FE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check if the USART Noise error detected Flag is set or not
|
||||
* @rmtoll ISR NF LL_USART_IsActiveFlag_NE
|
||||
* @rmtoll ISR NE LL_USART_IsActiveFlag_NE
|
||||
* @param USARTx USART Instance
|
||||
* @retval State of bit (1 or 0).
|
||||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_NE(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->ISR, USART_ISR_NE) == (USART_ISR_NE));
|
||||
return ((READ_BIT(USARTx->ISR, USART_ISR_NE) == (USART_ISR_NE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -2552,7 +2542,7 @@ __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_NE(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ORE(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->ISR, USART_ISR_ORE) == (USART_ISR_ORE));
|
||||
return ((READ_BIT(USARTx->ISR, USART_ISR_ORE) == (USART_ISR_ORE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -2563,7 +2553,7 @@ __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ORE(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_IDLE(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->ISR, USART_ISR_IDLE) == (USART_ISR_IDLE));
|
||||
return ((READ_BIT(USARTx->ISR, USART_ISR_IDLE) == (USART_ISR_IDLE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -2574,7 +2564,7 @@ __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_IDLE(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RXNE(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->ISR, USART_ISR_RXNE) == (USART_ISR_RXNE));
|
||||
return ((READ_BIT(USARTx->ISR, USART_ISR_RXNE) == (USART_ISR_RXNE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -2585,7 +2575,7 @@ __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RXNE(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TC(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->ISR, USART_ISR_TC) == (USART_ISR_TC));
|
||||
return ((READ_BIT(USARTx->ISR, USART_ISR_TC) == (USART_ISR_TC)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -2596,7 +2586,7 @@ __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TC(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TXE(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->ISR, USART_ISR_TXE) == (USART_ISR_TXE));
|
||||
return ((READ_BIT(USARTx->ISR, USART_ISR_TXE) == (USART_ISR_TXE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -2609,7 +2599,7 @@ __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TXE(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_LBD(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->ISR, USART_ISR_LBDF) == (USART_ISR_LBDF));
|
||||
return ((READ_BIT(USARTx->ISR, USART_ISR_LBDF) == (USART_ISR_LBDF)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -2622,7 +2612,7 @@ __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_LBD(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_nCTS(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->ISR, USART_ISR_CTSIF) == (USART_ISR_CTSIF));
|
||||
return ((READ_BIT(USARTx->ISR, USART_ISR_CTSIF) == (USART_ISR_CTSIF)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -2635,7 +2625,7 @@ __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_nCTS(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_CTS(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->ISR, USART_ISR_CTS) == (USART_ISR_CTS));
|
||||
return ((READ_BIT(USARTx->ISR, USART_ISR_CTS) == (USART_ISR_CTS)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -2646,7 +2636,7 @@ __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_CTS(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RTO(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->ISR, USART_ISR_RTOF) == (USART_ISR_RTOF));
|
||||
return ((READ_BIT(USARTx->ISR, USART_ISR_RTOF) == (USART_ISR_RTOF)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -2659,7 +2649,7 @@ __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RTO(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_EOB(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->ISR, USART_ISR_EOBF) == (USART_ISR_EOBF));
|
||||
return ((READ_BIT(USARTx->ISR, USART_ISR_EOBF) == (USART_ISR_EOBF)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -2672,7 +2662,7 @@ __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_EOB(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ABRE(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->ISR, USART_ISR_ABRE) == (USART_ISR_ABRE));
|
||||
return ((READ_BIT(USARTx->ISR, USART_ISR_ABRE) == (USART_ISR_ABRE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -2685,7 +2675,7 @@ __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ABRE(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ABR(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->ISR, USART_ISR_ABRF) == (USART_ISR_ABRF));
|
||||
return ((READ_BIT(USARTx->ISR, USART_ISR_ABRF) == (USART_ISR_ABRF)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -2696,7 +2686,7 @@ __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ABR(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_BUSY(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->ISR, USART_ISR_BUSY) == (USART_ISR_BUSY));
|
||||
return ((READ_BIT(USARTx->ISR, USART_ISR_BUSY) == (USART_ISR_BUSY)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -2707,7 +2697,7 @@ __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_BUSY(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_CM(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->ISR, USART_ISR_CMF) == (USART_ISR_CMF));
|
||||
return ((READ_BIT(USARTx->ISR, USART_ISR_CMF) == (USART_ISR_CMF)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -2718,7 +2708,7 @@ __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_CM(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_SBK(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->ISR, USART_ISR_SBKF) == (USART_ISR_SBKF));
|
||||
return ((READ_BIT(USARTx->ISR, USART_ISR_SBKF) == (USART_ISR_SBKF)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -2729,7 +2719,7 @@ __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_SBK(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RWU(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->ISR, USART_ISR_RWU) == (USART_ISR_RWU));
|
||||
return ((READ_BIT(USARTx->ISR, USART_ISR_RWU) == (USART_ISR_RWU)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -2742,7 +2732,7 @@ __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RWU(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_WKUP(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->ISR, USART_ISR_WUF) == (USART_ISR_WUF));
|
||||
return ((READ_BIT(USARTx->ISR, USART_ISR_WUF) == (USART_ISR_WUF)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -2753,7 +2743,7 @@ __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_WKUP(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TEACK(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->ISR, USART_ISR_TEACK) == (USART_ISR_TEACK));
|
||||
return ((READ_BIT(USARTx->ISR, USART_ISR_TEACK) == (USART_ISR_TEACK)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -2764,10 +2754,9 @@ __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TEACK(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_REACK(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->ISR, USART_ISR_REACK) == (USART_ISR_REACK));
|
||||
return ((READ_BIT(USARTx->ISR, USART_ISR_REACK) == (USART_ISR_REACK)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Clear Parity Error Flag
|
||||
* @rmtoll ICR PECF LL_USART_ClearFlag_PE
|
||||
|
@ -2791,7 +2780,7 @@ __STATIC_INLINE void LL_USART_ClearFlag_FE(USART_TypeDef *USARTx)
|
|||
}
|
||||
|
||||
/**
|
||||
* @brief Clear Noise detected Flag
|
||||
* @brief Clear Noise Error detected Flag
|
||||
* @rmtoll ICR NCF LL_USART_ClearFlag_NE
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
|
@ -3215,7 +3204,7 @@ __STATIC_INLINE void LL_USART_DisableIT_WKUP(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_IDLE(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE));
|
||||
return ((READ_BIT(USARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -3226,7 +3215,7 @@ __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_IDLE(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RXNE(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR1, USART_CR1_RXNEIE) == (USART_CR1_RXNEIE));
|
||||
return ((READ_BIT(USARTx->CR1, USART_CR1_RXNEIE) == (USART_CR1_RXNEIE)) ? 1U : 0U);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -3237,7 +3226,7 @@ __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RXNE(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TC(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE));
|
||||
return ((READ_BIT(USARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -3248,7 +3237,7 @@ __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TC(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TXE(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR1, USART_CR1_TXEIE) == (USART_CR1_TXEIE));
|
||||
return ((READ_BIT(USARTx->CR1, USART_CR1_TXEIE) == (USART_CR1_TXEIE)) ? 1U : 0U);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -3259,7 +3248,7 @@ __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TXE(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_PE(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR1, USART_CR1_PEIE) == (USART_CR1_PEIE));
|
||||
return ((READ_BIT(USARTx->CR1, USART_CR1_PEIE) == (USART_CR1_PEIE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -3270,7 +3259,7 @@ __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_PE(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CM(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR1, USART_CR1_CMIE) == (USART_CR1_CMIE));
|
||||
return ((READ_BIT(USARTx->CR1, USART_CR1_CMIE) == (USART_CR1_CMIE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -3281,7 +3270,7 @@ __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CM(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RTO(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR1, USART_CR1_RTOIE) == (USART_CR1_RTOIE));
|
||||
return ((READ_BIT(USARTx->CR1, USART_CR1_RTOIE) == (USART_CR1_RTOIE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -3294,7 +3283,7 @@ __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RTO(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_EOB(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR1, USART_CR1_EOBIE) == (USART_CR1_EOBIE));
|
||||
return ((READ_BIT(USARTx->CR1, USART_CR1_EOBIE) == (USART_CR1_EOBIE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -3307,7 +3296,7 @@ __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_EOB(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_LBD(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR2, USART_CR2_LBDIE) == (USART_CR2_LBDIE));
|
||||
return ((READ_BIT(USARTx->CR2, USART_CR2_LBDIE) == (USART_CR2_LBDIE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -3318,7 +3307,7 @@ __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_LBD(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_ERROR(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE));
|
||||
return ((READ_BIT(USARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -3331,7 +3320,7 @@ __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_ERROR(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CTS(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE));
|
||||
return ((READ_BIT(USARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -3344,7 +3333,7 @@ __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CTS(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_WKUP(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR3, USART_CR3_WUFIE) == (USART_CR3_WUFIE));
|
||||
return ((READ_BIT(USARTx->CR3, USART_CR3_WUFIE) == (USART_CR3_WUFIE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
|
||||
|
@ -3386,7 +3375,7 @@ __STATIC_INLINE void LL_USART_DisableDMAReq_RX(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_RX(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR));
|
||||
return ((READ_BIT(USARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -3419,7 +3408,7 @@ __STATIC_INLINE void LL_USART_DisableDMAReq_TX(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_TX(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT));
|
||||
return ((READ_BIT(USARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -3452,7 +3441,7 @@ __STATIC_INLINE void LL_USART_DisableDMADeactOnRxErr(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_IsEnabledDMADeactOnRxErr(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (READ_BIT(USARTx->CR3, USART_CR3_DDRE) == (USART_CR3_DDRE));
|
||||
return ((READ_BIT(USARTx->CR3, USART_CR3_DDRE) == (USART_CR3_DDRE)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -3467,7 +3456,7 @@ __STATIC_INLINE uint32_t LL_USART_IsEnabledDMADeactOnRxErr(USART_TypeDef *USARTx
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_USART_DMA_GetRegAddr(USART_TypeDef *USARTx, uint32_t Direction)
|
||||
{
|
||||
register uint32_t data_reg_addr = 0U;
|
||||
register uint32_t data_reg_addr;
|
||||
|
||||
if (Direction == LL_USART_DMA_REG_DATA_TRANSMIT)
|
||||
{
|
||||
|
@ -3499,7 +3488,7 @@ __STATIC_INLINE uint32_t LL_USART_DMA_GetRegAddr(USART_TypeDef *USARTx, uint32_t
|
|||
*/
|
||||
__STATIC_INLINE uint8_t LL_USART_ReceiveData8(USART_TypeDef *USARTx)
|
||||
{
|
||||
return (uint8_t)(READ_BIT(USARTx->RDR, USART_RDR_RDR));
|
||||
return (uint8_t)(READ_BIT(USARTx->RDR, USART_RDR_RDR) & 0xFFU);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -3534,7 +3523,7 @@ __STATIC_INLINE void LL_USART_TransmitData8(USART_TypeDef *USARTx, uint8_t Value
|
|||
*/
|
||||
__STATIC_INLINE void LL_USART_TransmitData9(USART_TypeDef *USARTx, uint16_t Value)
|
||||
{
|
||||
USARTx->TDR = Value & 0x1FFU;
|
||||
USARTx->TDR = (uint16_t)(Value & 0x1FFUL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -3555,7 +3544,7 @@ __STATIC_INLINE void LL_USART_TransmitData9(USART_TypeDef *USARTx, uint16_t Valu
|
|||
*/
|
||||
__STATIC_INLINE void LL_USART_RequestAutoBaudRate(USART_TypeDef *USARTx)
|
||||
{
|
||||
SET_BIT(USARTx->RQR, USART_RQR_ABRRQ);
|
||||
SET_BIT(USARTx->RQR, (uint16_t)USART_RQR_ABRRQ);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -3566,7 +3555,7 @@ __STATIC_INLINE void LL_USART_RequestAutoBaudRate(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE void LL_USART_RequestBreakSending(USART_TypeDef *USARTx)
|
||||
{
|
||||
SET_BIT(USARTx->RQR, USART_RQR_SBKRQ);
|
||||
SET_BIT(USARTx->RQR, (uint16_t)USART_RQR_SBKRQ);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -3577,18 +3566,20 @@ __STATIC_INLINE void LL_USART_RequestBreakSending(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE void LL_USART_RequestEnterMuteMode(USART_TypeDef *USARTx)
|
||||
{
|
||||
SET_BIT(USARTx->RQR, USART_RQR_MMRQ);
|
||||
SET_BIT(USARTx->RQR, (uint16_t)USART_RQR_MMRQ);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Request a Receive Data flush
|
||||
* @note Allows to discard the received data without reading them, and avoid an overrun
|
||||
* condition.
|
||||
* @rmtoll RQR RXFRQ LL_USART_RequestRxDataFlush
|
||||
* @param USARTx USART Instance
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void LL_USART_RequestRxDataFlush(USART_TypeDef *USARTx)
|
||||
{
|
||||
SET_BIT(USARTx->RQR, USART_RQR_RXFRQ);
|
||||
SET_BIT(USARTx->RQR, (uint16_t)USART_RQR_RXFRQ);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -3601,7 +3592,7 @@ __STATIC_INLINE void LL_USART_RequestRxDataFlush(USART_TypeDef *USARTx)
|
|||
*/
|
||||
__STATIC_INLINE void LL_USART_RequestTxDataFlush(USART_TypeDef *USARTx)
|
||||
{
|
||||
SET_BIT(USARTx->RQR, USART_RQR_TXFRQ);
|
||||
SET_BIT(USARTx->RQR, (uint16_t)USART_RQR_TXFRQ);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -3630,7 +3621,7 @@ void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitS
|
|||
* @}
|
||||
*/
|
||||
|
||||
#endif /* USART1 || USART2|| USART3 || UART4 || UART5 */
|
||||
#endif /* USART1 || USART2 || USART3 || UART4 || UART5 */
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
@ -3640,6 +3631,6 @@ void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitS
|
|||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F3xx_LL_USART_H */
|
||||
#endif /* STM32F3xx_LL_USART_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
|
@ -0,0 +1,248 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f3xx_ll_usb.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of USB Low Layer HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32F3xx_LL_USB_H
|
||||
#define STM32F3xx_LL_USB_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f3xx_hal_def.h"
|
||||
|
||||
#if defined (USB)
|
||||
/** @addtogroup STM32F3xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup USB_LL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief USB Mode definition
|
||||
*/
|
||||
|
||||
|
||||
|
||||
typedef enum
|
||||
{
|
||||
USB_DEVICE_MODE = 0
|
||||
} USB_ModeTypeDef;
|
||||
|
||||
/**
|
||||
* @brief USB Initialization Structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t dev_endpoints; /*!< Device Endpoints number.
|
||||
This parameter depends on the used USB core.
|
||||
This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
|
||||
|
||||
uint32_t speed; /*!< USB Core speed.
|
||||
This parameter can be any value of @ref USB_Core_Speed */
|
||||
|
||||
uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size. */
|
||||
|
||||
uint32_t phy_itface; /*!< Select the used PHY interface.
|
||||
This parameter can be any value of @ref USB_Core_PHY */
|
||||
|
||||
uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */
|
||||
|
||||
uint32_t low_power_enable; /*!< Enable or disable Low Power mode */
|
||||
|
||||
uint32_t lpm_enable; /*!< Enable or disable Battery charging. */
|
||||
|
||||
uint32_t battery_charging_enable; /*!< Enable or disable Battery charging. */
|
||||
} USB_CfgTypeDef;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t num; /*!< Endpoint number
|
||||
This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
|
||||
|
||||
uint8_t is_in; /*!< Endpoint direction
|
||||
This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
|
||||
|
||||
uint8_t is_stall; /*!< Endpoint stall condition
|
||||
This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
|
||||
|
||||
uint8_t type; /*!< Endpoint type
|
||||
This parameter can be any value of @ref USB_EP_Type */
|
||||
|
||||
uint8_t data_pid_start; /*!< Initial data PID
|
||||
This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
|
||||
|
||||
uint16_t pmaadress; /*!< PMA Address
|
||||
This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
|
||||
|
||||
uint16_t pmaaddr0; /*!< PMA Address0
|
||||
This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
|
||||
|
||||
uint16_t pmaaddr1; /*!< PMA Address1
|
||||
This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
|
||||
|
||||
uint8_t doublebuffer; /*!< Double buffer enable
|
||||
This parameter can be 0 or 1 */
|
||||
|
||||
uint16_t tx_fifo_num; /*!< This parameter is not required by USB Device FS peripheral, it is used
|
||||
only by USB OTG FS peripheral
|
||||
This parameter is added to ensure compatibility across USB peripherals */
|
||||
|
||||
uint32_t maxpacket; /*!< Endpoint Max packet size
|
||||
This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
|
||||
|
||||
uint8_t *xfer_buff; /*!< Pointer to transfer buffer */
|
||||
|
||||
uint32_t xfer_len; /*!< Current transfer length */
|
||||
|
||||
uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */
|
||||
|
||||
} USB_EPTypeDef;
|
||||
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup PCD_Exported_Constants PCD Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup USB_LL_EP0_MPS USB Low Layer EP0 MPS
|
||||
* @{
|
||||
*/
|
||||
#define DEP0CTL_MPS_64 0U
|
||||
#define DEP0CTL_MPS_32 1U
|
||||
#define DEP0CTL_MPS_16 2U
|
||||
#define DEP0CTL_MPS_8 3U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USB_LL_EP_Type USB Low Layer EP Type
|
||||
* @{
|
||||
*/
|
||||
#define EP_TYPE_CTRL 0U
|
||||
#define EP_TYPE_ISOC 1U
|
||||
#define EP_TYPE_BULK 2U
|
||||
#define EP_TYPE_INTR 3U
|
||||
#define EP_TYPE_MSK 3U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup USB_LL Device Speed
|
||||
* @{
|
||||
*/
|
||||
#define USBD_FS_SPEED 2U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#define BTABLE_ADDRESS 0x000U
|
||||
#if defined(STM32F303xC) || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F301x8) || defined(STM32F373xC) || defined(STM32F378xx) || defined(STM32F302xC)
|
||||
#define PMA_ACCESS 2U
|
||||
#endif /* STM32F303xC || */
|
||||
/* STM32F303x8 || STM32F334x8 || */
|
||||
/* STM32F301x8 || */
|
||||
/* STM32F373xC || STM32F378xx */
|
||||
|
||||
#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F302x8)
|
||||
#define PMA_ACCESS 1U
|
||||
#endif /* STM32F302xE || STM32F303xE || */
|
||||
/* STM32F302xC || */
|
||||
/* STM32F302x8 */
|
||||
|
||||
#define EP_ADDR_MSK 0x7U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @addtogroup USB_LL_Exported_Functions USB Low Layer Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg);
|
||||
HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg);
|
||||
HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx);
|
||||
HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx);
|
||||
HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode);
|
||||
HAL_StatusTypeDef USB_SetDevSpeed(USB_TypeDef *USBx, uint8_t speed);
|
||||
HAL_StatusTypeDef USB_FlushRxFifo(USB_TypeDef *USBx);
|
||||
HAL_StatusTypeDef USB_FlushTxFifo(USB_TypeDef *USBx, uint32_t num);
|
||||
HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep);
|
||||
HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep);
|
||||
HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep);
|
||||
HAL_StatusTypeDef USB_WritePacket(USB_TypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len);
|
||||
void *USB_ReadPacket(USB_TypeDef *USBx, uint8_t *dest, uint16_t len);
|
||||
HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep);
|
||||
HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep);
|
||||
HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address);
|
||||
HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx);
|
||||
HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx);
|
||||
HAL_StatusTypeDef USB_StopDevice(USB_TypeDef *USBx);
|
||||
HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t *psetup);
|
||||
uint32_t USB_ReadInterrupts(USB_TypeDef *USBx);
|
||||
uint32_t USB_ReadDevAllOutEpInterrupt(USB_TypeDef *USBx);
|
||||
uint32_t USB_ReadDevOutEPInterrupt(USB_TypeDef *USBx, uint8_t epnum);
|
||||
uint32_t USB_ReadDevAllInEpInterrupt(USB_TypeDef *USBx);
|
||||
uint32_t USB_ReadDevInEPInterrupt(USB_TypeDef *USBx, uint8_t epnum);
|
||||
void USB_ClearInterrupts(USB_TypeDef *USBx, uint32_t interrupt);
|
||||
|
||||
HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_TypeDef *USBx);
|
||||
HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_TypeDef *USBx);
|
||||
void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
|
||||
void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* defined (USB) */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* STM32F3xx_LL_USB_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
|
@ -18,29 +18,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
|
|
@ -6,36 +6,20 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_LL_WWDG_H
|
||||
#define __STM32F3xx_LL_WWDG_H
|
||||
#ifndef STM32F3xx_LL_WWDG_H
|
||||
#define STM32F3xx_LL_WWDG_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
@ -56,34 +40,30 @@ extern "C" {
|
|||
|
||||
/* Private types -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
|
||||
/* Private constants ---------------------------------------------------------*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup WWDG_LL_Exported_Constants WWDG Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup WWDG_LL_EC_IT IT Defines
|
||||
* @brief IT defines which can be used with LL_WWDG_ReadReg and LL_WWDG_WriteReg functions
|
||||
* @{
|
||||
*/
|
||||
#define LL_WWDG_CFR_EWI WWDG_CFR_EWI
|
||||
#define LL_WWDG_CFR_EWI WWDG_CFR_EWI
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup WWDG_LL_EC_PRESCALER PRESCALER
|
||||
* @{
|
||||
*/
|
||||
#define LL_WWDG_PRESCALER_1 0x00000000U /*!< WWDG counter clock = (PCLK1/4096)/1 */
|
||||
#define LL_WWDG_PRESCALER_2 WWDG_CFR_WDGTB_0 /*!< WWDG counter clock = (PCLK1/4096)/2 */
|
||||
#define LL_WWDG_PRESCALER_4 WWDG_CFR_WDGTB_1 /*!< WWDG counter clock = (PCLK1/4096)/4 */
|
||||
#define LL_WWDG_PRESCALER_8 (WWDG_CFR_WDGTB_0 | WWDG_CFR_WDGTB_1) /*!< WWDG counter clock = (PCLK1/4096)/8 */
|
||||
* @{
|
||||
*/
|
||||
#define LL_WWDG_PRESCALER_1 0x00000000u /*!< WWDG counter clock = (PCLK1/4096)/1 */
|
||||
#define LL_WWDG_PRESCALER_2 WWDG_CFR_WDGTB_0 /*!< WWDG counter clock = (PCLK1/4096)/2 */
|
||||
#define LL_WWDG_PRESCALER_4 WWDG_CFR_WDGTB_1 /*!< WWDG counter clock = (PCLK1/4096)/4 */
|
||||
#define LL_WWDG_PRESCALER_8 (WWDG_CFR_WDGTB_0 | WWDG_CFR_WDGTB_1) /*!< WWDG counter clock = (PCLK1/4096)/8 */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -119,7 +99,6 @@ extern "C" {
|
|||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -155,7 +134,7 @@ __STATIC_INLINE void LL_WWDG_Enable(WWDG_TypeDef *WWDGx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_WWDG_IsEnabled(WWDG_TypeDef *WWDGx)
|
||||
{
|
||||
return (READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA));
|
||||
return ((READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -182,7 +161,7 @@ __STATIC_INLINE void LL_WWDG_SetCounter(WWDG_TypeDef *WWDGx, uint32_t Counter)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_WWDG_GetCounter(WWDG_TypeDef *WWDGx)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(WWDGx->CR, WWDG_CR_T));
|
||||
return (READ_BIT(WWDGx->CR, WWDG_CR_T));
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -215,7 +194,7 @@ __STATIC_INLINE void LL_WWDG_SetPrescaler(WWDG_TypeDef *WWDGx, uint32_t Prescale
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_WWDG_GetPrescaler(WWDG_TypeDef *WWDGx)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(WWDGx->CFR, WWDG_CFR_WDGTB));
|
||||
return (READ_BIT(WWDGx->CFR, WWDG_CFR_WDGTB));
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -247,7 +226,7 @@ __STATIC_INLINE void LL_WWDG_SetWindow(WWDG_TypeDef *WWDGx, uint32_t Window)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_WWDG_GetWindow(WWDG_TypeDef *WWDGx)
|
||||
{
|
||||
return (uint32_t)(READ_BIT(WWDGx->CFR, WWDG_CFR_W));
|
||||
return (READ_BIT(WWDGx->CFR, WWDG_CFR_W));
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -268,7 +247,7 @@ __STATIC_INLINE uint32_t LL_WWDG_GetWindow(WWDG_TypeDef *WWDGx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_WWDG_IsActiveFlag_EWKUP(WWDG_TypeDef *WWDGx)
|
||||
{
|
||||
return (READ_BIT(WWDGx->SR, WWDG_SR_EWIF) == (WWDG_SR_EWIF));
|
||||
return ((READ_BIT(WWDGx->SR, WWDG_SR_EWIF) == (WWDG_SR_EWIF)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -310,7 +289,7 @@ __STATIC_INLINE void LL_WWDG_EnableIT_EWKUP(WWDG_TypeDef *WWDGx)
|
|||
*/
|
||||
__STATIC_INLINE uint32_t LL_WWDG_IsEnabledIT_EWKUP(WWDG_TypeDef *WWDGx)
|
||||
{
|
||||
return (READ_BIT(WWDGx->CFR, WWDG_CFR_EWI) == (WWDG_CFR_EWI));
|
||||
return ((READ_BIT(WWDGx->CFR, WWDG_CFR_EWI) == (WWDG_CFR_EWI)) ? 1UL : 0UL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -335,6 +314,6 @@ __STATIC_INLINE uint32_t LL_WWDG_IsEnabledIT_EWKUP(WWDG_TypeDef *WWDGx)
|
|||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F3xx_LL_WWDG_H */
|
||||
#endif /* STM32F3xx_LL_WWDG_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
|
@ -2,8 +2,7 @@
|
|||
******************************************************************************
|
||||
* @file stm32f3xx_hal_can.c
|
||||
* @author MCD Application Team
|
||||
* @brief CAN HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the Controller Area Network (CAN) peripheral:
|
||||
* + Initialization and de-initialization functions
|
||||
* + IO operation functions
|
||||
|
@ -11,6 +10,13 @@
|
|||
* + Peripheral State and Error functions
|
||||
*
|
||||
@verbatim
|
||||
==============================================================================
|
||||
##### User NOTE #####
|
||||
==============================================================================
|
||||
[..]
|
||||
(#) This HAL CAN driver is deprecated, it contains some CAN Tx/Rx FIFO management limitations.
|
||||
Another HAL CAN driver version has been designed with new API's, to fix these limitations.
|
||||
|
||||
==============================================================================
|
||||
##### How to use this driver #####
|
||||
==============================================================================
|
||||
|
@ -66,36 +72,20 @@
|
|||
(+) __HAL_CAN_GET_FLAG: Get the selected CAN's flag status
|
||||
|
||||
[..]
|
||||
(@) You can refer to the CAN HAL driver header file for more useful macros
|
||||
(@) You can refer to the CAN Legacy HAL driver header file for more useful macros
|
||||
|
||||
@endverbatim
|
||||
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
@ -112,13 +102,21 @@
|
|||
* @{
|
||||
*/
|
||||
|
||||
#ifdef HAL_CAN_MODULE_ENABLED
|
||||
#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
|
||||
|
||||
#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
|
||||
defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \
|
||||
defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
|
||||
defined(STM32F302x8) || \
|
||||
defined(STM32F373xC) || defined(STM32F378xx)
|
||||
#ifdef HAL_CAN_MODULE_ENABLED
|
||||
/* Select HAL CAN module in stm32f3xx_hal_conf.h file:
|
||||
(#) HAL_CAN_MODULE_ENABLED for new HAL CAN driver fixing FIFO limitations
|
||||
(#) HAL_CAN_LEGACY_MODULE_ENABLED for legacy HAL CAN driver */
|
||||
#error 'The HAL CAN driver cannot be used with its legacy, Please ensure to enable only one HAL CAN module at once in stm32f3xx_hal_conf.h file'
|
||||
#endif /* HAL_CAN_MODULE_ENABLED */
|
||||
|
||||
#warning 'Legacy HAL CAN driver is enabled! It can be used with known limitations, refer to the release notes. However it is recommended to use rather the new HAL CAN driver'
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
|
@ -1688,7 +1686,7 @@ static HAL_StatusTypeDef CAN_Receive_IT(CAN_HandleTypeDef* hcan, uint8_t FIFONum
|
|||
/* STM32F302x8 || */
|
||||
/* STM32F373xC || STM32F378xx */
|
||||
|
||||
#endif /* HAL_CAN_MODULE_ENABLED */
|
||||
#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
|
|
@ -21,29 +21,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
@ -68,11 +52,11 @@
|
|||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief STM32F3xx HAL Driver version number V1.5.2
|
||||
* @brief STM32F3xx HAL Driver version number V1.5.3
|
||||
*/
|
||||
#define __STM32F3xx_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */
|
||||
#define __STM32F3xx_HAL_VERSION_SUB1 (0x05U) /*!< [23:16] sub1 version */
|
||||
#define __STM32F3xx_HAL_VERSION_SUB2 (0x02U) /*!< [15:8] sub2 version */
|
||||
#define __STM32F3xx_HAL_VERSION_SUB2 (0x03U) /*!< [15:8] sub2 version */
|
||||
#define __STM32F3xx_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */
|
||||
#define __STM32F3xx_HAL_VERSION ((__STM32F3xx_HAL_VERSION_MAIN << 24U)\
|
||||
|(__STM32F3xx_HAL_VERSION_SUB1 << 16U)\
|
||||
|
@ -318,19 +302,31 @@ uint32_t HAL_GetTickPrio(void)
|
|||
|
||||
/**
|
||||
* @brief Set new tick Freq.
|
||||
* @retval Status
|
||||
* @retval status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
HAL_TickFreqTypeDef prevTickFreq;
|
||||
|
||||
assert_param(IS_TICKFREQ(Freq));
|
||||
|
||||
if (uwTickFreq != Freq)
|
||||
{
|
||||
/* Back up uwTickFreq frequency */
|
||||
prevTickFreq = uwTickFreq;
|
||||
|
||||
/* Update uwTickFreq global variable used by HAL_InitTick() */
|
||||
uwTickFreq = Freq;
|
||||
|
||||
/* Apply the new tick Freq */
|
||||
/* Apply the new tick Freq */
|
||||
status = HAL_InitTick(uwTickPrio);
|
||||
|
||||
if (status != HAL_OK)
|
||||
{
|
||||
/* Restore previous tick frequency */
|
||||
uwTickFreq = prevTickFreq;
|
||||
}
|
||||
}
|
||||
|
||||
return status;
|
||||
|
|
|
@ -306,43 +306,92 @@
|
|||
|
||||
(#) Optionally, in case of usage of ADC with interruptions:
|
||||
(++) Disable the NVIC for ADC
|
||||
using function HAL_NVIC_EnableIRQ(ADCx_IRQn)
|
||||
using function HAL_NVIC_DisableIRQ(ADCx_IRQn)
|
||||
|
||||
(#) Optionally, in case of usage of DMA:
|
||||
(++) Deinitialize the DMA
|
||||
using function HAL_DMA_Init().
|
||||
using function HAL_DMA_DeInit().
|
||||
(++) Disable the NVIC for DMA
|
||||
using function HAL_NVIC_EnableIRQ(DMAx_Channelx_IRQn)
|
||||
using function HAL_NVIC_DisableIRQ(DMAx_Channelx_IRQn)
|
||||
|
||||
[..]
|
||||
|
||||
*** Callback registration ***
|
||||
=============================================
|
||||
[..]
|
||||
|
||||
The compilation flag USE_HAL_ADC_REGISTER_CALLBACKS, when set to 1,
|
||||
allows the user to configure dynamically the driver callbacks.
|
||||
Use Functions @ref HAL_ADC_RegisterCallback()
|
||||
to register an interrupt callback.
|
||||
[..]
|
||||
|
||||
Function @ref HAL_ADC_RegisterCallback() allows to register following callbacks:
|
||||
(+) ConvCpltCallback : ADC conversion complete callback
|
||||
(+) ConvHalfCpltCallback : ADC conversion DMA half-transfer callback
|
||||
(+) LevelOutOfWindowCallback : ADC analog watchdog 1 callback
|
||||
(+) ErrorCallback : ADC error callback
|
||||
(+) InjectedConvCpltCallback : ADC group injected conversion complete callback
|
||||
(+) MspInitCallback : ADC Msp Init callback
|
||||
(+) MspDeInitCallback : ADC Msp DeInit callback
|
||||
This function takes as parameters the HAL peripheral handle, the Callback ID
|
||||
and a pointer to the user callback function.
|
||||
[..]
|
||||
|
||||
Use function @ref HAL_ADC_UnRegisterCallback to reset a callback to the default
|
||||
weak function.
|
||||
[..]
|
||||
|
||||
@ref HAL_ADC_UnRegisterCallback takes as parameters the HAL peripheral handle,
|
||||
and the Callback ID.
|
||||
This function allows to reset following callbacks:
|
||||
(+) ConvCpltCallback : ADC conversion complete callback
|
||||
(+) ConvHalfCpltCallback : ADC conversion DMA half-transfer callback
|
||||
(+) LevelOutOfWindowCallback : ADC analog watchdog 1 callback
|
||||
(+) ErrorCallback : ADC error callback
|
||||
(+) InjectedConvCpltCallback : ADC group injected conversion complete callback
|
||||
(+) MspInitCallback : ADC Msp Init callback
|
||||
(+) MspDeInitCallback : ADC Msp DeInit callback
|
||||
[..]
|
||||
|
||||
By default, after the @ref HAL_ADC_Init() and when the state is @ref HAL_ADC_STATE_RESET
|
||||
all callbacks are set to the corresponding weak functions:
|
||||
examples @ref HAL_ADC_ConvCpltCallback(), @ref HAL_ADC_ErrorCallback().
|
||||
Exception done for MspInit and MspDeInit functions that are
|
||||
reset to the legacy weak functions in the @ref HAL_ADC_Init()/ @ref HAL_ADC_DeInit() only when
|
||||
these callbacks are null (not registered beforehand).
|
||||
[..]
|
||||
|
||||
If MspInit or MspDeInit are not null, the @ref HAL_ADC_Init()/ @ref HAL_ADC_DeInit()
|
||||
keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state.
|
||||
[..]
|
||||
|
||||
Callbacks can be registered/unregistered in @ref HAL_ADC_STATE_READY state only.
|
||||
Exception done MspInit/MspDeInit functions that can be registered/unregistered
|
||||
in @ref HAL_ADC_STATE_READY or @ref HAL_ADC_STATE_RESET state,
|
||||
thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
|
||||
[..]
|
||||
|
||||
Then, the user first registers the MspInit/MspDeInit user callbacks
|
||||
using @ref HAL_ADC_RegisterCallback() before calling @ref HAL_ADC_DeInit()
|
||||
or @ref HAL_ADC_Init() function.
|
||||
[..]
|
||||
|
||||
When the compilation flag USE_HAL_ADC_REGISTER_CALLBACKS is set to 0 or
|
||||
not defined, the callback registration feature is not available and all callbacks
|
||||
are set to the corresponding weak functions.
|
||||
|
||||
@endverbatim
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
@ -490,6 +539,210 @@ __weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
|
|||
*/
|
||||
}
|
||||
|
||||
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
|
||||
/**
|
||||
* @brief Register a User ADC Callback
|
||||
* To be used instead of the weak predefined callback
|
||||
* @param hadc Pointer to a ADC_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified ADC.
|
||||
* @param CallbackID ID of the callback to be registered
|
||||
* This parameter can be one of the following values:
|
||||
* @arg @ref HAL_ADC_CONVERSION_COMPLETE_CB_ID ADC conversion complete callback ID
|
||||
* @arg @ref HAL_ADC_CONVERSION_HALF_CB_ID ADC conversion complete callback ID
|
||||
* @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID ADC analog watchdog 1 callback ID
|
||||
* @arg @ref HAL_ADC_ERROR_CB_ID ADC error callback ID
|
||||
* @arg @ref HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID ADC group injected conversion complete callback ID
|
||||
* @arg @ref HAL_ADC_MSPINIT_CB_ID ADC Msp Init callback ID
|
||||
* @arg @ref HAL_ADC_MSPDEINIT_CB_ID ADC Msp DeInit callback ID
|
||||
* @arg @ref HAL_ADC_MSPINIT_CB_ID MspInit callback ID
|
||||
* @arg @ref HAL_ADC_MSPDEINIT_CB_ID MspDeInit callback ID
|
||||
* @param pCallback pointer to the Callback function
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_ADC_RegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef CallbackID, pADC_CallbackTypeDef pCallback)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
if (pCallback == NULL)
|
||||
{
|
||||
/* Update the error code */
|
||||
hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
|
||||
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
if ((hadc->State & HAL_ADC_STATE_READY) != 0)
|
||||
{
|
||||
switch (CallbackID)
|
||||
{
|
||||
case HAL_ADC_CONVERSION_COMPLETE_CB_ID :
|
||||
hadc->ConvCpltCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_ADC_CONVERSION_HALF_CB_ID :
|
||||
hadc->ConvHalfCpltCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID :
|
||||
hadc->LevelOutOfWindowCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_ADC_ERROR_CB_ID :
|
||||
hadc->ErrorCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID :
|
||||
hadc->InjectedConvCpltCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_ADC_MSPINIT_CB_ID :
|
||||
hadc->MspInitCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_ADC_MSPDEINIT_CB_ID :
|
||||
hadc->MspDeInitCallback = pCallback;
|
||||
break;
|
||||
|
||||
default :
|
||||
/* Update the error code */
|
||||
hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
|
||||
|
||||
/* Return error status */
|
||||
status = HAL_ERROR;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else if (HAL_ADC_STATE_RESET == hadc->State)
|
||||
{
|
||||
switch (CallbackID)
|
||||
{
|
||||
case HAL_ADC_MSPINIT_CB_ID :
|
||||
hadc->MspInitCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_ADC_MSPDEINIT_CB_ID :
|
||||
hadc->MspDeInitCallback = pCallback;
|
||||
break;
|
||||
|
||||
default :
|
||||
/* Update the error code */
|
||||
hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
|
||||
|
||||
/* Return error status */
|
||||
status = HAL_ERROR;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Update the error code */
|
||||
hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
|
||||
|
||||
/* Return error status */
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Unregister a ADC Callback
|
||||
* ADC callback is redirected to the weak predefined callback
|
||||
* @param hadc Pointer to a ADC_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified ADC.
|
||||
* @param CallbackID ID of the callback to be unregistered
|
||||
* This parameter can be one of the following values:
|
||||
* @arg @ref HAL_ADC_CONVERSION_COMPLETE_CB_ID ADC conversion complete callback ID
|
||||
* @arg @ref HAL_ADC_CONVERSION_HALF_CB_ID ADC conversion complete callback ID
|
||||
* @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID ADC analog watchdog 1 callback ID
|
||||
* @arg @ref HAL_ADC_ERROR_CB_ID ADC error callback ID
|
||||
* @arg @ref HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID ADC group injected conversion complete callback ID
|
||||
* @arg @ref HAL_ADC_MSPINIT_CB_ID ADC Msp Init callback ID
|
||||
* @arg @ref HAL_ADC_MSPDEINIT_CB_ID ADC Msp DeInit callback ID
|
||||
* @arg @ref HAL_ADC_MSPINIT_CB_ID MspInit callback ID
|
||||
* @arg @ref HAL_ADC_MSPDEINIT_CB_ID MspDeInit callback ID
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_ADC_UnRegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef CallbackID)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
if ((hadc->State & HAL_ADC_STATE_READY) != 0)
|
||||
{
|
||||
switch (CallbackID)
|
||||
{
|
||||
case HAL_ADC_CONVERSION_COMPLETE_CB_ID :
|
||||
hadc->ConvCpltCallback = HAL_ADC_ConvCpltCallback;
|
||||
break;
|
||||
|
||||
case HAL_ADC_CONVERSION_HALF_CB_ID :
|
||||
hadc->ConvHalfCpltCallback = HAL_ADC_ConvHalfCpltCallback;
|
||||
break;
|
||||
|
||||
case HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID :
|
||||
hadc->LevelOutOfWindowCallback = HAL_ADC_LevelOutOfWindowCallback;
|
||||
break;
|
||||
|
||||
case HAL_ADC_ERROR_CB_ID :
|
||||
hadc->ErrorCallback = HAL_ADC_ErrorCallback;
|
||||
break;
|
||||
|
||||
case HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID :
|
||||
hadc->InjectedConvCpltCallback = HAL_ADCEx_InjectedConvCpltCallback;
|
||||
break;
|
||||
|
||||
case HAL_ADC_MSPINIT_CB_ID :
|
||||
hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit */
|
||||
break;
|
||||
|
||||
case HAL_ADC_MSPDEINIT_CB_ID :
|
||||
hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit */
|
||||
break;
|
||||
|
||||
default :
|
||||
/* Update the error code */
|
||||
hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
|
||||
|
||||
/* Return error status */
|
||||
status = HAL_ERROR;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else if (HAL_ADC_STATE_RESET == hadc->State)
|
||||
{
|
||||
switch (CallbackID)
|
||||
{
|
||||
case HAL_ADC_MSPINIT_CB_ID :
|
||||
hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit */
|
||||
break;
|
||||
|
||||
case HAL_ADC_MSPDEINIT_CB_ID :
|
||||
hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit */
|
||||
break;
|
||||
|
||||
default :
|
||||
/* Update the error code */
|
||||
hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
|
||||
|
||||
/* Return error status */
|
||||
status = HAL_ERROR;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Update the error code */
|
||||
hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
|
||||
|
||||
/* Return error status */
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
|
|
@ -24,29 +24,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
@ -308,8 +292,25 @@ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
|
|||
/* Allocate lock resource and initialize it */
|
||||
hadc->Lock = HAL_UNLOCKED;
|
||||
|
||||
/* Init the low level hardware */
|
||||
HAL_ADC_MspInit(hadc);
|
||||
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
|
||||
/* Init the ADC Callback settings */
|
||||
hadc->ConvCpltCallback = HAL_ADC_ConvCpltCallback; /* Legacy weak callback */
|
||||
hadc->ConvHalfCpltCallback = HAL_ADC_ConvHalfCpltCallback; /* Legacy weak callback */
|
||||
hadc->LevelOutOfWindowCallback = HAL_ADC_LevelOutOfWindowCallback; /* Legacy weak callback */
|
||||
hadc->ErrorCallback = HAL_ADC_ErrorCallback; /* Legacy weak callback */
|
||||
hadc->InjectedConvCpltCallback = HAL_ADCEx_InjectedConvCpltCallback; /* Legacy weak callback */
|
||||
|
||||
if (hadc->MspInitCallback == NULL)
|
||||
{
|
||||
hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit */
|
||||
}
|
||||
|
||||
/* Init the low level hardware */
|
||||
hadc->MspInitCallback(hadc);
|
||||
#else
|
||||
/* Init the low level hardware */
|
||||
HAL_ADC_MspInit(hadc);
|
||||
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
|
||||
|
||||
/* Enable voltage regulator (if disabled at this step) */
|
||||
if (HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADVREGEN_0))
|
||||
|
@ -428,7 +429,7 @@ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
|
|||
/* - continuous conversion mode */
|
||||
/* - overrun */
|
||||
/* - discontinuous mode */
|
||||
SET_BIT(tmpCFGR, ADC_CFGR_CONTINUOUS(hadc->Init.ContinuousConvMode) |
|
||||
SET_BIT(tmpCFGR, ADC_CFGR_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) |
|
||||
ADC_CFGR_OVERRUN(hadc->Init.Overrun) |
|
||||
hadc->Init.DataAlign |
|
||||
hadc->Init.Resolution );
|
||||
|
@ -480,8 +481,8 @@ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
|
|||
CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_AUTDLY |
|
||||
ADC_CFGR_DMACFG );
|
||||
|
||||
SET_BIT(tmpCFGR, ADC_CFGR_AUTOWAIT(hadc->Init.LowPowerAutoWait) |
|
||||
ADC_CFGR_DMACONTREQ(hadc->Init.DMAContinuousRequests) );
|
||||
SET_BIT(tmpCFGR, ADC_CFGR_AUTOWAIT((uint32_t)hadc->Init.LowPowerAutoWait) |
|
||||
ADC_CFGR_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests) );
|
||||
}
|
||||
|
||||
/* Update ADC configuration register with previous settings */
|
||||
|
@ -613,8 +614,25 @@ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
|
|||
/* Allocate lock resource and initialize it */
|
||||
hadc->Lock = HAL_UNLOCKED;
|
||||
|
||||
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
|
||||
/* Init the ADC Callback settings */
|
||||
hadc->ConvCpltCallback = HAL_ADC_ConvCpltCallback; /* Legacy weak callback */
|
||||
hadc->ConvHalfCpltCallback = HAL_ADC_ConvHalfCpltCallback; /* Legacy weak callback */
|
||||
hadc->LevelOutOfWindowCallback = HAL_ADC_LevelOutOfWindowCallback; /* Legacy weak callback */
|
||||
hadc->ErrorCallback = HAL_ADC_ErrorCallback; /* Legacy weak callback */
|
||||
hadc->InjectedConvCpltCallback = HAL_ADCEx_InjectedConvCpltCallback; /* Legacy weak callback */
|
||||
|
||||
if (hadc->MspInitCallback == NULL)
|
||||
{
|
||||
hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit */
|
||||
}
|
||||
|
||||
/* Init the low level hardware */
|
||||
hadc->MspInitCallback(hadc);
|
||||
#else
|
||||
/* Init the low level hardware */
|
||||
HAL_ADC_MspInit(hadc);
|
||||
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
|
||||
}
|
||||
|
||||
/* Stop potential conversion on going, on regular and injected groups */
|
||||
|
@ -649,7 +667,7 @@ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
|
|||
/* regular group after ADC enabling. */
|
||||
tmp_cr2 |= (hadc->Init.DataAlign |
|
||||
hadc->Init.ExternalTrigConv |
|
||||
ADC_CR2_CONTINUOUS(hadc->Init.ContinuousConvMode) );
|
||||
ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) );
|
||||
|
||||
/* Configuration of ADC: */
|
||||
/* - scan mode */
|
||||
|
@ -983,8 +1001,18 @@ HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
|
|||
/* procedure. */
|
||||
|
||||
|
||||
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
|
||||
if (hadc->MspDeInitCallback == NULL)
|
||||
{
|
||||
hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit */
|
||||
}
|
||||
|
||||
/* DeInit the low level hardware */
|
||||
hadc->MspDeInitCallback(hadc);
|
||||
#else
|
||||
/* DeInit the low level hardware */
|
||||
HAL_ADC_MspDeInit(hadc);
|
||||
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
|
||||
|
||||
/* Set ADC error code to none */
|
||||
ADC_CLEAR_ERRORCODE(hadc);
|
||||
|
@ -1127,8 +1155,18 @@ HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
|
|||
/* __HAL_RCC_ADC1_FORCE_RESET() */
|
||||
/* __HAL_RCC_ADC1_RELEASE_RESET() */
|
||||
|
||||
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
|
||||
if (hadc->MspDeInitCallback == NULL)
|
||||
{
|
||||
hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit */
|
||||
}
|
||||
|
||||
/* DeInit the low level hardware */
|
||||
hadc->MspDeInitCallback(hadc);
|
||||
#else
|
||||
/* DeInit the low level hardware */
|
||||
HAL_ADC_MspDeInit(hadc);
|
||||
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
|
||||
|
||||
/* Set ADC error code to none */
|
||||
ADC_CLEAR_ERRORCODE(hadc);
|
||||
|
@ -2892,7 +2930,11 @@ void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
|
|||
/* Note: into callback, to determine if conversion has been triggered */
|
||||
/* from EOC or EOS, possibility to use: */
|
||||
/* " if( __HAL_ADC_GET_FLAG(&hadc, ADC_FLAG_EOS)) " */
|
||||
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
|
||||
hadc->ConvCpltCallback(hadc);
|
||||
#else
|
||||
HAL_ADC_ConvCpltCallback(hadc);
|
||||
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
|
||||
|
||||
|
||||
/* Clear regular group conversion flag */
|
||||
|
@ -2989,7 +3031,11 @@ void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
|
|||
/* Note: into callback, to determine if conversion has been triggered */
|
||||
/* from JEOC or JEOS, possibility to use: */
|
||||
/* " if( __HAL_ADC_GET_FLAG(&hadc, ADC_FLAG_JEOS)) " */
|
||||
HAL_ADCEx_InjectedConvCpltCallback(hadc);
|
||||
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
|
||||
hadc->InjectedConvCpltCallback(hadc);
|
||||
#else
|
||||
HAL_ADCEx_InjectedConvCpltCallback(hadc);
|
||||
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
|
||||
|
||||
/* Clear injected group conversion flag */
|
||||
__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC | ADC_FLAG_JEOS);
|
||||
|
@ -3002,7 +3048,11 @@ void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
|
|||
SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
|
||||
|
||||
/* Level out of window 1 callback */
|
||||
HAL_ADC_LevelOutOfWindowCallback(hadc);
|
||||
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
|
||||
hadc->LevelOutOfWindowCallback(hadc);
|
||||
#else
|
||||
HAL_ADC_LevelOutOfWindowCallback(hadc);
|
||||
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
|
||||
/* Clear ADC analog watchdog flag */
|
||||
__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD1);
|
||||
}
|
||||
|
@ -3078,7 +3128,11 @@ void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
|
|||
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR);
|
||||
|
||||
/* Error callback */
|
||||
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
|
||||
hadc->ErrorCallback(hadc);
|
||||
#else
|
||||
HAL_ADC_ErrorCallback(hadc);
|
||||
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
|
||||
}
|
||||
|
||||
/* Clear the Overrun flag */
|
||||
|
@ -3156,7 +3210,11 @@ void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
|
|||
}
|
||||
|
||||
/* Conversion complete callback */
|
||||
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
|
||||
hadc->ConvCpltCallback(hadc);
|
||||
#else
|
||||
HAL_ADC_ConvCpltCallback(hadc);
|
||||
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
|
||||
|
||||
/* Clear regular group conversion flag */
|
||||
__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_STRT | ADC_FLAG_EOC);
|
||||
|
@ -3200,7 +3258,11 @@ void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
|
|||
}
|
||||
|
||||
/* Conversion complete callback */
|
||||
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
|
||||
hadc->InjectedConvCpltCallback(hadc);
|
||||
#else
|
||||
HAL_ADCEx_InjectedConvCpltCallback(hadc);
|
||||
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
|
||||
|
||||
/* Clear injected group conversion flag */
|
||||
__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JSTRT | ADC_FLAG_JEOC));
|
||||
|
@ -3216,7 +3278,11 @@ void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
|
|||
SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
|
||||
|
||||
/* Level out of window callback */
|
||||
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
|
||||
hadc->LevelOutOfWindowCallback(hadc);
|
||||
#else
|
||||
HAL_ADC_LevelOutOfWindowCallback(hadc);
|
||||
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
|
||||
|
||||
/* Clear the ADC analog watchdog flag */
|
||||
__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
|
||||
|
@ -4472,7 +4538,7 @@ HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc)
|
|||
HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
|
||||
{
|
||||
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
|
||||
ADC_HandleTypeDef tmphadcSlave;
|
||||
ADC_HandleTypeDef tmphadcSlave = {0};
|
||||
ADC_Common_TypeDef *tmpADC_Common;
|
||||
|
||||
/* Check the parameters */
|
||||
|
@ -4613,7 +4679,7 @@ HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc)
|
|||
{
|
||||
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
|
||||
uint32_t tickstart;
|
||||
ADC_HandleTypeDef tmphadcSlave;
|
||||
ADC_HandleTypeDef tmphadcSlave = {0};
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
|
||||
|
@ -5164,7 +5230,7 @@ HAL_StatusTypeDef HAL_ADCEx_RegularMultiModeStop_DMA(ADC_HandleTypeDef* hadc)
|
|||
{
|
||||
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
|
||||
uint32_t tickstart;
|
||||
ADC_HandleTypeDef tmphadcSlave;
|
||||
ADC_HandleTypeDef tmphadcSlave = {0};
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
|
||||
|
@ -6092,8 +6158,8 @@ HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_I
|
|||
MODIFY_REG(hadc->Instance->CFGR ,
|
||||
ADC_CFGR_JQM |
|
||||
ADC_CFGR_JDISCEN ,
|
||||
ADC_CFGR_INJECT_CONTEXT_QUEUE(sConfigInjected->QueueInjectedContext) |
|
||||
ADC_CFGR_INJECT_DISCCONTINUOUS(sConfigInjected->InjectedDiscontinuousConvMode) );
|
||||
ADC_CFGR_INJECT_CONTEXT_QUEUE((uint32_t)sConfigInjected->QueueInjectedContext) |
|
||||
ADC_CFGR_INJECT_DISCCONTINUOUS((uint32_t)sConfigInjected->InjectedDiscontinuousConvMode) );
|
||||
}
|
||||
/* If auto-injected mode is enabled: Injected discontinuous setting is */
|
||||
/* discarded. */
|
||||
|
@ -6102,7 +6168,7 @@ HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_I
|
|||
MODIFY_REG(hadc->Instance->CFGR ,
|
||||
ADC_CFGR_JQM |
|
||||
ADC_CFGR_JDISCEN ,
|
||||
ADC_CFGR_INJECT_CONTEXT_QUEUE(sConfigInjected->QueueInjectedContext) );
|
||||
ADC_CFGR_INJECT_CONTEXT_QUEUE((uint32_t)sConfigInjected->QueueInjectedContext) );
|
||||
|
||||
/* If injected discontinuous mode was intended to be set and could not */
|
||||
/* due to auto-injected enabled, error is reported. */
|
||||
|
@ -6133,7 +6199,7 @@ HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_I
|
|||
{
|
||||
MODIFY_REG(hadc->Instance->CFGR ,
|
||||
ADC_CFGR_JAUTO ,
|
||||
ADC_CFGR_INJECT_AUTO_CONVERSION(sConfigInjected->AutoInjectedConv) );
|
||||
ADC_CFGR_INJECT_AUTO_CONVERSION((uint32_t)sConfigInjected->AutoInjectedConv) );
|
||||
}
|
||||
/* If Automatic injected conversion was intended to be set and could not */
|
||||
/* due to injected group external triggers enabled, error is reported. */
|
||||
|
@ -6976,7 +7042,7 @@ HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_
|
|||
ADC_CCR_MDMA |
|
||||
ADC_CCR_DMACFG ,
|
||||
multimode->DMAAccessMode |
|
||||
ADC_CCR_MULTI_DMACONTREQ(hadc->Init.DMAContinuousRequests) );
|
||||
ADC_CCR_MULTI_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests) );
|
||||
|
||||
/* Parameters that can be updated only when ADC is disabled: */
|
||||
/* - Multimode mode selection */
|
||||
|
@ -7084,7 +7150,11 @@ static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
|
|||
}
|
||||
|
||||
/* Conversion complete callback */
|
||||
HAL_ADC_ConvCpltCallback(hadc);
|
||||
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
|
||||
hadc->ConvCpltCallback(hadc);
|
||||
#else
|
||||
HAL_ADC_ConvCpltCallback(hadc);
|
||||
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
|
||||
}
|
||||
else
|
||||
{
|
||||
|
@ -7104,7 +7174,11 @@ static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)
|
|||
ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
|
||||
|
||||
/* Half conversion callback */
|
||||
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
|
||||
hadc->ConvHalfCpltCallback(hadc);
|
||||
#else
|
||||
HAL_ADC_ConvHalfCpltCallback(hadc);
|
||||
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -7124,7 +7198,11 @@ static void ADC_DMAError(DMA_HandleTypeDef *hdma)
|
|||
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA);
|
||||
|
||||
/* Error callback */
|
||||
HAL_ADC_ErrorCallback(hadc);
|
||||
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
|
||||
hadc->ErrorCallback(hadc);
|
||||
#else
|
||||
HAL_ADC_ErrorCallback(hadc);
|
||||
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
|
||||
}
|
||||
|
||||
#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
|
||||
|
|
|
@ -126,33 +126,85 @@
|
|||
(++) When a start of Rx CAN frame is detected by the CAN peripheral,
|
||||
if automatic wake up mode is enabled.
|
||||
|
||||
*** Callback registration ***
|
||||
=============================================
|
||||
|
||||
The compilation define USE_HAL_CAN_REGISTER_CALLBACKS when set to 1
|
||||
allows the user to configure dynamically the driver callbacks.
|
||||
Use Function @ref HAL_CAN_RegisterCallback() to register an interrupt callback.
|
||||
|
||||
Function @ref HAL_CAN_RegisterCallback() allows to register following callbacks:
|
||||
(+) TxMailbox0CompleteCallback : Tx Mailbox 0 Complete Callback.
|
||||
(+) TxMailbox1CompleteCallback : Tx Mailbox 1 Complete Callback.
|
||||
(+) TxMailbox2CompleteCallback : Tx Mailbox 2 Complete Callback.
|
||||
(+) TxMailbox0AbortCallback : Tx Mailbox 0 Abort Callback.
|
||||
(+) TxMailbox1AbortCallback : Tx Mailbox 1 Abort Callback.
|
||||
(+) TxMailbox2AbortCallback : Tx Mailbox 2 Abort Callback.
|
||||
(+) RxFifo0MsgPendingCallback : Rx Fifo 0 Message Pending Callback.
|
||||
(+) RxFifo0FullCallback : Rx Fifo 0 Full Callback.
|
||||
(+) RxFifo1MsgPendingCallback : Rx Fifo 1 Message Pending Callback.
|
||||
(+) RxFifo1FullCallback : Rx Fifo 1 Full Callback.
|
||||
(+) SleepCallback : Sleep Callback.
|
||||
(+) WakeUpFromRxMsgCallback : Wake Up From Rx Message Callback.
|
||||
(+) ErrorCallback : Error Callback.
|
||||
(+) MspInitCallback : CAN MspInit.
|
||||
(+) MspDeInitCallback : CAN MspDeInit.
|
||||
This function takes as parameters the HAL peripheral handle, the Callback ID
|
||||
and a pointer to the user callback function.
|
||||
|
||||
Use function @ref HAL_CAN_UnRegisterCallback() to reset a callback to the default
|
||||
weak function.
|
||||
@ref HAL_CAN_UnRegisterCallback takes as parameters the HAL peripheral handle,
|
||||
and the Callback ID.
|
||||
This function allows to reset following callbacks:
|
||||
(+) TxMailbox0CompleteCallback : Tx Mailbox 0 Complete Callback.
|
||||
(+) TxMailbox1CompleteCallback : Tx Mailbox 1 Complete Callback.
|
||||
(+) TxMailbox2CompleteCallback : Tx Mailbox 2 Complete Callback.
|
||||
(+) TxMailbox0AbortCallback : Tx Mailbox 0 Abort Callback.
|
||||
(+) TxMailbox1AbortCallback : Tx Mailbox 1 Abort Callback.
|
||||
(+) TxMailbox2AbortCallback : Tx Mailbox 2 Abort Callback.
|
||||
(+) RxFifo0MsgPendingCallback : Rx Fifo 0 Message Pending Callback.
|
||||
(+) RxFifo0FullCallback : Rx Fifo 0 Full Callback.
|
||||
(+) RxFifo1MsgPendingCallback : Rx Fifo 1 Message Pending Callback.
|
||||
(+) RxFifo1FullCallback : Rx Fifo 1 Full Callback.
|
||||
(+) SleepCallback : Sleep Callback.
|
||||
(+) WakeUpFromRxMsgCallback : Wake Up From Rx Message Callback.
|
||||
(+) ErrorCallback : Error Callback.
|
||||
(+) MspInitCallback : CAN MspInit.
|
||||
(+) MspDeInitCallback : CAN MspDeInit.
|
||||
|
||||
By default, after the @ref HAL_CAN_Init() and when the state is HAL_CAN_STATE_RESET,
|
||||
all callbacks are set to the corresponding weak functions:
|
||||
example @ref HAL_CAN_ErrorCallback().
|
||||
Exception done for MspInit and MspDeInit functions that are
|
||||
reset to the legacy weak function in the @ref HAL_CAN_Init()/ @ref HAL_CAN_DeInit() only when
|
||||
these callbacks are null (not registered beforehand).
|
||||
if not, MspInit or MspDeInit are not null, the @ref HAL_CAN_Init()/ @ref HAL_CAN_DeInit()
|
||||
keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
|
||||
|
||||
Callbacks can be registered/unregistered in HAL_CAN_STATE_READY state only.
|
||||
Exception done MspInit/MspDeInit that can be registered/unregistered
|
||||
in HAL_CAN_STATE_READY or HAL_CAN_STATE_RESET state,
|
||||
thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
|
||||
In that case first register the MspInit/MspDeInit user callbacks
|
||||
using @ref HAL_CAN_RegisterCallback() before calling @ref HAL_CAN_DeInit()
|
||||
or @ref HAL_CAN_Init() function.
|
||||
|
||||
When The compilation define USE_HAL_CAN_REGISTER_CALLBACKS is set to 0 or
|
||||
not defined, the callback registration feature is not available and all callbacks
|
||||
are set to the corresponding weak functions.
|
||||
|
||||
@endverbatim
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
@ -243,11 +295,40 @@ HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *hcan)
|
|||
assert_param(IS_CAN_BS2(hcan->Init.TimeSeg2));
|
||||
assert_param(IS_CAN_PRESCALER(hcan->Init.Prescaler));
|
||||
|
||||
#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
|
||||
if (hcan->State == HAL_CAN_STATE_RESET)
|
||||
{
|
||||
/* Reset callbacks to legacy functions */
|
||||
hcan->RxFifo0MsgPendingCallback = HAL_CAN_RxFifo0MsgPendingCallback; /* Legacy weak RxFifo0MsgPendingCallback */
|
||||
hcan->RxFifo0FullCallback = HAL_CAN_RxFifo0FullCallback; /* Legacy weak RxFifo0FullCallback */
|
||||
hcan->RxFifo1MsgPendingCallback = HAL_CAN_RxFifo1MsgPendingCallback; /* Legacy weak RxFifo1MsgPendingCallback */
|
||||
hcan->RxFifo1FullCallback = HAL_CAN_RxFifo1FullCallback; /* Legacy weak RxFifo1FullCallback */
|
||||
hcan->TxMailbox0CompleteCallback = HAL_CAN_TxMailbox0CompleteCallback; /* Legacy weak TxMailbox0CompleteCallback */
|
||||
hcan->TxMailbox1CompleteCallback = HAL_CAN_TxMailbox1CompleteCallback; /* Legacy weak TxMailbox1CompleteCallback */
|
||||
hcan->TxMailbox2CompleteCallback = HAL_CAN_TxMailbox2CompleteCallback; /* Legacy weak TxMailbox2CompleteCallback */
|
||||
hcan->TxMailbox0AbortCallback = HAL_CAN_TxMailbox0AbortCallback; /* Legacy weak TxMailbox0AbortCallback */
|
||||
hcan->TxMailbox1AbortCallback = HAL_CAN_TxMailbox1AbortCallback; /* Legacy weak TxMailbox1AbortCallback */
|
||||
hcan->TxMailbox2AbortCallback = HAL_CAN_TxMailbox2AbortCallback; /* Legacy weak TxMailbox2AbortCallback */
|
||||
hcan->SleepCallback = HAL_CAN_SleepCallback; /* Legacy weak SleepCallback */
|
||||
hcan->WakeUpFromRxMsgCallback = HAL_CAN_WakeUpFromRxMsgCallback; /* Legacy weak WakeUpFromRxMsgCallback */
|
||||
hcan->ErrorCallback = HAL_CAN_ErrorCallback; /* Legacy weak ErrorCallback */
|
||||
|
||||
if (hcan->MspInitCallback == NULL)
|
||||
{
|
||||
hcan->MspInitCallback = HAL_CAN_MspInit; /* Legacy weak MspInit */
|
||||
}
|
||||
|
||||
/* Init the low level hardware: CLOCK, NVIC */
|
||||
hcan->MspInitCallback(hcan);
|
||||
}
|
||||
|
||||
#else
|
||||
if (hcan->State == HAL_CAN_STATE_RESET)
|
||||
{
|
||||
/* Init the low level hardware: CLOCK, NVIC */
|
||||
HAL_CAN_MspInit(hcan);
|
||||
}
|
||||
#endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */
|
||||
|
||||
/* Exit from sleep mode */
|
||||
CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP);
|
||||
|
@ -389,8 +470,19 @@ HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef *hcan)
|
|||
/* Stop the CAN module */
|
||||
(void)HAL_CAN_Stop(hcan);
|
||||
|
||||
#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
|
||||
if (hcan->MspDeInitCallback == NULL)
|
||||
{
|
||||
hcan->MspDeInitCallback = HAL_CAN_MspDeInit; /* Legacy weak MspDeInit */
|
||||
}
|
||||
|
||||
/* DeInit the low level hardware: CLOCK, NVIC */
|
||||
hcan->MspDeInitCallback(hcan);
|
||||
|
||||
#else
|
||||
/* DeInit the low level hardware: CLOCK, NVIC */
|
||||
HAL_CAN_MspDeInit(hcan);
|
||||
#endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */
|
||||
|
||||
/* Reset the CAN peripheral */
|
||||
SET_BIT(hcan->Instance->MCR, CAN_MCR_RESET);
|
||||
|
@ -437,6 +529,284 @@ __weak void HAL_CAN_MspDeInit(CAN_HandleTypeDef *hcan)
|
|||
*/
|
||||
}
|
||||
|
||||
#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
|
||||
/**
|
||||
* @brief Register a CAN CallBack.
|
||||
* To be used instead of the weak predefined callback
|
||||
* @param hcan pointer to a CAN_HandleTypeDef structure that contains
|
||||
* the configuration information for CAN module
|
||||
* @param CallbackID ID of the callback to be registered
|
||||
* This parameter can be one of the following values:
|
||||
* @arg @ref HAL_CAN_TX_MAILBOX0_COMPLETE_CALLBACK_CB_ID Tx Mailbox 0 Complete callback ID
|
||||
* @arg @ref HAL_CAN_TX_MAILBOX1_COMPLETE_CALLBACK_CB_ID Tx Mailbox 1 Complete callback ID
|
||||
* @arg @ref HAL_CAN_TX_MAILBOX2_COMPLETE_CALLBACK_CB_ID Tx Mailbox 2 Complete callback ID
|
||||
* @arg @ref HAL_CAN_TX_MAILBOX0_ABORT_CALLBACK_CB_ID Tx Mailbox 0 Abort callback ID
|
||||
* @arg @ref HAL_CAN_TX_MAILBOX1_ABORT_CALLBACK_CB_ID Tx Mailbox 1 Abort callback ID
|
||||
* @arg @ref HAL_CAN_TX_MAILBOX2_ABORT_CALLBACK_CB_ID Tx Mailbox 2 Abort callback ID
|
||||
* @arg @ref HAL_CAN_RX_FIFO0_MSG_PENDING_CALLBACK_CB_ID Rx Fifo 0 message pending callback ID
|
||||
* @arg @ref HAL_CAN_RX_FIFO0_FULL_CALLBACK_CB_ID Rx Fifo 0 full callback ID
|
||||
* @arg @ref HAL_CAN_RX_FIFO1_MSGPENDING_CALLBACK_CB_ID Rx Fifo 1 message pending callback ID
|
||||
* @arg @ref HAL_CAN_RX_FIFO1_FULL_CALLBACK_CB_ID Rx Fifo 1 full callback ID
|
||||
* @arg @ref HAL_CAN_SLEEP_CALLBACK_CB_ID Sleep callback ID
|
||||
* @arg @ref HAL_CAN_WAKEUP_FROM_RX_MSG_CALLBACK_CB_ID Wake Up from Rx message callback ID
|
||||
* @arg @ref HAL_CAN_ERROR_CALLBACK_CB_ID Error callback ID
|
||||
* @arg @ref HAL_CAN_MSPINIT_CB_ID MspInit callback ID
|
||||
* @arg @ref HAL_CAN_MSPDEINIT_CB_ID MspDeInit callback ID
|
||||
* @param pCallback pointer to the Callback function
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_CAN_RegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef CallbackID, void (* pCallback)(CAN_HandleTypeDef *_hcan))
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
if (pCallback == NULL)
|
||||
{
|
||||
/* Update the error code */
|
||||
hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK;
|
||||
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
if (hcan->State == HAL_CAN_STATE_READY)
|
||||
{
|
||||
switch (CallbackID)
|
||||
{
|
||||
case HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID :
|
||||
hcan->TxMailbox0CompleteCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID :
|
||||
hcan->TxMailbox1CompleteCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID :
|
||||
hcan->TxMailbox2CompleteCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_CAN_TX_MAILBOX0_ABORT_CB_ID :
|
||||
hcan->TxMailbox0AbortCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_CAN_TX_MAILBOX1_ABORT_CB_ID :
|
||||
hcan->TxMailbox1AbortCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_CAN_TX_MAILBOX2_ABORT_CB_ID :
|
||||
hcan->TxMailbox2AbortCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID :
|
||||
hcan->RxFifo0MsgPendingCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_CAN_RX_FIFO0_FULL_CB_ID :
|
||||
hcan->RxFifo0FullCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID :
|
||||
hcan->RxFifo1MsgPendingCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_CAN_RX_FIFO1_FULL_CB_ID :
|
||||
hcan->RxFifo1FullCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_CAN_SLEEP_CB_ID :
|
||||
hcan->SleepCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID :
|
||||
hcan->WakeUpFromRxMsgCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_CAN_ERROR_CB_ID :
|
||||
hcan->ErrorCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_CAN_MSPINIT_CB_ID :
|
||||
hcan->MspInitCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_CAN_MSPDEINIT_CB_ID :
|
||||
hcan->MspDeInitCallback = pCallback;
|
||||
break;
|
||||
|
||||
default :
|
||||
/* Update the error code */
|
||||
hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK;
|
||||
|
||||
/* Return error status */
|
||||
status = HAL_ERROR;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else if (hcan->State == HAL_CAN_STATE_RESET)
|
||||
{
|
||||
switch (CallbackID)
|
||||
{
|
||||
case HAL_CAN_MSPINIT_CB_ID :
|
||||
hcan->MspInitCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_CAN_MSPDEINIT_CB_ID :
|
||||
hcan->MspDeInitCallback = pCallback;
|
||||
break;
|
||||
|
||||
default :
|
||||
/* Update the error code */
|
||||
hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK;
|
||||
|
||||
/* Return error status */
|
||||
status = HAL_ERROR;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Update the error code */
|
||||
hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK;
|
||||
|
||||
/* Return error status */
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Unregister a CAN CallBack.
|
||||
* CAN callabck is redirected to the weak predefined callback
|
||||
* @param hcan pointer to a CAN_HandleTypeDef structure that contains
|
||||
* the configuration information for CAN module
|
||||
* @param CallbackID ID of the callback to be unregistered
|
||||
* This parameter can be one of the following values:
|
||||
* @arg @ref HAL_CAN_TX_MAILBOX0_COMPLETE_CALLBACK_CB_ID Tx Mailbox 0 Complete callback ID
|
||||
* @arg @ref HAL_CAN_TX_MAILBOX1_COMPLETE_CALLBACK_CB_ID Tx Mailbox 1 Complete callback ID
|
||||
* @arg @ref HAL_CAN_TX_MAILBOX2_COMPLETE_CALLBACK_CB_ID Tx Mailbox 2 Complete callback ID
|
||||
* @arg @ref HAL_CAN_TX_MAILBOX0_ABORT_CALLBACK_CB_ID Tx Mailbox 0 Abort callback ID
|
||||
* @arg @ref HAL_CAN_TX_MAILBOX1_ABORT_CALLBACK_CB_ID Tx Mailbox 1 Abort callback ID
|
||||
* @arg @ref HAL_CAN_TX_MAILBOX2_ABORT_CALLBACK_CB_ID Tx Mailbox 2 Abort callback ID
|
||||
* @arg @ref HAL_CAN_RX_FIFO0_MSG_PENDING_CALLBACK_CB_ID Rx Fifo 0 message pending callback ID
|
||||
* @arg @ref HAL_CAN_RX_FIFO0_FULL_CALLBACK_CB_ID Rx Fifo 0 full callback ID
|
||||
* @arg @ref HAL_CAN_RX_FIFO1_MSGPENDING_CALLBACK_CB_ID Rx Fifo 1 message pending callback ID
|
||||
* @arg @ref HAL_CAN_RX_FIFO1_FULL_CALLBACK_CB_ID Rx Fifo 1 full callback ID
|
||||
* @arg @ref HAL_CAN_SLEEP_CALLBACK_CB_ID Sleep callback ID
|
||||
* @arg @ref HAL_CAN_WAKEUP_FROM_RX_MSG_CALLBACK_CB_ID Wake Up from Rx message callback ID
|
||||
* @arg @ref HAL_CAN_ERROR_CALLBACK_CB_ID Error callback ID
|
||||
* @arg @ref HAL_CAN_MSPINIT_CB_ID MspInit callback ID
|
||||
* @arg @ref HAL_CAN_MSPDEINIT_CB_ID MspDeInit callback ID
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_CAN_UnRegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef CallbackID)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
if (hcan->State == HAL_CAN_STATE_READY)
|
||||
{
|
||||
switch (CallbackID)
|
||||
{
|
||||
case HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID :
|
||||
hcan->TxMailbox0CompleteCallback = HAL_CAN_TxMailbox0CompleteCallback;
|
||||
break;
|
||||
|
||||
case HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID :
|
||||
hcan->TxMailbox1CompleteCallback = HAL_CAN_TxMailbox1CompleteCallback;
|
||||
break;
|
||||
|
||||
case HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID :
|
||||
hcan->TxMailbox2CompleteCallback = HAL_CAN_TxMailbox2CompleteCallback;
|
||||
break;
|
||||
|
||||
case HAL_CAN_TX_MAILBOX0_ABORT_CB_ID :
|
||||
hcan->TxMailbox0AbortCallback = HAL_CAN_TxMailbox0AbortCallback;
|
||||
break;
|
||||
|
||||
case HAL_CAN_TX_MAILBOX1_ABORT_CB_ID :
|
||||
hcan->TxMailbox1AbortCallback = HAL_CAN_TxMailbox1AbortCallback;
|
||||
break;
|
||||
|
||||
case HAL_CAN_TX_MAILBOX2_ABORT_CB_ID :
|
||||
hcan->TxMailbox2AbortCallback = HAL_CAN_TxMailbox2AbortCallback;
|
||||
break;
|
||||
|
||||
case HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID :
|
||||
hcan->RxFifo0MsgPendingCallback = HAL_CAN_RxFifo0MsgPendingCallback;
|
||||
break;
|
||||
|
||||
case HAL_CAN_RX_FIFO0_FULL_CB_ID :
|
||||
hcan->RxFifo0FullCallback = HAL_CAN_RxFifo0FullCallback;
|
||||
break;
|
||||
|
||||
case HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID :
|
||||
hcan->RxFifo1MsgPendingCallback = HAL_CAN_RxFifo1MsgPendingCallback;
|
||||
break;
|
||||
|
||||
case HAL_CAN_RX_FIFO1_FULL_CB_ID :
|
||||
hcan->RxFifo1FullCallback = HAL_CAN_RxFifo1FullCallback;
|
||||
break;
|
||||
|
||||
case HAL_CAN_SLEEP_CB_ID :
|
||||
hcan->SleepCallback = HAL_CAN_SleepCallback;
|
||||
break;
|
||||
|
||||
case HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID :
|
||||
hcan->WakeUpFromRxMsgCallback = HAL_CAN_WakeUpFromRxMsgCallback;
|
||||
break;
|
||||
|
||||
case HAL_CAN_ERROR_CB_ID :
|
||||
hcan->ErrorCallback = HAL_CAN_ErrorCallback;
|
||||
break;
|
||||
|
||||
case HAL_CAN_MSPINIT_CB_ID :
|
||||
hcan->MspInitCallback = HAL_CAN_MspInit;
|
||||
break;
|
||||
|
||||
case HAL_CAN_MSPDEINIT_CB_ID :
|
||||
hcan->MspDeInitCallback = HAL_CAN_MspDeInit;
|
||||
break;
|
||||
|
||||
default :
|
||||
/* Update the error code */
|
||||
hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK;
|
||||
|
||||
/* Return error status */
|
||||
status = HAL_ERROR;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else if (hcan->State == HAL_CAN_STATE_RESET)
|
||||
{
|
||||
switch (CallbackID)
|
||||
{
|
||||
case HAL_CAN_MSPINIT_CB_ID :
|
||||
hcan->MspInitCallback = HAL_CAN_MspInit;
|
||||
break;
|
||||
|
||||
case HAL_CAN_MSPDEINIT_CB_ID :
|
||||
hcan->MspDeInitCallback = HAL_CAN_MspDeInit;
|
||||
break;
|
||||
|
||||
default :
|
||||
/* Update the error code */
|
||||
hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK;
|
||||
|
||||
/* Return error status */
|
||||
status = HAL_ERROR;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Update the error code */
|
||||
hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK;
|
||||
|
||||
/* Return error status */
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
@ -1142,7 +1512,7 @@ HAL_StatusTypeDef HAL_CAN_GetRxMessage(CAN_HandleTypeDef *hcan, uint32_t RxFifo,
|
|||
{
|
||||
pHeader->ExtId = ((CAN_RI0R_EXID | CAN_RI0R_STID) & hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_RI0R_EXID_Pos;
|
||||
}
|
||||
pHeader->RTR = (CAN_RI0R_RTR & hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_RI0R_RTR_Pos;
|
||||
pHeader->RTR = (CAN_RI0R_RTR & hcan->Instance->sFIFOMailBox[RxFifo].RIR);
|
||||
pHeader->DLC = (CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_DLC_Pos;
|
||||
pHeader->FilterMatchIndex = (CAN_RDT0R_FMI & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_FMI_Pos;
|
||||
pHeader->Timestamp = (CAN_RDT0R_TIME & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_TIME_Pos;
|
||||
|
@ -1328,8 +1698,13 @@ void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan)
|
|||
if ((tsrflags & CAN_TSR_TXOK0) != 0U)
|
||||
{
|
||||
/* Transmission Mailbox 0 complete callback */
|
||||
#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
|
||||
/* Call registered callback*/
|
||||
hcan->TxMailbox0CompleteCallback(hcan);
|
||||
#else
|
||||
/* Call weak (surcharged) callback */
|
||||
HAL_CAN_TxMailbox0CompleteCallback(hcan);
|
||||
#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
|
||||
}
|
||||
else
|
||||
{
|
||||
|
@ -1346,8 +1721,13 @@ void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan)
|
|||
else
|
||||
{
|
||||
/* Transmission Mailbox 0 abort callback */
|
||||
#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
|
||||
/* Call registered callback*/
|
||||
hcan->TxMailbox0AbortCallback(hcan);
|
||||
#else
|
||||
/* Call weak (surcharged) callback */
|
||||
HAL_CAN_TxMailbox0AbortCallback(hcan);
|
||||
#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -1361,8 +1741,13 @@ void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan)
|
|||
if ((tsrflags & CAN_TSR_TXOK1) != 0U)
|
||||
{
|
||||
/* Transmission Mailbox 1 complete callback */
|
||||
#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
|
||||
/* Call registered callback*/
|
||||
hcan->TxMailbox1CompleteCallback(hcan);
|
||||
#else
|
||||
/* Call weak (surcharged) callback */
|
||||
HAL_CAN_TxMailbox1CompleteCallback(hcan);
|
||||
#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
|
||||
}
|
||||
else
|
||||
{
|
||||
|
@ -1379,8 +1764,13 @@ void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan)
|
|||
else
|
||||
{
|
||||
/* Transmission Mailbox 1 abort callback */
|
||||
#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
|
||||
/* Call registered callback*/
|
||||
hcan->TxMailbox1AbortCallback(hcan);
|
||||
#else
|
||||
/* Call weak (surcharged) callback */
|
||||
HAL_CAN_TxMailbox1AbortCallback(hcan);
|
||||
#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -1394,8 +1784,13 @@ void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan)
|
|||
if ((tsrflags & CAN_TSR_TXOK2) != 0U)
|
||||
{
|
||||
/* Transmission Mailbox 2 complete callback */
|
||||
#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
|
||||
/* Call registered callback*/
|
||||
hcan->TxMailbox2CompleteCallback(hcan);
|
||||
#else
|
||||
/* Call weak (surcharged) callback */
|
||||
HAL_CAN_TxMailbox2CompleteCallback(hcan);
|
||||
#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
|
||||
}
|
||||
else
|
||||
{
|
||||
|
@ -1412,8 +1807,13 @@ void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan)
|
|||
else
|
||||
{
|
||||
/* Transmission Mailbox 2 abort callback */
|
||||
#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
|
||||
/* Call registered callback*/
|
||||
hcan->TxMailbox2AbortCallback(hcan);
|
||||
#else
|
||||
/* Call weak (surcharged) callback */
|
||||
HAL_CAN_TxMailbox2AbortCallback(hcan);
|
||||
#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -1441,8 +1841,13 @@ void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan)
|
|||
__HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF0);
|
||||
|
||||
/* Receive FIFO 0 full Callback */
|
||||
#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
|
||||
/* Call registered callback*/
|
||||
hcan->RxFifo0FullCallback(hcan);
|
||||
#else
|
||||
/* Call weak (surcharged) callback */
|
||||
HAL_CAN_RxFifo0FullCallback(hcan);
|
||||
#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -1453,8 +1858,13 @@ void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan)
|
|||
if ((hcan->Instance->RF0R & CAN_RF0R_FMP0) != 0U)
|
||||
{
|
||||
/* Receive FIFO 0 mesage pending Callback */
|
||||
#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
|
||||
/* Call registered callback*/
|
||||
hcan->RxFifo0MsgPendingCallback(hcan);
|
||||
#else
|
||||
/* Call weak (surcharged) callback */
|
||||
HAL_CAN_RxFifo0MsgPendingCallback(hcan);
|
||||
#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -1480,8 +1890,13 @@ void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan)
|
|||
__HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF1);
|
||||
|
||||
/* Receive FIFO 1 full Callback */
|
||||
#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
|
||||
/* Call registered callback*/
|
||||
hcan->RxFifo1FullCallback(hcan);
|
||||
#else
|
||||
/* Call weak (surcharged) callback */
|
||||
HAL_CAN_RxFifo1FullCallback(hcan);
|
||||
#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -1492,8 +1907,13 @@ void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan)
|
|||
if ((hcan->Instance->RF1R & CAN_RF1R_FMP1) != 0U)
|
||||
{
|
||||
/* Receive FIFO 1 mesage pending Callback */
|
||||
#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
|
||||
/* Call registered callback*/
|
||||
hcan->RxFifo1MsgPendingCallback(hcan);
|
||||
#else
|
||||
/* Call weak (surcharged) callback */
|
||||
HAL_CAN_RxFifo1MsgPendingCallback(hcan);
|
||||
#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -1506,8 +1926,13 @@ void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan)
|
|||
__HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_SLAKI);
|
||||
|
||||
/* Sleep Callback */
|
||||
#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
|
||||
/* Call registered callback*/
|
||||
hcan->SleepCallback(hcan);
|
||||
#else
|
||||
/* Call weak (surcharged) callback */
|
||||
HAL_CAN_SleepCallback(hcan);
|
||||
#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -1520,8 +1945,13 @@ void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan)
|
|||
__HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_WKU);
|
||||
|
||||
/* WakeUp Callback */
|
||||
#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
|
||||
/* Call registered callback*/
|
||||
hcan->WakeUpFromRxMsgCallback(hcan);
|
||||
#else
|
||||
/* Call weak (surcharged) callback */
|
||||
HAL_CAN_WakeUpFromRxMsgCallback(hcan);
|
||||
#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -1610,8 +2040,13 @@ void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan)
|
|||
hcan->ErrorCode |= errorcode;
|
||||
|
||||
/* Call Error callback function */
|
||||
#if USE_HAL_CAN_REGISTER_CALLBACKS == 1
|
||||
/* Call registered callback*/
|
||||
hcan->ErrorCallback(hcan);
|
||||
#else
|
||||
/* Call weak (surcharged) callback */
|
||||
HAL_CAN_ErrorCallback(hcan);
|
||||
#endif /* USE_HAL_CAN_REGISTER_CALLBACKS */
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -6,9 +6,9 @@
|
|||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the High Definition Multimedia Interface
|
||||
* Consumer Electronics Control Peripheral (CEC).
|
||||
* + Initialization and de-initialization functions
|
||||
* + IO operation functions
|
||||
* + Peripheral Control functions
|
||||
* + Initialization and de-initialization function
|
||||
* + IO operation function
|
||||
* + Peripheral Control function
|
||||
*
|
||||
*
|
||||
@verbatim
|
||||
|
@ -22,16 +22,16 @@
|
|||
(#) Initialize the CEC low level resources by implementing the HAL_CEC_MspInit ()API:
|
||||
(##) Enable the CEC interface clock.
|
||||
(##) CEC pins configuration:
|
||||
(+) Enable the clock for the CEC GPIOs.
|
||||
(+) Configure these CEC pins as alternate function pull-up.
|
||||
(+++) Enable the clock for the CEC GPIOs.
|
||||
(+++) Configure these CEC pins as alternate function pull-up.
|
||||
(##) NVIC configuration if you need to use interrupt process (HAL_CEC_Transmit_IT()
|
||||
and HAL_CEC_Receive_IT() APIs):
|
||||
(+) Configure the CEC interrupt priority.
|
||||
(+) Enable the NVIC CEC IRQ handle.
|
||||
(@) The specific CEC interrupts (Transmission complete interrupt,
|
||||
RXNE interrupt and Error Interrupts) will be managed using the macros
|
||||
__HAL_CEC_ENABLE_IT() and __HAL_CEC_DISABLE_IT() inside the transmit
|
||||
and receive process.
|
||||
(+++) Configure the CEC interrupt priority.
|
||||
(+++) Enable the NVIC CEC IRQ handle.
|
||||
(+++) The specific CEC interrupts (Transmission complete interrupt,
|
||||
RXNE interrupt and Error Interrupts) will be managed using the macros
|
||||
__HAL_CEC_ENABLE_IT() and __HAL_CEC_DISABLE_IT() inside the transmit
|
||||
and receive process.
|
||||
|
||||
(#) Program the Signal Free Time (SFT) and SFT option, Tolerance, reception stop in
|
||||
in case of Bit Rising Error, Error-Bit generation conditions, device logical
|
||||
|
@ -39,36 +39,72 @@
|
|||
|
||||
(#) Initialize the CEC registers by calling the HAL_CEC_Init() API.
|
||||
|
||||
(@) This API (HAL_CEC_Init()) configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
|
||||
[..]
|
||||
(@) This API (HAL_CEC_Init()) configures also the low level Hardware (GPIO, CLOCK, CORTEX...etc)
|
||||
by calling the customed HAL_CEC_MspInit() API.
|
||||
*** Callback registration ***
|
||||
=============================================
|
||||
|
||||
The compilation define USE_HAL_CEC_REGISTER_CALLBACKS when set to 1
|
||||
allows the user to configure dynamically the driver callbacks.
|
||||
Use Functions @ref HAL_CEC_RegisterCallback() or HAL_CEC_RegisterXXXCallback()
|
||||
to register an interrupt callback.
|
||||
|
||||
Function @ref HAL_CEC_RegisterCallback() allows to register following callbacks:
|
||||
(+) TxCpltCallback : Tx Transfer completed callback.
|
||||
(+) ErrorCallback : callback for error detection.
|
||||
(+) MspInitCallback : CEC MspInit.
|
||||
(+) MspDeInitCallback : CEC MspDeInit.
|
||||
This function takes as parameters the HAL peripheral handle, the Callback ID
|
||||
and a pointer to the user callback function.
|
||||
|
||||
For specific callback HAL_CEC_RxCpltCallback use dedicated register callbacks
|
||||
@ref HAL_CEC_RegisterRxCpltCallback().
|
||||
|
||||
Use function @ref HAL_CEC_UnRegisterCallback() to reset a callback to the default
|
||||
weak function.
|
||||
@ref HAL_CEC_UnRegisterCallback() takes as parameters the HAL peripheral handle,
|
||||
and the Callback ID.
|
||||
This function allows to reset following callbacks:
|
||||
(+) TxCpltCallback : Tx Transfer completed callback.
|
||||
(+) ErrorCallback : callback for error detection.
|
||||
(+) MspInitCallback : CEC MspInit.
|
||||
(+) MspDeInitCallback : CEC MspDeInit.
|
||||
|
||||
For callback HAL_CEC_RxCpltCallback use dedicated unregister callback :
|
||||
@ref HAL_CEC_UnRegisterRxCpltCallback().
|
||||
|
||||
By default, after the @ref HAL_CEC_Init() and when the state is HAL_CEC_STATE_RESET
|
||||
all callbacks are set to the corresponding weak functions :
|
||||
examples @ref HAL_CEC_TxCpltCallback() , @ref HAL_CEC_RxCpltCallback().
|
||||
Exception done for MspInit and MspDeInit functions that are
|
||||
reset to the legacy weak function in the @ref HAL_CEC_Init()/ @ref HAL_CEC_DeInit() only when
|
||||
these callbacks are null (not registered beforehand).
|
||||
if not, MspInit or MspDeInit are not null, the @ref HAL_CEC_Init() / @ref HAL_CEC_DeInit()
|
||||
keep and use the user MspInit/MspDeInit functions (registered beforehand)
|
||||
|
||||
Callbacks can be registered/unregistered in HAL_CEC_STATE_READY state only.
|
||||
Exception done MspInit/MspDeInit callbacks that can be registered/unregistered
|
||||
in HAL_CEC_STATE_READY or HAL_CEC_STATE_RESET state,
|
||||
thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
|
||||
In that case first register the MspInit/MspDeInit user callbacks
|
||||
using @ref HAL_CEC_RegisterCallback() before calling @ref HAL_CEC_DeInit()
|
||||
or @ref HAL_CEC_Init() function.
|
||||
|
||||
When the compilation define USE_HAL_CEC_REGISTER_CALLBACKS is set to 0 or
|
||||
not defined, the callback registration feature is not available and all callbacks
|
||||
are set to the corresponding weak functions.
|
||||
@endverbatim
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
@ -80,13 +116,12 @@
|
|||
* @{
|
||||
*/
|
||||
|
||||
#ifdef HAL_CEC_MODULE_ENABLED
|
||||
|
||||
#if defined(STM32F373xC) || defined(STM32F378xx)
|
||||
/** @defgroup CEC CEC
|
||||
* @brief HAL CEC module driver
|
||||
* @{
|
||||
*/
|
||||
#ifdef HAL_CEC_MODULE_ENABLED
|
||||
#if defined (CEC)
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
|
@ -146,7 +181,7 @@
|
|||
HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec)
|
||||
{
|
||||
/* Check the CEC handle allocation */
|
||||
if((hcec == NULL) ||(hcec->Init.RxBuffer == NULL))
|
||||
if ((hcec == NULL) || (hcec->Init.RxBuffer == NULL))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -163,40 +198,62 @@ HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec)
|
|||
assert_param(IS_CEC_LISTENING_MODE(hcec->Init.ListenMode));
|
||||
assert_param(IS_CEC_OWN_ADDRESS(hcec->Init.OwnAddress));
|
||||
|
||||
if(hcec->gState == HAL_CEC_STATE_RESET)
|
||||
#if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
|
||||
if (hcec->gState == HAL_CEC_STATE_RESET)
|
||||
{
|
||||
/* Allocate lock resource and initialize it */
|
||||
hcec->Lock = HAL_UNLOCKED;
|
||||
|
||||
hcec->TxCpltCallback = HAL_CEC_TxCpltCallback; /* Legacy weak TxCpltCallback */
|
||||
hcec->RxCpltCallback = HAL_CEC_RxCpltCallback; /* Legacy weak RxCpltCallback */
|
||||
hcec->ErrorCallback = HAL_CEC_ErrorCallback; /* Legacy weak ErrorCallback */
|
||||
|
||||
if (hcec->MspInitCallback == NULL)
|
||||
{
|
||||
hcec->MspInitCallback = HAL_CEC_MspInit; /* Legacy weak MspInit */
|
||||
}
|
||||
|
||||
/* Init the low level hardware */
|
||||
hcec->MspInitCallback(hcec);
|
||||
}
|
||||
#else
|
||||
if (hcec->gState == HAL_CEC_STATE_RESET)
|
||||
{
|
||||
/* Allocate lock resource and initialize it */
|
||||
hcec->Lock = HAL_UNLOCKED;
|
||||
/* Init the low level hardware : GPIO, CLOCK */
|
||||
HAL_CEC_MspInit(hcec);
|
||||
}
|
||||
#endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
|
||||
|
||||
hcec->gState = HAL_CEC_STATE_BUSY;
|
||||
|
||||
/* Disable the Peripheral */
|
||||
__HAL_CEC_DISABLE(hcec);
|
||||
|
||||
/* Write to CEC Control Register */
|
||||
hcec->Instance->CFGR = hcec->Init.SignalFreeTime | hcec->Init.Tolerance | hcec->Init.BRERxStop|\
|
||||
hcec->Init.BREErrorBitGen | hcec->Init.LBPEErrorBitGen | hcec->Init.BroadcastMsgNoErrorBitGen |\
|
||||
hcec->Init.SignalFreeTimeOption |((uint32_t)(hcec->Init.OwnAddress)<<16U) |\
|
||||
hcec->Instance->CFGR = hcec->Init.SignalFreeTime | hcec->Init.Tolerance | hcec->Init.BRERxStop | \
|
||||
hcec->Init.BREErrorBitGen | hcec->Init.LBPEErrorBitGen | hcec->Init.BroadcastMsgNoErrorBitGen | \
|
||||
hcec->Init.SignalFreeTimeOption | ((uint32_t)(hcec->Init.OwnAddress) << 16U) | \
|
||||
hcec->Init.ListenMode;
|
||||
|
||||
/* Enable the following CEC Transmission/Reception interrupts as
|
||||
* well as the following CEC Transmission/Reception Errors interrupts
|
||||
* Rx Byte Received IT
|
||||
* End of Reception IT
|
||||
* Rx overrun
|
||||
* Rx bit rising error
|
||||
* Rx short bit period error
|
||||
* Rx long bit period error
|
||||
* Rx missing acknowledge
|
||||
* Tx Byte Request IT
|
||||
* End of Transmission IT
|
||||
* Tx Missing Acknowledge IT
|
||||
* Tx-Error IT
|
||||
* Tx-Buffer Underrun IT
|
||||
* Tx arbitration lost */
|
||||
__HAL_CEC_ENABLE_IT(hcec, CEC_IT_RXBR|CEC_IT_RXEND|CEC_IER_RX_ALL_ERR|CEC_IT_TXBR|CEC_IT_TXEND|CEC_IER_TX_ALL_ERR);
|
||||
* well as the following CEC Transmission/Reception Errors interrupts
|
||||
* Rx Byte Received IT
|
||||
* End of Reception IT
|
||||
* Rx overrun
|
||||
* Rx bit rising error
|
||||
* Rx short bit period error
|
||||
* Rx long bit period error
|
||||
* Rx missing acknowledge
|
||||
* Tx Byte Request IT
|
||||
* End of Transmission IT
|
||||
* Tx Missing Acknowledge IT
|
||||
* Tx-Error IT
|
||||
* Tx-Buffer Underrun IT
|
||||
* Tx arbitration lost */
|
||||
__HAL_CEC_ENABLE_IT(hcec, CEC_IT_RXBR | CEC_IT_RXEND | CEC_IER_RX_ALL_ERR | CEC_IT_TXBR | CEC_IT_TXEND |
|
||||
CEC_IER_TX_ALL_ERR);
|
||||
|
||||
/* Enable the CEC Peripheral */
|
||||
__HAL_CEC_ENABLE(hcec);
|
||||
|
@ -216,7 +273,7 @@ HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec)
|
|||
HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec)
|
||||
{
|
||||
/* Check the CEC handle allocation */
|
||||
if(hcec == NULL)
|
||||
if (hcec == NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -226,30 +283,43 @@ HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec)
|
|||
|
||||
hcec->gState = HAL_CEC_STATE_BUSY;
|
||||
|
||||
#if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
|
||||
if (hcec->MspDeInitCallback == NULL)
|
||||
{
|
||||
hcec->MspDeInitCallback = HAL_CEC_MspDeInit; /* Legacy weak MspDeInit */
|
||||
}
|
||||
|
||||
/* DeInit the low level hardware */
|
||||
hcec->MspDeInitCallback(hcec);
|
||||
|
||||
#else
|
||||
/* DeInit the low level hardware */
|
||||
HAL_CEC_MspDeInit(hcec);
|
||||
#endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
|
||||
|
||||
/* Disable the Peripheral */
|
||||
__HAL_CEC_DISABLE(hcec);
|
||||
|
||||
/* Clear Flags */
|
||||
__HAL_CEC_CLEAR_FLAG(hcec,CEC_FLAG_TXEND|CEC_FLAG_TXBR|CEC_FLAG_RXBR|CEC_FLAG_RXEND|CEC_ISR_ALL_ERROR);
|
||||
__HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TXEND | CEC_FLAG_TXBR | CEC_FLAG_RXBR | CEC_FLAG_RXEND | CEC_ISR_ALL_ERROR);
|
||||
|
||||
/* Disable the following CEC Transmission/Reception interrupts as
|
||||
* well as the following CEC Transmission/Reception Errors interrupts
|
||||
* Rx Byte Received IT
|
||||
* End of Reception IT
|
||||
* Rx overrun
|
||||
* Rx bit rising error
|
||||
* Rx short bit period error
|
||||
* Rx long bit period error
|
||||
* Rx missing acknowledge
|
||||
* Tx Byte Request IT
|
||||
* End of Transmission IT
|
||||
* Tx Missing Acknowledge IT
|
||||
* Tx-Error IT
|
||||
* Tx-Buffer Underrun IT
|
||||
* Tx arbitration lost */
|
||||
__HAL_CEC_DISABLE_IT(hcec, CEC_IT_RXBR|CEC_IT_RXEND|CEC_IER_RX_ALL_ERR|CEC_IT_TXBR|CEC_IT_TXEND|CEC_IER_TX_ALL_ERR);
|
||||
* well as the following CEC Transmission/Reception Errors interrupts
|
||||
* Rx Byte Received IT
|
||||
* End of Reception IT
|
||||
* Rx overrun
|
||||
* Rx bit rising error
|
||||
* Rx short bit period error
|
||||
* Rx long bit period error
|
||||
* Rx missing acknowledge
|
||||
* Tx Byte Request IT
|
||||
* End of Transmission IT
|
||||
* Tx Missing Acknowledge IT
|
||||
* Tx-Error IT
|
||||
* Tx-Buffer Underrun IT
|
||||
* Tx arbitration lost */
|
||||
__HAL_CEC_DISABLE_IT(hcec, CEC_IT_RXBR | CEC_IT_RXEND | CEC_IER_RX_ALL_ERR | CEC_IT_TXBR | CEC_IT_TXEND |
|
||||
CEC_IER_TX_ALL_ERR);
|
||||
|
||||
hcec->ErrorCode = HAL_CEC_ERROR_NONE;
|
||||
hcec->gState = HAL_CEC_STATE_RESET;
|
||||
|
@ -282,9 +352,9 @@ HAL_StatusTypeDef HAL_CEC_SetDeviceAddress(CEC_HandleTypeDef *hcec, uint16_t CEC
|
|||
/* Disable the Peripheral */
|
||||
__HAL_CEC_DISABLE(hcec);
|
||||
|
||||
if(CEC_OwnAddress != CEC_OWN_ADDRESS_NONE)
|
||||
if (CEC_OwnAddress != CEC_OWN_ADDRESS_NONE)
|
||||
{
|
||||
hcec->Instance->CFGR |= ((uint32_t)CEC_OwnAddress<<16U);
|
||||
hcec->Instance->CFGR |= ((uint32_t)CEC_OwnAddress << 16);
|
||||
}
|
||||
else
|
||||
{
|
||||
|
@ -313,7 +383,7 @@ HAL_StatusTypeDef HAL_CEC_SetDeviceAddress(CEC_HandleTypeDef *hcec, uint16_t CEC
|
|||
* @param hcec CEC handle
|
||||
* @retval None
|
||||
*/
|
||||
__weak void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec)
|
||||
__weak void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(hcec);
|
||||
|
@ -327,7 +397,7 @@ HAL_StatusTypeDef HAL_CEC_SetDeviceAddress(CEC_HandleTypeDef *hcec, uint16_t CEC
|
|||
* @param hcec CEC handle
|
||||
* @retval None
|
||||
*/
|
||||
__weak void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec)
|
||||
__weak void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(hcec);
|
||||
|
@ -335,6 +405,244 @@ HAL_StatusTypeDef HAL_CEC_SetDeviceAddress(CEC_HandleTypeDef *hcec, uint16_t CEC
|
|||
the HAL_CEC_MspDeInit can be implemented in the user file
|
||||
*/
|
||||
}
|
||||
#if (USE_HAL_CEC_REGISTER_CALLBACKS == 1)
|
||||
/**
|
||||
* @brief Register a User CEC Callback
|
||||
* To be used instead of the weak predefined callback
|
||||
* @param hcec CEC handle
|
||||
* @param CallbackID ID of the callback to be registered
|
||||
* This parameter can be one of the following values:
|
||||
* @arg @ref HAL_CEC_TX_CPLT_CB_ID Tx Complete callback ID
|
||||
* @arg @ref HAL_CEC_ERROR_CB_ID Error callback ID
|
||||
* @arg @ref HAL_CEC_MSPINIT_CB_ID MspInit callback ID
|
||||
* @arg @ref HAL_CEC_MSPDEINIT_CB_ID MspDeInit callback ID
|
||||
* @param pCallback pointer to the Callback function
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_CEC_RegisterCallback(CEC_HandleTypeDef *hcec, HAL_CEC_CallbackIDTypeDef CallbackID,
|
||||
pCEC_CallbackTypeDef pCallback)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
if (pCallback == NULL)
|
||||
{
|
||||
/* Update the error code */
|
||||
hcec->ErrorCode |= HAL_CEC_ERROR_INVALID_CALLBACK;
|
||||
return HAL_ERROR;
|
||||
}
|
||||
/* Process locked */
|
||||
__HAL_LOCK(hcec);
|
||||
|
||||
if (hcec->gState == HAL_CEC_STATE_READY)
|
||||
{
|
||||
switch (CallbackID)
|
||||
{
|
||||
case HAL_CEC_TX_CPLT_CB_ID :
|
||||
hcec->TxCpltCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_CEC_ERROR_CB_ID :
|
||||
hcec->ErrorCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_CEC_MSPINIT_CB_ID :
|
||||
hcec->MspInitCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_CEC_MSPDEINIT_CB_ID :
|
||||
hcec->MspDeInitCallback = pCallback;
|
||||
break;
|
||||
|
||||
default :
|
||||
/* Update the error code */
|
||||
hcec->ErrorCode |= HAL_CEC_ERROR_INVALID_CALLBACK;
|
||||
/* Return error status */
|
||||
status = HAL_ERROR;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else if (hcec->gState == HAL_CEC_STATE_RESET)
|
||||
{
|
||||
switch (CallbackID)
|
||||
{
|
||||
case HAL_CEC_MSPINIT_CB_ID :
|
||||
hcec->MspInitCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_CEC_MSPDEINIT_CB_ID :
|
||||
hcec->MspDeInitCallback = pCallback;
|
||||
break;
|
||||
|
||||
default :
|
||||
/* Update the error code */
|
||||
hcec->ErrorCode |= HAL_CEC_ERROR_INVALID_CALLBACK;
|
||||
/* Return error status */
|
||||
status = HAL_ERROR;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Update the error code */
|
||||
hcec->ErrorCode |= HAL_CEC_ERROR_INVALID_CALLBACK;
|
||||
/* Return error status */
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Release Lock */
|
||||
__HAL_UNLOCK(hcec);
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Unregister an CEC Callback
|
||||
* CEC callabck is redirected to the weak predefined callback
|
||||
* @param hcec uart handle
|
||||
* @param CallbackID ID of the callback to be unregistered
|
||||
* This parameter can be one of the following values:
|
||||
* @arg @ref HAL_CEC_TX_CPLT_CB_ID Tx Complete callback ID
|
||||
* @arg @ref HAL_CEC_ERROR_CB_ID Error callback ID
|
||||
* @arg @ref HAL_CEC_MSPINIT_CB_ID MspInit callback ID
|
||||
* @arg @ref HAL_CEC_MSPDEINIT_CB_ID MspDeInit callback ID
|
||||
* @retval status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_CEC_UnRegisterCallback(CEC_HandleTypeDef *hcec, HAL_CEC_CallbackIDTypeDef CallbackID)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
/* Process locked */
|
||||
__HAL_LOCK(hcec);
|
||||
|
||||
if (hcec->gState == HAL_CEC_STATE_READY)
|
||||
{
|
||||
switch (CallbackID)
|
||||
{
|
||||
case HAL_CEC_TX_CPLT_CB_ID :
|
||||
hcec->TxCpltCallback = HAL_CEC_TxCpltCallback; /* Legacy weak TxCpltCallback */
|
||||
break;
|
||||
|
||||
case HAL_CEC_ERROR_CB_ID :
|
||||
hcec->ErrorCallback = HAL_CEC_ErrorCallback; /* Legacy weak ErrorCallback */
|
||||
break;
|
||||
|
||||
case HAL_CEC_MSPINIT_CB_ID :
|
||||
hcec->MspInitCallback = HAL_CEC_MspInit;
|
||||
break;
|
||||
|
||||
case HAL_CEC_MSPDEINIT_CB_ID :
|
||||
hcec->MspDeInitCallback = HAL_CEC_MspDeInit;
|
||||
break;
|
||||
|
||||
default :
|
||||
/* Update the error code */
|
||||
hcec->ErrorCode |= HAL_CEC_ERROR_INVALID_CALLBACK;
|
||||
/* Return error status */
|
||||
status = HAL_ERROR;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else if (hcec->gState == HAL_CEC_STATE_RESET)
|
||||
{
|
||||
switch (CallbackID)
|
||||
{
|
||||
case HAL_CEC_MSPINIT_CB_ID :
|
||||
hcec->MspInitCallback = HAL_CEC_MspInit;
|
||||
break;
|
||||
|
||||
case HAL_CEC_MSPDEINIT_CB_ID :
|
||||
hcec->MspDeInitCallback = HAL_CEC_MspDeInit;
|
||||
break;
|
||||
|
||||
default :
|
||||
/* Update the error code */
|
||||
hcec->ErrorCode |= HAL_CEC_ERROR_INVALID_CALLBACK;
|
||||
/* Return error status */
|
||||
status = HAL_ERROR;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Update the error code */
|
||||
hcec->ErrorCode |= HAL_CEC_ERROR_INVALID_CALLBACK;
|
||||
/* Return error status */
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Release Lock */
|
||||
__HAL_UNLOCK(hcec);
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Register CEC RX complete Callback
|
||||
* To be used instead of the weak HAL_CEC_RxCpltCallback() predefined callback
|
||||
* @param hcec CEC handle
|
||||
* @param pCallback pointer to the Rx transfer compelete Callback function
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_CEC_RegisterRxCpltCallback(CEC_HandleTypeDef *hcec, pCEC_RxCallbackTypeDef pCallback)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
if (pCallback == NULL)
|
||||
{
|
||||
/* Update the error code */
|
||||
hcec->ErrorCode |= HAL_CEC_ERROR_INVALID_CALLBACK;
|
||||
return HAL_ERROR;
|
||||
}
|
||||
/* Process locked */
|
||||
__HAL_LOCK(hcec);
|
||||
|
||||
if (HAL_CEC_STATE_READY == hcec->RxState)
|
||||
{
|
||||
hcec->RxCpltCallback = pCallback;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Update the error code */
|
||||
hcec->ErrorCode |= HAL_CEC_ERROR_INVALID_CALLBACK;
|
||||
/* Return error status */
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Release Lock */
|
||||
__HAL_UNLOCK(hcec);
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief UnRegister CEC RX complete Callback
|
||||
* CEC RX complete Callback is redirected to the weak HAL_CEC_RxCpltCallback() predefined callback
|
||||
* @param hcec CEC handle
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_CEC_UnRegisterRxCpltCallback(CEC_HandleTypeDef *hcec)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
/* Process locked */
|
||||
__HAL_LOCK(hcec);
|
||||
|
||||
if (HAL_CEC_STATE_READY == hcec->RxState)
|
||||
{
|
||||
hcec->RxCpltCallback = HAL_CEC_RxCpltCallback; /* Legacy weak CEC RxCpltCallback */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Update the error code */
|
||||
hcec->ErrorCode |= HAL_CEC_ERROR_INVALID_CALLBACK;
|
||||
/* Return error status */
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Release Lock */
|
||||
__HAL_UNLOCK(hcec);
|
||||
return status;
|
||||
}
|
||||
#endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
@ -350,15 +658,15 @@ HAL_StatusTypeDef HAL_CEC_SetDeviceAddress(CEC_HandleTypeDef *hcec, uint16_t CEC
|
|||
This subsection provides a set of functions allowing to manage the CEC data transfers.
|
||||
|
||||
(#) The CEC handle must contain the initiator (TX side) and the destination (RX side)
|
||||
logical addresses (4-bit long addresses, 0x0F for broadcast messages destination)
|
||||
logical addresses (4-bit long addresses, 0xF for broadcast messages destination)
|
||||
|
||||
(#) The communication is performed using Interrupts.
|
||||
These API's return the HAL status.
|
||||
The end of the data processing will be indicated through the
|
||||
dedicated CEC IRQ when using Interrupt mode.
|
||||
The HAL_CEC_TxCpltCallback(), HAL_CEC_RxCpltCallback() user callbacks
|
||||
will be executed respectivelly at the end of the transmit or Receive process
|
||||
The HAL_CEC_ErrorCallback()user callback will be executed when a communication
|
||||
will be executed respectively at the end of the transmit or Receive process
|
||||
The HAL_CEC_ErrorCallback() user callback will be executed when a communication
|
||||
error is detected
|
||||
|
||||
(#) API's with Interrupt are :
|
||||
|
@ -385,13 +693,14 @@ HAL_StatusTypeDef HAL_CEC_SetDeviceAddress(CEC_HandleTypeDef *hcec, uint16_t CEC
|
|||
* Maximum TX size is 15 bytes (1 opcode and up to 14 operands).
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t InitiatorAddress, uint8_t DestinationAddress, uint8_t *pData, uint32_t Size)
|
||||
HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t InitiatorAddress, uint8_t DestinationAddress,
|
||||
uint8_t *pData, uint32_t Size)
|
||||
{
|
||||
/* if the IP isn't already busy and if there is no previous transmission
|
||||
already pending due to arbitration lost */
|
||||
if (hcec->gState == HAL_CEC_STATE_READY)
|
||||
{
|
||||
if((pData == NULL ) && (Size > 0U))
|
||||
if ((pData == NULL) && (Size > 0U))
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
@ -407,10 +716,10 @@ HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t Initiator
|
|||
hcec->ErrorCode = HAL_CEC_ERROR_NONE;
|
||||
|
||||
/* initialize the number of bytes to send,
|
||||
* 0 means only one header is sent (ping operation) */
|
||||
hcec->TxXferCount = Size;
|
||||
* 0 means only one header is sent (ping operation) */
|
||||
hcec->TxXferCount = (uint16_t)Size;
|
||||
|
||||
/* in case of no payload (Size = 0U), sender is only pinging the system;
|
||||
/* in case of no payload (Size = 0), sender is only pinging the system;
|
||||
Set TX End of Message (TXEOM) bit, must be set before writing data to TXDR */
|
||||
if (Size == 0U)
|
||||
{
|
||||
|
@ -418,10 +727,11 @@ HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t Initiator
|
|||
}
|
||||
|
||||
/* send header block */
|
||||
hcec->Instance->TXDR = ((uint8_t)(InitiatorAddress << CEC_INITIATOR_LSB_POS) |(uint8_t) DestinationAddress);
|
||||
hcec->Instance->TXDR = (uint32_t)(((uint32_t)InitiatorAddress << CEC_INITIATOR_LSB_POS) | DestinationAddress);
|
||||
|
||||
/* Set TX Start of Message (TXSOM) bit */
|
||||
__HAL_CEC_FIRST_BYTE_TX_SET(hcec);
|
||||
|
||||
|
||||
/* Process Unlocked */
|
||||
__HAL_UNLOCK(hcec);
|
||||
|
||||
|
@ -451,7 +761,7 @@ uint32_t HAL_CEC_GetLastReceivedFrameSize(CEC_HandleTypeDef *hcec)
|
|||
* @note This function can be called only inside the HAL_CEC_RxCpltCallback()
|
||||
* @retval Frame size
|
||||
*/
|
||||
void HAL_CEC_ChangeRxBuffer(CEC_HandleTypeDef *hcec, uint8_t* Rxbuffer)
|
||||
void HAL_CEC_ChangeRxBuffer(CEC_HandleTypeDef *hcec, uint8_t *Rxbuffer)
|
||||
{
|
||||
hcec->Init.RxBuffer = Rxbuffer;
|
||||
}
|
||||
|
@ -465,13 +775,13 @@ void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec)
|
|||
{
|
||||
|
||||
/* save interrupts register for further error or interrupts handling purposes */
|
||||
uint32_t reg = 0U;
|
||||
uint32_t reg;
|
||||
reg = hcec->Instance->ISR;
|
||||
|
||||
|
||||
/* ----------------------------Arbitration Lost Management----------------------------------*/
|
||||
/* CEC TX arbitration error interrupt occurred --------------------------------------*/
|
||||
if((reg & CEC_FLAG_ARBLST) != RESET)
|
||||
if ((reg & CEC_FLAG_ARBLST) != 0U)
|
||||
{
|
||||
hcec->ErrorCode = HAL_CEC_ERROR_ARBLST;
|
||||
__HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_ARBLST);
|
||||
|
@ -479,18 +789,19 @@ void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec)
|
|||
|
||||
/* ----------------------------Rx Management----------------------------------*/
|
||||
/* CEC RX byte received interrupt ---------------------------------------------------*/
|
||||
if((reg & CEC_FLAG_RXBR) != RESET)
|
||||
if ((reg & CEC_FLAG_RXBR) != 0U)
|
||||
{
|
||||
/* reception is starting */
|
||||
hcec->RxState = HAL_CEC_STATE_BUSY_RX;
|
||||
hcec->RxXferSize++;
|
||||
/* read received byte */
|
||||
*hcec->Init.RxBuffer++ = hcec->Instance->RXDR;
|
||||
*hcec->Init.RxBuffer = (uint8_t) hcec->Instance->RXDR;
|
||||
hcec->Init.RxBuffer++;
|
||||
__HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXBR);
|
||||
}
|
||||
|
||||
/* CEC RX end received interrupt ---------------------------------------------------*/
|
||||
if((reg & CEC_FLAG_RXEND) != RESET)
|
||||
if ((reg & CEC_FLAG_RXEND) != 0U)
|
||||
{
|
||||
/* clear IT */
|
||||
__HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXEND);
|
||||
|
@ -499,32 +810,38 @@ void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec)
|
|||
hcec->RxState = HAL_CEC_STATE_READY;
|
||||
hcec->ErrorCode = HAL_CEC_ERROR_NONE;
|
||||
hcec->Init.RxBuffer -= hcec->RxXferSize;
|
||||
#if (USE_HAL_CEC_REGISTER_CALLBACKS == 1U)
|
||||
hcec->RxCpltCallback(hcec, hcec->RxXferSize);
|
||||
#else
|
||||
HAL_CEC_RxCpltCallback(hcec, hcec->RxXferSize);
|
||||
#endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
|
||||
hcec->RxXferSize = 0U;
|
||||
}
|
||||
|
||||
/* ----------------------------Tx Management----------------------------------*/
|
||||
/* CEC TX byte request interrupt ------------------------------------------------*/
|
||||
if((reg & CEC_FLAG_TXBR) != RESET)
|
||||
if ((reg & CEC_FLAG_TXBR) != 0U)
|
||||
{
|
||||
if (hcec->TxXferCount == 0U)
|
||||
{
|
||||
/* if this is the last byte transmission, set TX End of Message (TXEOM) bit */
|
||||
__HAL_CEC_LAST_BYTE_TX_SET(hcec);
|
||||
hcec->Instance->TXDR = *hcec->pTxBuffPtr++;
|
||||
hcec->Instance->TXDR = *hcec->pTxBuffPtr;
|
||||
hcec->pTxBuffPtr++;
|
||||
}
|
||||
else
|
||||
{
|
||||
hcec->Instance->TXDR = *hcec->pTxBuffPtr++;
|
||||
{
|
||||
hcec->Instance->TXDR = *hcec->pTxBuffPtr;
|
||||
hcec->pTxBuffPtr++;
|
||||
hcec->TxXferCount--;
|
||||
}
|
||||
/* clear Tx-Byte request flag */
|
||||
__HAL_CEC_CLEAR_FLAG(hcec,CEC_FLAG_TXBR);
|
||||
__HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TXBR);
|
||||
}
|
||||
|
||||
/* CEC TX end interrupt ------------------------------------------------*/
|
||||
if((reg & CEC_FLAG_TXEND) != RESET)
|
||||
{
|
||||
if ((reg & CEC_FLAG_TXEND) != 0U)
|
||||
{
|
||||
__HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TXEND);
|
||||
|
||||
/* Tx process is ended, restore hcec->gState to Ready */
|
||||
|
@ -533,32 +850,48 @@ void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec)
|
|||
start again the Transmission under the Tx call back API */
|
||||
__HAL_UNLOCK(hcec);
|
||||
hcec->ErrorCode = HAL_CEC_ERROR_NONE;
|
||||
#if (USE_HAL_CEC_REGISTER_CALLBACKS == 1U)
|
||||
hcec->TxCpltCallback(hcec);
|
||||
#else
|
||||
HAL_CEC_TxCpltCallback(hcec);
|
||||
#endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
|
||||
}
|
||||
|
||||
/* ----------------------------Rx/Tx Error Management----------------------------------*/
|
||||
if ((reg & (CEC_ISR_RXOVR|CEC_ISR_BRE|CEC_ISR_SBPE|CEC_ISR_LBPE|CEC_ISR_RXACKE|CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)) != 0U)
|
||||
if ((reg & (CEC_ISR_RXOVR | CEC_ISR_BRE | CEC_ISR_SBPE | CEC_ISR_LBPE | CEC_ISR_RXACKE | CEC_ISR_TXUDR | CEC_ISR_TXERR |
|
||||
CEC_ISR_TXACKE)) != 0U)
|
||||
{
|
||||
hcec->ErrorCode = reg;
|
||||
__HAL_CEC_CLEAR_FLAG(hcec, HAL_CEC_ERROR_RXOVR|HAL_CEC_ERROR_BRE|CEC_FLAG_LBPE|CEC_FLAG_SBPE|HAL_CEC_ERROR_RXACKE|HAL_CEC_ERROR_TXUDR|HAL_CEC_ERROR_TXERR|HAL_CEC_ERROR_TXACKE);
|
||||
__HAL_CEC_CLEAR_FLAG(hcec, HAL_CEC_ERROR_RXOVR | HAL_CEC_ERROR_BRE | CEC_FLAG_LBPE | CEC_FLAG_SBPE |
|
||||
HAL_CEC_ERROR_RXACKE | HAL_CEC_ERROR_TXUDR | HAL_CEC_ERROR_TXERR | HAL_CEC_ERROR_TXACKE);
|
||||
|
||||
|
||||
if((reg & (CEC_ISR_RXOVR|CEC_ISR_BRE|CEC_ISR_SBPE|CEC_ISR_LBPE|CEC_ISR_RXACKE)) != RESET)
|
||||
if ((reg & (CEC_ISR_RXOVR | CEC_ISR_BRE | CEC_ISR_SBPE | CEC_ISR_LBPE | CEC_ISR_RXACKE)) != 0U)
|
||||
{
|
||||
hcec->Init.RxBuffer-=hcec->RxXferSize;
|
||||
hcec->Init.RxBuffer -= hcec->RxXferSize;
|
||||
hcec->RxXferSize = 0U;
|
||||
hcec->RxState = HAL_CEC_STATE_READY;
|
||||
}
|
||||
else if (((reg & (CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)) != RESET) && ((reg & CEC_ISR_ARBLST) == RESET))
|
||||
{
|
||||
else if (((reg & CEC_ISR_ARBLST) == 0U) && ((reg & (CEC_ISR_TXUDR | CEC_ISR_TXERR | CEC_ISR_TXACKE)) != 0U))
|
||||
{
|
||||
/* Set the CEC state ready to be able to start again the process */
|
||||
hcec->gState = HAL_CEC_STATE_READY;
|
||||
}
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Nothing todo*/
|
||||
}
|
||||
#if (USE_HAL_CEC_REGISTER_CALLBACKS == 1U)
|
||||
hcec->ErrorCallback(hcec);
|
||||
#else
|
||||
/* Error Call Back */
|
||||
HAL_CEC_ErrorCallback(hcec);
|
||||
#endif /* USE_HAL_CEC_REGISTER_CALLBACKS */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Nothing todo*/
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -566,7 +899,7 @@ void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec)
|
|||
* @param hcec CEC handle
|
||||
* @retval None
|
||||
*/
|
||||
__weak void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec)
|
||||
__weak void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(hcec);
|
||||
|
@ -596,7 +929,7 @@ __weak void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec, uint32_t RxFrameSize
|
|||
* @param hcec CEC handle
|
||||
* @retval None
|
||||
*/
|
||||
__weak void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec)
|
||||
__weak void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(hcec);
|
||||
|
@ -618,7 +951,7 @@ __weak void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec, uint32_t RxFrameSize
|
|||
[..]
|
||||
This subsection provides a set of functions allowing to control the CEC.
|
||||
(+) HAL_CEC_GetState() API can be helpful to check in run-time the state of the CEC peripheral.
|
||||
(+) HAL_CEC_GetError() API can be helpful to check in run-time the error of the CEC peripheral.
|
||||
(+) HAL_CEC_GetError() API can be helpful to check in run-time the error of the CEC peripheral.
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
@ -630,7 +963,7 @@ __weak void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec, uint32_t RxFrameSize
|
|||
*/
|
||||
HAL_CEC_StateTypeDef HAL_CEC_GetState(CEC_HandleTypeDef *hcec)
|
||||
{
|
||||
uint32_t temp1 = 0x00U, temp2 = 0x00U;
|
||||
uint32_t temp1, temp2;
|
||||
temp1 = hcec->gState;
|
||||
temp2 = hcec->RxState;
|
||||
|
||||
|
@ -639,7 +972,7 @@ HAL_CEC_StateTypeDef HAL_CEC_GetState(CEC_HandleTypeDef *hcec)
|
|||
|
||||
/**
|
||||
* @brief Return the CEC error code
|
||||
* @param hcec pointer to a CEC_HandleTypeDef structure that contains
|
||||
* @param hcec pointer to a CEC_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified CEC.
|
||||
* @retval CEC Error Code
|
||||
*/
|
||||
|
@ -655,10 +988,7 @@ uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec)
|
|||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
#endif /* defined(STM32F373xC) || defined(STM32F378xx) */
|
||||
|
||||
#endif /* CEC */
|
||||
#endif /* HAL_CEC_MODULE_ENABLED */
|
||||
/**
|
||||
* @}
|
||||
|
|
|
@ -92,33 +92,76 @@
|
|||
(#) For safety purposes comparator(s) can be locked using HAL_COMP_Lock() function.
|
||||
Only a MCU reset can reset that protection.
|
||||
|
||||
*** Callback registration ***
|
||||
=============================================
|
||||
[..]
|
||||
|
||||
The compilation flag USE_HAL_COMP_REGISTER_CALLBACKS, when set to 1,
|
||||
allows the user to configure dynamically the driver callbacks.
|
||||
Use Functions @ref HAL_COMP_RegisterCallback()
|
||||
to register an interrupt callback.
|
||||
[..]
|
||||
|
||||
Function @ref HAL_COMP_RegisterCallback() allows to register following callbacks:
|
||||
(+) OperationCpltCallback : callback for End of operation.
|
||||
(+) ErrorCallback : callback for error detection.
|
||||
(+) MspInitCallback : callback for Msp Init.
|
||||
(+) MspDeInitCallback : callback for Msp DeInit.
|
||||
This function takes as parameters the HAL peripheral handle, the Callback ID
|
||||
and a pointer to the user callback function.
|
||||
[..]
|
||||
|
||||
Use function @ref HAL_COMP_UnRegisterCallback to reset a callback to the default
|
||||
weak function.
|
||||
[..]
|
||||
|
||||
@ref HAL_COMP_UnRegisterCallback takes as parameters the HAL peripheral handle,
|
||||
and the Callback ID.
|
||||
This function allows to reset following callbacks:
|
||||
(+) OperationCpltCallback : callback for End of operation.
|
||||
(+) ErrorCallback : callback for error detection.
|
||||
(+) MspInitCallback : callback for Msp Init.
|
||||
(+) MspDeInitCallback : callback for Msp DeInit.
|
||||
[..]
|
||||
|
||||
By default, after the @ref HAL_COMP_Init() and when the state is @ref HAL_COMP_STATE_RESET
|
||||
all callbacks are set to the corresponding weak functions:
|
||||
examples @ref HAL_COMP_OperationCpltCallback(), @ref HAL_COMP_ErrorCallback().
|
||||
Exception done for MspInit and MspDeInit functions that are
|
||||
reset to the legacy weak functions in the @ref HAL_COMP_Init()/ @ref HAL_COMP_DeInit() only when
|
||||
these callbacks are null (not registered beforehand).
|
||||
[..]
|
||||
|
||||
If MspInit or MspDeInit are not null, the @ref HAL_COMP_Init()/ @ref HAL_COMP_DeInit()
|
||||
keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state.
|
||||
[..]
|
||||
|
||||
Callbacks can be registered/unregistered in @ref HAL_COMP_STATE_READY state only.
|
||||
Exception done MspInit/MspDeInit functions that can be registered/unregistered
|
||||
in @ref HAL_COMP_STATE_READY or @ref HAL_COMP_STATE_RESET state,
|
||||
thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
|
||||
[..]
|
||||
|
||||
Then, the user first registers the MspInit/MspDeInit user callbacks
|
||||
using @ref HAL_COMP_RegisterCallback() before calling @ref HAL_COMP_DeInit()
|
||||
or @ref HAL_COMP_Init() function.
|
||||
[..]
|
||||
|
||||
When the compilation flag USE_HAL_COMP_REGISTER_CALLBACKS is set to 0 or
|
||||
not defined, the callback registration feature is not available and all callbacks
|
||||
are set to the corresponding weak functions.
|
||||
|
||||
@endverbatim
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
@ -328,8 +371,22 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp)
|
|||
|
||||
/* Init SYSCFG and the low level hardware to access comparators */
|
||||
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
||||
|
||||
#if (USE_HAL_COMP_REGISTER_CALLBACKS == 1)
|
||||
/* Init the COMP Callback settings */
|
||||
hcomp->TriggerCallback = HAL_COMP_TriggerCallback; /* Legacy weak callback */
|
||||
|
||||
if (hcomp->MspInitCallback == NULL)
|
||||
{
|
||||
hcomp->MspInitCallback = HAL_COMP_MspInit; /* Legacy weak MspInit */
|
||||
}
|
||||
|
||||
/* Init the low level hardware */
|
||||
hcomp->MspInitCallback(hcomp);
|
||||
#else
|
||||
/* Init the low level hardware : SYSCFG to access comparators */
|
||||
HAL_COMP_MspInit(hcomp);
|
||||
HAL_COMP_MspInit(hcomp);
|
||||
#endif /* USE_HAL_COMP_REGISTER_CALLBACKS */
|
||||
|
||||
if (hcomp->State == HAL_COMP_STATE_RESET)
|
||||
{
|
||||
|
@ -382,8 +439,18 @@ HAL_StatusTypeDef HAL_COMP_DeInit(COMP_HandleTypeDef *hcomp)
|
|||
/* Set COMP_CSR register to reset value */
|
||||
COMP_DEINIT(hcomp);
|
||||
|
||||
#if (USE_HAL_COMP_REGISTER_CALLBACKS == 1)
|
||||
if (hcomp->MspDeInitCallback == NULL)
|
||||
{
|
||||
hcomp->MspDeInitCallback = HAL_COMP_MspDeInit; /* Legacy weak MspDeInit */
|
||||
}
|
||||
|
||||
/* DeInit the low level hardware: SYSCFG, GPIO, CLOCK and NVIC */
|
||||
hcomp->MspDeInitCallback(hcomp);
|
||||
#else
|
||||
/* DeInit the low level hardware: SYSCFG, GPIO, CLOCK and NVIC */
|
||||
HAL_COMP_MspDeInit(hcomp);
|
||||
#endif /* USE_HAL_COMP_REGISTER_CALLBACKS */
|
||||
|
||||
hcomp->State = HAL_COMP_STATE_RESET;
|
||||
|
||||
|
@ -424,6 +491,166 @@ __weak void HAL_COMP_MspDeInit(COMP_HandleTypeDef *hcomp)
|
|||
*/
|
||||
}
|
||||
|
||||
#if (USE_HAL_COMP_REGISTER_CALLBACKS == 1)
|
||||
/**
|
||||
* @brief Register a User COMP Callback
|
||||
* To be used instead of the weak predefined callback
|
||||
* @param hcomp Pointer to a COMP_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified COMP.
|
||||
* @param CallbackID ID of the callback to be registered
|
||||
* This parameter can be one of the following values:
|
||||
* @arg @ref HAL_COMP_TRIGGER_CB_ID Trigger callback ID
|
||||
* @arg @ref HAL_COMP_MSPINIT_CB_ID MspInit callback ID
|
||||
* @arg @ref HAL_COMP_MSPDEINIT_CB_ID MspDeInit callback ID
|
||||
* @param pCallback pointer to the Callback function
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_COMP_RegisterCallback(COMP_HandleTypeDef *hcomp, HAL_COMP_CallbackIDTypeDef CallbackID, pCOMP_CallbackTypeDef pCallback)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
if (pCallback == NULL)
|
||||
{
|
||||
/* Update the error code */
|
||||
hcomp->ErrorCode |= HAL_COMP_ERROR_INVALID_CALLBACK;
|
||||
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
if (HAL_COMP_STATE_READY == hcomp->State)
|
||||
{
|
||||
switch (CallbackID)
|
||||
{
|
||||
case HAL_COMP_TRIGGER_CB_ID :
|
||||
hcomp->TriggerCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_COMP_MSPINIT_CB_ID :
|
||||
hcomp->MspInitCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_COMP_MSPDEINIT_CB_ID :
|
||||
hcomp->MspDeInitCallback = pCallback;
|
||||
break;
|
||||
|
||||
default :
|
||||
/* Update the error code */
|
||||
hcomp->ErrorCode |= HAL_COMP_ERROR_INVALID_CALLBACK;
|
||||
|
||||
/* Return error status */
|
||||
status = HAL_ERROR;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else if (HAL_COMP_STATE_RESET == hcomp->State)
|
||||
{
|
||||
switch (CallbackID)
|
||||
{
|
||||
case HAL_COMP_MSPINIT_CB_ID :
|
||||
hcomp->MspInitCallback = pCallback;
|
||||
break;
|
||||
|
||||
case HAL_COMP_MSPDEINIT_CB_ID :
|
||||
hcomp->MspDeInitCallback = pCallback;
|
||||
break;
|
||||
|
||||
default :
|
||||
/* Update the error code */
|
||||
hcomp->ErrorCode |= HAL_COMP_ERROR_INVALID_CALLBACK;
|
||||
|
||||
/* Return error status */
|
||||
status = HAL_ERROR;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Update the error code */
|
||||
hcomp->ErrorCode |= HAL_COMP_ERROR_INVALID_CALLBACK;
|
||||
|
||||
/* Return error status */
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Unregister a COMP Callback
|
||||
* COMP callback is redirected to the weak predefined callback
|
||||
* @param hcomp Pointer to a COMP_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified COMP.
|
||||
* @param CallbackID ID of the callback to be unregistered
|
||||
* This parameter can be one of the following values:
|
||||
* @arg @ref HAL_COMP_TRIGGER_CB_ID Trigger callback ID
|
||||
* @arg @ref HAL_COMP_MSPINIT_CB_ID MspInit callback ID
|
||||
* @arg @ref HAL_COMP_MSPDEINIT_CB_ID MspDeInit callback ID
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_COMP_UnRegisterCallback(COMP_HandleTypeDef *hcomp, HAL_COMP_CallbackIDTypeDef CallbackID)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
if (HAL_COMP_STATE_READY == hcomp->State)
|
||||
{
|
||||
switch (CallbackID)
|
||||
{
|
||||
case HAL_COMP_TRIGGER_CB_ID :
|
||||
hcomp->TriggerCallback = HAL_COMP_TriggerCallback; /* Legacy weak callback */
|
||||
break;
|
||||
|
||||
case HAL_COMP_MSPINIT_CB_ID :
|
||||
hcomp->MspInitCallback = HAL_COMP_MspInit; /* Legacy weak MspInit */
|
||||
break;
|
||||
|
||||
case HAL_COMP_MSPDEINIT_CB_ID :
|
||||
hcomp->MspDeInitCallback = HAL_COMP_MspDeInit; /* Legacy weak MspDeInit */
|
||||
break;
|
||||
|
||||
default :
|
||||
/* Update the error code */
|
||||
hcomp->ErrorCode |= HAL_COMP_ERROR_INVALID_CALLBACK;
|
||||
|
||||
/* Return error status */
|
||||
status = HAL_ERROR;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else if (HAL_COMP_STATE_RESET == hcomp->State)
|
||||
{
|
||||
switch (CallbackID)
|
||||
{
|
||||
case HAL_COMP_MSPINIT_CB_ID :
|
||||
hcomp->MspInitCallback = HAL_COMP_MspInit; /* Legacy weak MspInit */
|
||||
break;
|
||||
|
||||
case HAL_COMP_MSPDEINIT_CB_ID :
|
||||
hcomp->MspDeInitCallback = HAL_COMP_MspDeInit; /* Legacy weak MspDeInit */
|
||||
break;
|
||||
|
||||
default :
|
||||
/* Update the error code */
|
||||
hcomp->ErrorCode |= HAL_COMP_ERROR_INVALID_CALLBACK;
|
||||
|
||||
/* Return error status */
|
||||
status = HAL_ERROR;
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Update the error code */
|
||||
hcomp->ErrorCode |= HAL_COMP_ERROR_INVALID_CALLBACK;
|
||||
|
||||
/* Return error status */
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
#endif /* USE_HAL_COMP_REGISTER_CALLBACKS */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -657,13 +884,17 @@ void HAL_COMP_IRQHandler(COMP_HandleTypeDef *hcomp)
|
|||
/* Clear COMP EXTI pending bit */
|
||||
COMP_EXTI_CLEAR_FLAG(extiline);
|
||||
|
||||
/* COMP trigger user callback */
|
||||
/* COMP trigger callback */
|
||||
#if (USE_HAL_COMP_REGISTER_CALLBACKS == 1)
|
||||
hcomp->TriggerCallback(hcomp);
|
||||
#else
|
||||
HAL_COMP_TriggerCallback(hcomp);
|
||||
#endif /* USE_HAL_COMP_REGISTER_CALLBACKS */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Comparator callback.
|
||||
* @brief Comparator trigger callback.
|
||||
* @param hcomp COMP handle
|
||||
* @retval None
|
||||
*/
|
||||
|
@ -812,6 +1043,20 @@ HAL_COMP_StateTypeDef HAL_COMP_GetState(COMP_HandleTypeDef *hcomp)
|
|||
/* Return COMP handle state */
|
||||
return hcomp->State;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return the COMP error code.
|
||||
* @param hcomp COMP handle
|
||||
* @retval COMP error code
|
||||
*/
|
||||
uint32_t HAL_COMP_GetError(COMP_HandleTypeDef *hcomp)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance));
|
||||
|
||||
return hcomp->ErrorCode;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
|
|
@ -69,29 +69,13 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show More
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Reference in New Issue