hal_openisa/vega_sdk_riscv
Ryan McClelland eabd530a64 fix-double-promotion in fsl_xcvr_trim
Double promotion warnings are generated with the flag -Wdouble-promotion

Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2023-10-10 21:18:56 +03:00
..
RISCV ext: hal: add openisa/vega_sdk_riscv 2019-01-25 11:59:46 -05:00
devices/RV32M1 vega_sdk_riscv: Ignore GCC warning about potential uninitialized variable 2023-04-18 23:40:37 +09:00
middleware fix-double-promotion in fsl_xcvr_trim 2023-10-10 21:18:56 +03:00
CMakeLists.txt hal: openisa: add files/config to enable vega radio config 2019-11-06 09:23:49 -06:00
README soc: riscv32: add RV32M1 SoC as openisa_rv32m1 2019-01-25 11:59:46 -05:00

README

VEGA SDK
########

Origin:
   OpenISA RV32M1 SDK for RISC-V
   https://github.com/open-isa-rv32m1/rv32m1_sdk_riscv

Status:
   This includes portions of the initial release of the RV32M1 SDK for
   the RISC-V cores.

Purpose:
   Provides device header files and bare metal peripheral drivers for
   the RV32M1 SoC. Zephyr shim drivers are built on top of these imported
   drivers to adapt the RV32M1 SDK APIs to Zephyr APIs.

Description:
   This package is an extract from the upstream RV32M1 SDK that contains
   only the files needed for Zephyr.

Dependencies:
   None

URL:
   https://github.com/open-isa-rv32m1/rv32m1_sdk_riscv

commit:
   365b1060f0947d5250c07b3eebdbc9e54cd0246e

Maintained-by:
   External

License:
   BSD-3-Clause

License Link:
   https://spdx.org/licenses/BSD-3-Clause.html

Patch List:
   No changes were made to any imported source files.
   Additional Zephyr-specific build system files were added (Kconfig files,
   CMakeLists.txt, etc.)