104 lines
4.0 KiB
CMake
104 lines
4.0 KiB
CMake
# Copyright 2022-2024 NXP
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# Set the SoC specific drivers and configuration to build
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if(HWMv2)
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set(SOC_BASE ${CONFIG_SOC})
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else()
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if(${CONFIG_SOC} STREQUAL "s32z27")
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set(SOC_BASE "s32z270")
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else()
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set(SOC_BASE ${CONFIG_SOC})
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endif()
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endif()
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add_subdirectory(drivers/${SOC_SERIES})
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add_subdirectory(soc/${SOC_BASE})
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if(CONFIG_HAS_MCUX)
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# This is an adaptation from hal_nxp/mcux/CMakeLists.txt entry CMake in order
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# to build MCUX drivers together with RTD drivers for NXP S32 devices.
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# MCUX don't have official support for NXP S32 devices but we are leveraging
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# the existing shim drivers in Zephyr for those hardware blocks which are
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# present in both NXP S32 and non NXP S32 devices.
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#
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# Glue code must be added for each device supported to build with MCUX. This
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# can be found in hal_nxp/s32/mcux/devices:
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# - s32/mcux/devices/${MCUX_DEVICE}/${MCUX_DEVICE}_device.h
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# redefine RTD module's peripheral access layers and its register masks to be
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# compatible with MCUX drivers for incompatible peripherals
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# - s32/mcux/devices/${MCUX_DEVICE}/${MCUX_DEVICE}_features.h
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# define SoC module's features
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# - s32/mcux/devices/${MCUX_DEVICE}/${MCUX_DEVICE}_glue_mcux.h
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# redefine RTD module's base addresses/pointers/interrupts to be compatible
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# with MCUX drivers
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# - s32/mcux/devices/${MCUX_DEVICE}/fsl_device_registers.h
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# expose device features to the MCUX drivers
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# - s32/mcux/devices/${MCUX_DEVICE}/drivers/fsl_clock.h
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# required by mcux/mcux-sdk/drivers/common/fsl_common_arm.h (at least)
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# - s32/mcux/devices/${MCUX_DEVICE}/drivers/driver_reset.cmake
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# required by mcux/mcux-sdk/drivers/common/drivers_common.cmake
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# - s32/mcux/devices/${MCUX_DEVICE}/device_system.cmake
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# required by mcux/hal_nxp.cmake
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# - s32/mcux/devices/${MCUX_DEVICE}/device_CMSIS.cmake
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# required by mcux/mcux-sdk/drivers/common/drivers_common.cmake for non DSP
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# architectures
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function(include_mcux_driver_ifdef feature_toggle directory module)
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if(${${feature_toggle}})
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list(APPEND CMAKE_MODULE_PATH
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${CMAKE_CURRENT_LIST_DIR}/../mcux/mcux-sdk/drivers/${directory}
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)
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zephyr_include_directories(${CMAKE_CURRENT_LIST_DIR}/../mcux/mcux-sdk/drivers/${directory})
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include(${module})
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endif()
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endfunction()
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set(MCUX_SDK_PROJECT_NAME ${ZEPHYR_CURRENT_LIBRARY})
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# Translate the SoC name into the MCUX device
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string(TOUPPER ${SOC_BASE} MCUX_DEVICE)
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# This is normally done in mcux/hal_nxp.cmake, but we need to point to the
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# path on this directory instead
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list(APPEND CMAKE_MODULE_PATH
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${CMAKE_CURRENT_LIST_DIR}/mcux/devices/${MCUX_DEVICE}
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${CMAKE_CURRENT_LIST_DIR}/mcux/devices/${MCUX_DEVICE}/drivers
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)
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# MCUX uses the CPU name to expose SoC-specific features of a given peripheral
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zephyr_compile_definitions(CPU_${MCUX_DEVICE})
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# Clock control is supported through RTD, so disable it in the MCUX drivers
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zephyr_compile_definitions(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL=1)
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zephyr_include_directories(mcux/devices/${MCUX_DEVICE})
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zephyr_include_directories(mcux/devices/${MCUX_DEVICE}/drivers)
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zephyr_linker_sources(RWDATA
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${CMAKE_CURRENT_LIST_DIR}/../mcux/quick_access_data.ld
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)
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zephyr_linker_sources_ifdef(CONFIG_ARCH_HAS_RAMFUNC_SUPPORT
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RAMFUNC_SECTION
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${CMAKE_CURRENT_LIST_DIR}/../mcux/quick_access_code.ld
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)
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zephyr_linker_sources_ifdef(CONFIG_NOCACHE_MEMORY
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NOCACHE_SECTION
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${CMAKE_CURRENT_LIST_DIR}/../mcux/nocache.ld
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)
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# Entry CMake component for MCUX
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include(${CMAKE_CURRENT_LIST_DIR}/../mcux/hal_nxp.cmake)
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if(${MCUX_DEVICE} MATCHES "S32K1")
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zephyr_include_directories(${CMAKE_CURRENT_LIST_DIR}/../mcux/mcux-sdk/drivers/port)
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include_mcux_driver_ifdef(CONFIG_PINCTRL port driver_port)
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zephyr_include_directories(${CMAKE_CURRENT_LIST_DIR}/../mcux/mcux-sdk/drivers/sysmpu)
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include_mcux_driver_ifdef(CONFIG_ARM_MPU sysmpu driver_sysmpu)
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include_mcux_driver_ifdef(CONFIG_HAS_MCUX_CACHE cache/lmem driver_cache_lmem)
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endif()
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endif()
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