29 lines
719 B
C
29 lines
719 B
C
/*
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* Copyright (c) 2022, NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/*
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* This file is handcoded based on what pin configurations are actually
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* used by boards in Zephyr. At this time that is only the Hexiwear KW40Z.
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*/
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#ifndef _ZEPHYR_DTS_BINDING_MKW40Z160VHT4_
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#define _ZEPHYR_DTS_BINDING_MKW40Z160VHT4_
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#define KINETIS_MUX(port, pin, mux) \
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(((((port) - 'A') & 0xF) << 28) | \
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(((pin) & 0x3F) << 22) | \
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(((mux) & 0x7) << 8))
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#define ADC0_SE1_PTB1 KINETIS_MUX('B', 1, 0)
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#define GPIOB_PTB1 KINETIS_MUX('B', 1, 0)
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#define GPIOC_PTC6 KINETIS_MUX('C', 6, 1)
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#define UART0_RX_PTC6 KINETIS_MUX('C', 6, 4)
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#define GPIOC_PTC7 KINETIS_MUX('C', 7, 1)
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#define UART0_TX_PTC7 KINETIS_MUX('C', 7, 4)
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#endif
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