146 lines
7.0 KiB
C
146 lines
7.0 KiB
C
/*
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* NOTE: Autogenerated file by kinetis_signal2dts.py
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* for MKW24D512VHA5/signal_configuration.xml
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*
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* Copyright (c) 2022, NXP
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef _ZEPHYR_DTS_BINDING_MKW24D512VHA5_
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#define _ZEPHYR_DTS_BINDING_MKW24D512VHA5_
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#define KINETIS_MUX(port, pin, mux) \
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(((((port) - 'A') & 0xF) << 28) | \
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(((pin) & 0x3F) << 22) | \
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(((mux) & 0x7) << 8))
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#define PTA0 KINETIS_MUX('A',0,1) /* PTA0 */
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#define UART0_COL_b_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
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#define UART0_CTS_b_PTA0 KINETIS_MUX('A',0,2) /* PTA0 */
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#define FTM0_CH5_PTA0 KINETIS_MUX('A',0,3) /* PTA0 */
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#define JTAG_TCLK_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
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#define SWD_CLK_PTA0 KINETIS_MUX('A',0,7) /* PTA0 */
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#define PTA1 KINETIS_MUX('A',1,1) /* PTA1 */
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#define UART0_RX_PTA1 KINETIS_MUX('A',1,2) /* PTA1 */
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#define FTM0_CH6_PTA1 KINETIS_MUX('A',1,3) /* PTA1 */
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#define JTAG_TDI_PTA1 KINETIS_MUX('A',1,7) /* PTA1 */
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#define PTA2 KINETIS_MUX('A',2,1) /* PTA2 */
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#define UART0_TX_PTA2 KINETIS_MUX('A',2,2) /* PTA2 */
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#define FTM0_CH7_PTA2 KINETIS_MUX('A',2,3) /* PTA2 */
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#define JTAG_TDO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
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#define TRACE_SWO_PTA2 KINETIS_MUX('A',2,7) /* PTA2 */
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#define PTA3 KINETIS_MUX('A',3,1) /* PTA3 */
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#define UART0_RTS_b_PTA3 KINETIS_MUX('A',3,2) /* PTA3 */
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#define FTM0_CH0_PTA3 KINETIS_MUX('A',3,3) /* PTA3 */
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#define SWD_DIO_PTA3 KINETIS_MUX('A',3,7) /* PTA3 */
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#define JTAG_TMS_PTA3 KINETIS_MUX('A',3,7) /* PTA3 */
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#define LLWU_P3_PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
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#define PTA4 KINETIS_MUX('A',4,1) /* PTA4 */
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#define FTM0_CH1_PTA4 KINETIS_MUX('A',4,3) /* PTA4 */
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#define NMI_b_PTA4 KINETIS_MUX('A',4,7) /* PTA4 */
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#define EXTAL0_PTA18 KINETIS_MUX('A',18,0) /* PTA18 */
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#define PTA18 KINETIS_MUX('A',18,1) /* PTA18 */
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#define FTM0_FLT2_PTA18 KINETIS_MUX('A',18,3) /* PTA18 */
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#define FTM_CLKIN0_PTA18 KINETIS_MUX('A',18,4) /* PTA18 */
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#define XTAL0_PTA19 KINETIS_MUX('A',19,0) /* PTA19 */
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#define PTA19 KINETIS_MUX('A',19,1) /* PTA19 */
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#define FTM1_FLT0_PTA19 KINETIS_MUX('A',19,3) /* PTA19 */
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#define FTM_CLKIN1_PTA19 KINETIS_MUX('A',19,4) /* PTA19 */
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#define LPTMR0_ALT1_PTA19 KINETIS_MUX('A',19,6) /* PTA19 */
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#define LLWU_P8_PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
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#define PTC4 KINETIS_MUX('C',4,1) /* PTC4 */
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#define SPI0_PCS0_PTC4 KINETIS_MUX('C',4,2) /* PTC4 */
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#define UART1_TX_PTC4 KINETIS_MUX('C',4,3) /* PTC4 */
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#define FTM0_CH3_PTC4 KINETIS_MUX('C',4,4) /* PTC4 */
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#define CMP1_OUT_PTC4 KINETIS_MUX('C',4,6) /* PTC4 */
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#define LLWU_P9_PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
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#define PTC5 KINETIS_MUX('C',5,1) /* PTC5 */
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#define SPI0_SCK_PTC5 KINETIS_MUX('C',5,2) /* PTC5 */
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#define LPTMR0_ALT2_PTC5 KINETIS_MUX('C',5,3) /* PTC5 */
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#define I2S0_RXD0_PTC5 KINETIS_MUX('C',5,4) /* PTC5 */
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#define CMP0_OUT_PTC5 KINETIS_MUX('C',5,6) /* PTC5 */
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#define CMP0_IN0_PTC6 KINETIS_MUX('C',6,0) /* PTC6 */
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#define PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
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#define LLWU_P10_PTC6 KINETIS_MUX('C',6,1) /* PTC6 */
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#define SPI0_SOUT_PTC6 KINETIS_MUX('C',6,2) /* PTC6 */
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#define PDB0_EXTRG_PTC6 KINETIS_MUX('C',6,3) /* PTC6 */
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#define I2S0_RX_BCLK_PTC6 KINETIS_MUX('C',6,4) /* PTC6 */
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#define I2S0_MCLK_PTC6 KINETIS_MUX('C',6,6) /* PTC6 */
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#define CMP0_IN1_PTC7 KINETIS_MUX('C',7,0) /* PTC7 */
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#define PTC7 KINETIS_MUX('C',7,1) /* PTC7 */
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#define SPI0_SIN_PTC7 KINETIS_MUX('C',7,2) /* PTC7 */
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#define USB_SOF_OUT_PTC7 KINETIS_MUX('C',7,3) /* PTC7 */
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#define I2S0_RX_FS_PTC7 KINETIS_MUX('C',7,4) /* PTC7 */
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#define ADC0_SE5b_PTD1 KINETIS_MUX('D',1,0) /* PTD1 */
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#define PTD1 KINETIS_MUX('D',1,1) /* PTD1 */
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#define SPI0_SCK_PTD1 KINETIS_MUX('D',1,2) /* PTD1 */
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#define UART2_CTS_b_PTD1 KINETIS_MUX('D',1,3) /* PTD1 */
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#define LLWU_P13_PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
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#define PTD2 KINETIS_MUX('D',2,1) /* PTD2 */
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#define SPI0_SOUT_PTD2 KINETIS_MUX('D',2,2) /* PTD2 */
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#define UART2_RX_PTD2 KINETIS_MUX('D',2,3) /* PTD2 */
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#define I2C0_SCL_PTD2 KINETIS_MUX('D',2,4) /* PTD2 */
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#define PTD3 KINETIS_MUX('D',3,1) /* PTD3 */
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#define SPI0_SIN_PTD3 KINETIS_MUX('D',3,2) /* PTD3 */
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#define UART2_TX_PTD3 KINETIS_MUX('D',3,3) /* PTD3 */
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#define I2C0_SDA_PTD3 KINETIS_MUX('D',3,4) /* PTD3 */
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#define ADC0_SE21_PTD4 KINETIS_MUX('D',4,0) /* PTD4 */
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#define LLWU_P14_PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
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#define PTD4 KINETIS_MUX('D',4,1) /* PTD4 */
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#define SPI0_PCS1_PTD4 KINETIS_MUX('D',4,2) /* PTD4 */
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#define UART0_RTS_b_PTD4 KINETIS_MUX('D',4,3) /* PTD4 */
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#define FTM0_CH4_PTD4 KINETIS_MUX('D',4,4) /* PTD4 */
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#define EWM_IN_PTD4 KINETIS_MUX('D',4,6) /* PTD4 */
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#define ADC0_SE6b_PTD5 KINETIS_MUX('D',5,0) /* PTD5 */
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#define PTD5 KINETIS_MUX('D',5,1) /* PTD5 */
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#define SPI0_PCS2_PTD5 KINETIS_MUX('D',5,2) /* PTD5 */
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#define UART0_CTS_b_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
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#define UART0_COL_b_PTD5 KINETIS_MUX('D',5,3) /* PTD5 */
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#define FTM0_CH5_PTD5 KINETIS_MUX('D',5,4) /* PTD5 */
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#define EWM_OUT_b_PTD5 KINETIS_MUX('D',5,6) /* PTD5 */
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#define ADC0_SE7b_PTD6 KINETIS_MUX('D',6,0) /* PTD6 */
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#define LLWU_P15_PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
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#define PTD6 KINETIS_MUX('D',6,1) /* PTD6 */
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#define SPI0_PCS3_PTD6 KINETIS_MUX('D',6,2) /* PTD6 */
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#define UART0_RX_PTD6 KINETIS_MUX('D',6,3) /* PTD6 */
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#define FTM0_CH6_PTD6 KINETIS_MUX('D',6,4) /* PTD6 */
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#define FTM0_FLT0_PTD6 KINETIS_MUX('D',6,6) /* PTD6 */
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#define ADC0_SE22_PTD7 KINETIS_MUX('D',7,0) /* PTD7 */
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#define PTD7 KINETIS_MUX('D',7,1) /* PTD7 */
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#define CMT_IRO_PTD7 KINETIS_MUX('D',7,2) /* PTD7 */
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#define UART0_TX_PTD7 KINETIS_MUX('D',7,3) /* PTD7 */
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#define FTM0_CH7_PTD7 KINETIS_MUX('D',7,4) /* PTD7 */
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#define FTM0_FLT1_PTD7 KINETIS_MUX('D',7,6) /* PTD7 */
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#define ADC0_SE10_PTE0 KINETIS_MUX('E',0,0) /* PTE0 */
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#define PTE0 KINETIS_MUX('E',0,1) /* PTE0 */
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#define SPI1_PCS1_PTE0 KINETIS_MUX('E',0,2) /* PTE0 */
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#define UART1_TX_PTE0 KINETIS_MUX('E',0,3) /* PTE0 */
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#define TRACE_CLKOUT_PTE0 KINETIS_MUX('E',0,5) /* PTE0 */
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#define I2C1_SDA_PTE0 KINETIS_MUX('E',0,6) /* PTE0 */
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#define RTC_CLKOUT_PTE0 KINETIS_MUX('E',0,7) /* PTE0 */
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#define ADC0_SE11_PTE1 KINETIS_MUX('E',1,0) /* PTE1 */
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#define LLWU_P0_PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
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#define PTE1 KINETIS_MUX('E',1,1) /* PTE1 */
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#define SPI1_SOUT_PTE1 KINETIS_MUX('E',1,2) /* PTE1 */
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#define UART1_RX_PTE1 KINETIS_MUX('E',1,3) /* PTE1 */
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#define TRACE_D3_PTE1 KINETIS_MUX('E',1,5) /* PTE1 */
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#define I2C1_SCL_PTE1 KINETIS_MUX('E',1,6) /* PTE1 */
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#define SPI1_SIN_PTE1 KINETIS_MUX('E',1,7) /* PTE1 */
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#define ADC0_DP1_PTE2 KINETIS_MUX('E',2,0) /* PTE2 */
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#define LLWU_P1_PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
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#define PTE2 KINETIS_MUX('E',2,1) /* PTE2 */
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#define SPI1_SCK_PTE2 KINETIS_MUX('E',2,2) /* PTE2 */
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#define UART1_CTS_b_PTE2 KINETIS_MUX('E',2,3) /* PTE2 */
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#define TRACE_D2_PTE2 KINETIS_MUX('E',2,5) /* PTE2 */
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#define ADC0_DM1_PTE3 KINETIS_MUX('E',3,0) /* PTE3 */
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#define PTE3 KINETIS_MUX('E',3,1) /* PTE3 */
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#define SPI1_SIN_PTE3 KINETIS_MUX('E',3,2) /* PTE3 */
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#define UART1_RTS_b_PTE3 KINETIS_MUX('E',3,3) /* PTE3 */
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#define TRACE_D1_PTE3 KINETIS_MUX('E',3,5) /* PTE3 */
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#define SPI1_SOUT_PTE3 KINETIS_MUX('E',3,7) /* PTE3 */
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#define LLWU_P2_PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
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#define PTE4 KINETIS_MUX('E',4,1) /* PTE4 */
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#define SPI1_PCS0_PTE4 KINETIS_MUX('E',4,2) /* PTE4 */
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#define TRACE_D0_PTE4 KINETIS_MUX('E',4,5) /* PTE4 */
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#endif
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