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nrfx: Update to version 3.4.0 

Update nrfx to the recently released version. See
https://github.com/NordicSemiconductor/nrfx/blob/v3.4.0/CHANGELOG.md
for a list of changes that this version introduces.

Origin: nrfx
License: BSD 3-Clause
URL: https://github.com/NordicSemiconductor/nrfx/tree/v3.4.0
commit: 7c47cc0a56ce44658e6da2458e86cd8783ccc4a2
Purpose: Provide peripheral drivers for Nordic SoCs
Maintained-by: External
This commit is contained in:
Nikodem Kastelik 2024-03-08 09:14:45 +01:00 committed by Andrzej Głąbek
parent 5470822384
commit 13ac55b5b5
504 changed files with 1095221 additions and 3809 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
nrfx/CHANGELOG.md
View File

@ -1,6 +1,20 @@
# Changelog
All notable changes to this project are documented in this file.
## [3.4.0] - 2024-03-08
### Added
- Added support for nRF54H20 and nRF54L15.
- Added support for changing the sub-power mode in the POWER driver.
- Added support for sleep configuration in the GRTC driver.
- Added HAL for TDM peripheral.
- Implemented a workaround for the anomaly 159 on the nRF5340 SoC in the QSPI driver.
### Changed
- Updated MDK to version 8.63.2.
### Fixed
- Fixed extended configuration setting in the SPIM driver. Now extended configuration is applied correctly when only a subset of extended features is available.
## [3.3.0] - 2023-12-21
### Added
- Added support for nRF54H20 Eng A and nRF54L15 Eng A.

8
nrfx/README
View File

@ -2,10 +2,10 @@ nrfx
####
Origin:
https://github.com/NordicSemiconductor/nrfx/tree/v3.3.0
https://github.com/NordicSemiconductor/nrfx/tree/v3.4.0
Status:
v3.3.0
v3.4.0
Purpose:
With added proper shims adapting it to Zephyr's APIs, nrfx will provide
@ -32,7 +32,7 @@ URL:
https://github.com/NordicSemiconductor/nrfx
commit:
d0d0a36419d7b43f33c3d1d4df8b5a44e58c60c3
7c47cc0a56ce44658e6da2458e86cd8783ccc4a2
Maintained-by:
External
@ -41,4 +41,4 @@ License:
BSD-3-Clause
License Link:
https://github.com/NordicSemiconductor/nrfx/blob/v3.3.0/LICENSE
https://github.com/NordicSemiconductor/nrfx/blob/v3.4.0/LICENSE

2
nrfx/doc/nrfx.doxyfile
View File

@ -50,7 +50,7 @@ PROJECT_NAME = "nrfx"
### EDIT THIS ###
PROJECT_NUMBER = "3.3"
PROJECT_NUMBER = "3.4"
# Using the PROJECT_BRIEF tag one can provide an optional one line description
# for a project that appears at the top of each page and should give viewer a

2
nrfx/doc/nrfx_api.dox
View File

@ -119,6 +119,8 @@
@defgroup nrf_tbm TBM
@defgroup nrf_tdm TDM
@defgroup nrf_temp TEMP
@defgroup nrf_timer TIMER

6
nrfx/doc/sphinx/drivers/tdm/hal.rst Normal file
View File

@ -0,0 +1,6 @@
TDM HAL
=======
.. doxygengroup:: nrf_tdm_hal
:project: nrfx
:members:

9
nrfx/doc/sphinx/drivers/tdm/index.rst Normal file
View File

@ -0,0 +1,9 @@
TDM
===
.. doxygengroup:: nrf_tdm
.. toctree::
:glob:
*

2
nrfx/drivers/include/nrf_bitmask.h
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2016 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2016 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/include/nrfx_adc.h
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

4
nrfx/drivers/include/nrfx_bellboard.h
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2021 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2021 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -65,7 +65,7 @@ enum {
/** @brief Macro for creating a BELLBOARD driver instance. */
#define NRFX_BELLBOARD_INSTANCE(id) \
{ \
.drv_inst_idx = NRFX_CONCAT_3(NRFX_BELLBOARD, id, _INST_IDX), \
.drv_inst_idx = NRFX_CONCAT(NRFX_BELLBOARD, id, _INST_IDX), \
.int_idx = id, \
}

2
nrfx/drivers/include/nrfx_clock.h
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2016 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2016 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/include/nrfx_comp.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/include/nrfx_dppi.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2018 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2018 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

6
nrfx/drivers/include/nrfx_egu.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2019 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2019 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -67,8 +67,8 @@ enum {
/** @brief Macro for creating an EGU driver instance. */
#define NRFX_EGU_INSTANCE(id) \
{ \
.p_reg = NRFX_CONCAT_2(NRF_EGU, id), \
.drv_inst_idx = NRFX_CONCAT_3(NRFX_EGU, id, _INST_IDX), \
.p_reg = NRFX_CONCAT(NRF_, EGU, id), \
.drv_inst_idx = NRFX_CONCAT(NRFX_EGU, id, _INST_IDX), \
}
/**

2
nrfx/drivers/include/nrfx_gpiote.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

89
nrfx/drivers/include/nrfx_grtc.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2021 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2021 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -57,14 +57,16 @@ extern "C" {
*/
typedef void (*nrfx_grtc_cc_handler_t)(int32_t id, uint64_t cc_value, void * p_context);
#if NRF_GRTC_HAS_RTCOUNTER || defined(__NRFX_DOXYGEN__)
#if NRFY_GRTC_HAS_EXTENDED || defined(__NRFX_DOXYGEN__)
/**
* @brief GRTC driver instance SYSCOUNTER valid handler type.
*
* @param[in] p_context User context.
*/
typedef void (*nrfx_grtc_syscountervalid_handler_t)(void * p_context);
#endif //NRFY_GRTC_HAS_EXTENDED || defined(__NRFX_DOXYGEN__)
#if NRF_GRTC_HAS_RTCOUNTER || defined(__NRFX_DOXYGEN__)
/**
* @brief GRTC driver instance RTCOMPARESYNC handler type.
*
@ -98,6 +100,29 @@ typedef enum
NRFX_GRTC_ACTION_STOP = NRF_GRTC_TASK_STOP, /**< Stop the GRTC. */
NRFX_GRTC_ACTION_CLEAR = NRF_GRTC_TASK_CLEAR, /**< Clear the GRTC. */
} nrfx_grtc_action_t;
/** @brief GRTC SYSCOUNTER sleep configuration structure. */
typedef struct
{
uint32_t timeout; /**< Delay in LFCLK cycles after the condition allowing SYSCOUNTER to go to sleep is met. */
uint32_t waketime; /**< Number of LFCLK cycles to wakeup the SYSCOUNTER before the wake-up event occured. */
bool auto_mode; /**< Enable automatic mode, which keeps the SYSCOUNTER active when any of the local CPUs is active. */
} nrfx_grtc_sleep_config_t;
/**
* @brief GRTC sleep default configuration.
*
* This configuration sets up GRTC with the following options:
* - sleep timeout: 5 LFCLK cycles
* - wake time: 4 LFCLK cycles
* - automatic mode: true
*/
#define NRFX_GRTC_SLEEP_DEFAULT_CONFIG \
{ \
.timeout = 5, \
.waketime = 4, \
.auto_mode = true \
}
#endif // NRFY_GRTC_HAS_EXTENDED || defined(__NRFX_DOXYGEN__)
/** @brief GRTC compare event relative references. */
@ -107,6 +132,28 @@ typedef enum
NRFX_GRTC_CC_RELATIVE_COMPARE = NRF_GRTC_CC_ADD_REFERENCE_CC, /**< The corresponding compare register content will be used as the reference. */
} nrfx_grtc_cc_relative_reference_t;
#if NRFY_GRTC_HAS_EXTENDED || defined(__NRFX_DOXYGEN__)
/**
* @brief Function for configuring the SYSCOUNTER sleep feature.
*
* @param[in] p_sleep_cfg Pointer to the configuration sleep structure.
*
* @retval NRFX_SUCCESS The procedure was successful.
* @retval NRFX_ERROR_NOT_SUPPORTED The sleep feature is not supported.
*/
nrfx_err_t nrfx_grtc_sleep_configure(nrfx_grtc_sleep_config_t const * p_sleep_cfg);
/**
* @brief Function for getting the SYSCOUNTER sleep configuration.
*
* @param[out] p_sleep_cfg Pointer to the structure to be filled with sleep configuration.
*
* @retval NRFX_SUCCESS The procedure was successful.
* @retval NRFX_ERROR_NOT_SUPPORTED The sleep feature is not supported.
*/
nrfx_err_t nrfx_grtc_sleep_configuration_get(nrfx_grtc_sleep_config_t * p_sleep_cfg);
#endif // NRFY_GRTC_HAS_EXTENDED || defined(__NRFX_DOXYGEN__)
/**
* @brief Function for allocating the GRTC capture/compare channel.
*
@ -213,9 +260,11 @@ void nrfx_grtc_rtcounter_cc_int_enable(bool sync);
/** @brief Function for disabling the RTCOUNTER compare interrupt. */
void nrfx_grtc_rtcounter_cc_int_disable(void);
#endif // NRF_GRTC_HAS_RTCOUNTER || defined(__NRFX_DOXYGEN__)
#if NRFY_GRTC_HAS_EXTENDED || defined(__NRFX_DOXYGEN__)
/**
* @brief Function for enabling the SYSCOUNTER valid interrupt.
* @brief Function for enabling the SYSCOUNTERVALID interrupt.
*
* @param[in] handler Handler provided by the user. May be NULL.
* @param[in] p_context User context.
@ -225,9 +274,7 @@ void nrfx_grtc_syscountervalid_int_enable(nrfx_grtc_syscountervalid_handler_t ha
/** @brief Function for disabling the SYSCOUNTERVALID interrupt. */
void nrfx_grtc_syscountervalid_int_disable(void);
#endif // NRF_GRTC_HAS_RTCOUNTER || defined(__NRFX_DOXYGEN__)
#if NRFY_GRTC_HAS_EXTENDED || defined(__NRFX_DOXYGEN__)
/**
* @brief Function for starting the 1 MHz SYSCOUNTER.
*
@ -460,6 +507,16 @@ NRFX_STATIC_INLINE uint32_t nrfx_grtc_event_compare_address_get(uint8_t channel)
*/
NRFX_STATIC_INLINE bool nrfx_grtc_sys_counter_cc_enable_check(uint8_t channel);
/**
* @brief Function for retrieving the state of the compare GRTC event.
*
* @param[in] channel Compare channel of the corresponding event to be checked.
*
* @retval true The event has been generated.
* @retval false The event has not been generated.
*/
NRFX_STATIC_INLINE bool nrfx_grtc_syscounter_compare_event_check(uint8_t channel);
#if NRF_GRTC_HAS_RTCOUNTER || defined(__NRFX_DOXYGEN__)
/**
* @brief Function for reading the GRTC RTCOUNTER value.
@ -467,7 +524,16 @@ NRFX_STATIC_INLINE bool nrfx_grtc_sys_counter_cc_enable_check(uint8_t channel);
* @return RTCOUNTER (32 kHz) value.
*/
NRFX_STATIC_INLINE uint64_t nrfx_grtc_rtcounter_get(void);
#endif
#endif // NRF_GRTC_HAS_RTCOUNTER || defined(__NRFX_DOXYGEN__)
#if NRFY_GRTC_HAS_CLKSEL || defined(__NRFX_DOXYGEN__)
/**
* @brief Function for setting the clock source for the GRTC low-frequency clock.
*
* @param[in] clk_src Selected clock source.
*/
NRFX_STATIC_INLINE void nrfx_grtc_clock_source_set(nrf_grtc_clksel_t clk_src);
#endif // NRFY_GRTC_HAS_CLKSEL
#ifndef NRFX_DECLARE_ONLY
@ -497,6 +563,11 @@ NRFX_STATIC_INLINE bool nrfx_grtc_sys_counter_cc_enable_check(uint8_t channel)
return nrfy_grtc_sys_counter_cc_enable_check(NRF_GRTC, channel);
}
NRFX_STATIC_INLINE bool nrfx_grtc_syscounter_compare_event_check(uint8_t channel)
{
return nrfy_grtc_sys_counter_compare_event_check(NRF_GRTC, channel);
}
#if NRF_GRTC_HAS_RTCOUNTER
NRFX_STATIC_INLINE uint64_t nrfx_grtc_rtcounter_get(void)
{
@ -504,6 +575,12 @@ NRFX_STATIC_INLINE uint64_t nrfx_grtc_rtcounter_get(void)
}
#endif // NRF_GRTC_HAS_RTCOUNTER
#if NRFY_GRTC_HAS_CLKSEL
NRFX_STATIC_INLINE void nrfx_grtc_clock_source_set(nrf_grtc_clksel_t clk_src)
{
nrfy_grtc_clksel_set(NRF_GRTC, clk_src);
}
#endif // NRFY_GRTC_HAS_CLKSEL
#endif // NRFX_DECLARE_ONLY
/** @} */

6
nrfx/drivers/include/nrfx_i2s.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -112,8 +112,8 @@ typedef struct
/** @brief Macro for creating an I2S driver instance. */
#define NRFX_I2S_INSTANCE(id) \
{ \
.p_reg = NRF_I2S##id , \
.drv_inst_idx = NRFX_CONCAT_3(NRFX_I2S, id, _INST_IDX), \
.p_reg = NRFX_CONCAT(NRF_, I2S, id), \
.drv_inst_idx = NRFX_CONCAT(NRFX_I2S, id, _INST_IDX), \
}
#ifndef __NRFX_DOXYGEN__

2
nrfx/drivers/include/nrfx_ipc.h
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2019 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2019 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/include/nrfx_lpcomp.h
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2014 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2014 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/include/nrfx_nfct.h
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2018 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2018 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/include/nrfx_nvmc.h
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2019 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2019 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/include/nrfx_pdm.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

47
nrfx/drivers/include/nrfx_power.h
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2017 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2017 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -79,13 +79,17 @@ extern "C" {
#endif
/**
* @brief Power mode possible configurations
* @brief Sub-power mode possible configurations
*/
typedef enum
{
NRFX_POWER_MODE_CONSTLAT, /**< Constant latency mode */
NRFX_POWER_MODE_LOWPWR /**< Low power mode */
}nrfx_power_mode_t;
#if NRF_POWER_HAS_CONST_LATENCY || defined(__NRFX_DOXYGEN__)
NRFX_POWER_MODE_CONSTLAT, ///< Constant Latency mode.
#endif
#if NRF_POWER_HAS_LOW_POWER || defined(__NRFX_DOXYGEN__)
NRFX_POWER_MODE_LOWPWR ///< Low Power mode.
#endif
} nrfx_power_mode_t;
#if NRF_POWER_HAS_SLEEPEVT || defined(__NRFX_DOXYGEN__)
/**
@ -343,6 +347,39 @@ void nrfx_power_sleepevt_disable(void);
void nrfx_power_sleepevt_uninit(void);
#endif /* NRF_POWER_HAS_SLEEPEVT */
#if (NRF_POWER_HAS_CONST_LATENCY && NRF_POWER_HAS_LOW_POWER) || defined(__NRFX_DOXYGEN__)
/**
* @brief Function for requesting Constant Latency sub-power mode.
*
* @note This function uses a reference counter. As a result, if it is called more than once,
* the function @ref nrfx_power_constlat_mode_free() needs to be called the same number of
* times to change the mode to Low Power.
*
* @retval NRFX_SUCCESS The sub-power mode was successfully changed to Constant Latency.
* @retval NRFX_ERROR_ALREADY Constant Latency mode was already requested and it is the current sub-power mode.
*/
nrfx_err_t nrfx_power_constlat_mode_request(void);
/**
* @brief Function for freeing Constant Latency sub-power mode.
*
* @note This function uses a reference counter. As a result, it needs to be called the same number
* of times as the @ref nrfx_power_constlat_mode_request() function to change the mode back
* to Low Power.
*
* @retval NRFX_SUCCESS The sub-power mode was successfully changed to Low Power.
* @retval NRFX_ERROR_BUSY The sub-power mode was not changed due to multiple calls to @ref nrfx_power_constlat_mode_request.
*/
nrfx_err_t nrfx_power_constlat_mode_free(void);
/**
* @brief Function for getting the current sub-power mode.
*
* @return Current sub-power mode.
*/
nrfx_power_mode_t nrfx_power_mode_get(void);
#endif
#if NRF_POWER_HAS_USBREG || defined(__NRFX_DOXYGEN__)
/**
* @brief Function for initializing the processing of USB power event.

2
nrfx/drivers/include/nrfx_power_clock.h
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/include/nrfx_power_compat.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2019 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2019 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/include/nrfx_ppi.h
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

6
nrfx/drivers/include/nrfx_pwm.h
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -58,8 +58,8 @@ typedef struct
/** @brief Macro for creating a PWM driver instance. */
#define NRFX_PWM_INSTANCE(id) \
{ \
.p_reg = NRFX_CONCAT_2(NRF_PWM, id), \
.instance_id = NRFX_CONCAT_3(NRFX_PWM, id, _INST_IDX), \
.p_reg = NRFX_CONCAT(NRF_, PWM, id), \
.instance_id = NRFX_CONCAT(NRFX_PWM, id, _INST_IDX), \
}
#ifndef __NRFX_DOXYGEN__

6
nrfx/drivers/include/nrfx_qdec.h
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -101,8 +101,8 @@ enum {
/** @brief Macro for creating an instance of the QDEC driver. */
#define NRFX_QDEC_INSTANCE(id) \
{ \
.p_reg = NRF_QDEC##id, \
.drv_inst_idx = NRFX_CONCAT_3(NRFX_QDEC, id, _INST_IDX), \
.p_reg = NRFX_CONCAT(NRF_, QDEC, id), \
.drv_inst_idx = NRFX_CONCAT(NRFX_QDEC, id, _INST_IDX), \
}
/**

65
nrfx/drivers/include/nrfx_qspi.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2016 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -303,6 +303,9 @@ bool nrfx_qspi_init_check(void);
* @retval NRFX_ERROR_TIMEOUT The external memory is busy, or there are connection issues.
* @retval NRFX_ERROR_INVALID_ADDR The provided buffer is not placed in the Data RAM region
* or its address is not aligned to a 32-bit word.
* @retval NRFX_ERROR_FORBIDDEN The operation could trigger nRF5340 anomaly 159
* due to the current configuration of clocks.
* Refer to the errata document for more information.
*/
nrfx_err_t nrfx_qspi_read(void * p_rx_buffer,
size_t rx_buffer_length,
@ -337,6 +340,9 @@ nrfx_err_t nrfx_qspi_read(void * p_rx_buffer,
* @retval NRFX_ERROR_TIMEOUT The external memory is busy, or there are connection issues.
* @retval NRFX_ERROR_INVALID_ADDR The provided buffer is not placed in the Data RAM region
* or its address is not aligned to a 32-bit word.
* @retval NRFX_ERROR_FORBIDDEN The operation could trigger nRF5340 anomaly 159
* due to the current configuration of clocks.
* Refer to the errata document for more information.
*/
nrfx_err_t nrfx_qspi_write(void const * p_tx_buffer,
size_t tx_buffer_length,
@ -367,6 +373,9 @@ nrfx_err_t nrfx_qspi_write(void const * p_tx_buffer,
* @retval NRFX_ERROR_BUSY The driver currently handles another operation.
* @retval NRFX_ERROR_TIMEOUT The external memory is busy, or there are connection issues.
* @retval NRFX_ERROR_INVALID_ADDR The provided start address is not aligned to a 32-bit word.
* @retval NRFX_ERROR_FORBIDDEN The operation could trigger nRF5340 anomaly 159
* due to the current configuration of clocks.
* Refer to the errata document for more information.
*/
nrfx_err_t nrfx_qspi_erase(nrf_qspi_erase_len_t length,
uint32_t start_address);
@ -376,10 +385,13 @@ nrfx_err_t nrfx_qspi_erase(nrf_qspi_erase_len_t length,
*
* @note Refer to the note for @ref nrfx_qspi_read.
*
* @retval NRFX_SUCCESS The operation was successful (blocking mode) or
* commissioned (handler mode).
* @retval NRFX_ERROR_BUSY The driver currently is handling another operation.
* @retval NRFX_ERROR_TIMEOUT The external memory is busy, or there are connection issues.
* @retval NRFX_SUCCESS The operation was successful (blocking mode) or
* commissioned (handler mode).
* @retval NRFX_ERROR_BUSY The driver currently is handling another operation.
* @retval NRFX_ERROR_TIMEOUT The external memory is busy, or there are connection issues.
* @retval NRFX_ERROR_FORBIDDEN The operation could trigger nRF5340 anomaly 159
* due to the current configuration of clocks.
* Refer to the errata document for more information.
*/
nrfx_err_t nrfx_qspi_chip_erase(void);
@ -401,8 +413,11 @@ bool nrfx_qspi_xfer_buffered_check(void);
* @brief Function for getting the current driver status and status byte of memory device with
* testing WIP (write in progress) bit.
*
* @retval NRFX_SUCCESS The driver and memory are ready to handle a new operation.
* @retval NRFX_ERROR_BUSY The driver currently is handling another operation.
* @retval NRFX_SUCCESS The driver and memory are ready to handle a new operation.
* @retval NRFX_ERROR_BUSY The driver currently is handling another operation.
* @retval NRFX_ERROR_FORBIDDEN The operation could trigger nRF5340 anomaly 159
* due to the current configuration of clocks.
* Refer to the errata document for more information.
*/
nrfx_err_t nrfx_qspi_mem_busy_check(void);
@ -435,9 +450,12 @@ void nrfx_qspi_timeout_signal(void);
* @param[in] p_tx_buffer Pointer to the array with data to send. Can be NULL if only opcode is transmitted.
* @param[out] p_rx_buffer Pointer to the array for data to receive. Can be NULL if there is nothing to receive.
*
* @retval NRFX_SUCCESS The operation was successful.
* @retval NRFX_ERROR_TIMEOUT The external memory is busy, or there are connection issues.
* @retval NRFX_ERROR_BUSY The driver currently handles other operation.
* @retval NRFX_SUCCESS The operation was successful.
* @retval NRFX_ERROR_TIMEOUT The external memory is busy, or there are connection issues.
* @retval NRFX_ERROR_BUSY The driver currently handles other operation.
* @retval NRFX_ERROR_FORBIDDEN The operation could trigger nRF5340 anomaly 159
* due to the current configuration of clocks.
* Refer to the errata document for more information.
*/
nrfx_err_t nrfx_qspi_cinstr_xfer(nrf_qspi_cinstr_conf_t const * p_config,
void const * p_tx_buffer,
@ -455,9 +473,12 @@ nrfx_err_t nrfx_qspi_cinstr_xfer(nrf_qspi_cinstr_conf_t const * p_config,
* @param[in] length Length of the data to send and opcode. See @ref nrf_qspi_cinstr_len_t.
* @param[in] p_tx_buffer Pointer to input data array.
*
* @retval NRFX_SUCCESS The operation was successful.
* @retval NRFX_ERROR_BUSY The driver currently handles another operation.
* @retval NRFX_ERROR_TIMEOUT The external memory is busy, or there are connection issues.
* @retval NRFX_SUCCESS The operation was successful.
* @retval NRFX_ERROR_BUSY The driver currently handles another operation.
* @retval NRFX_ERROR_TIMEOUT The external memory is busy, or there are connection issues.
* @retval NRFX_ERROR_FORBIDDEN The operation could trigger nRF5340 anomaly 159
* due to the current configuration of clocks.
* Refer to the errata document for more information.
*/
nrfx_err_t nrfx_qspi_cinstr_quick_send(uint8_t opcode,
nrf_qspi_cinstr_len_t length,
@ -482,9 +503,12 @@ nrfx_err_t nrfx_qspi_cinstr_quick_send(uint8_t opcode,
* @param[in] p_config Pointer to the structure with custom instruction opcode and transfer
* configuration. Transfer length must be set to @ref NRF_QSPI_CINSTR_LEN_1B.
*
* @retval NRFX_SUCCESS Operation was successful.
* @retval NRFX_ERROR_BUSY Driver currently handles other operation.
* @retval NRFX_ERROR_TIMEOUT The external memory is busy, or there are connection issues.
* @retval NRFX_SUCCESS Operation was successful.
* @retval NRFX_ERROR_BUSY Driver currently handles other operation.
* @retval NRFX_ERROR_TIMEOUT The external memory is busy, or there are connection issues.
* @retval NRFX_ERROR_FORBIDDEN The operation could trigger nRF5340 anomaly 159
* due to the current configuration of clocks.
* Refer to the errata document for more information.
*/
nrfx_err_t nrfx_qspi_lfm_start(nrf_qspi_cinstr_conf_t const * p_config);
@ -503,9 +527,12 @@ nrfx_err_t nrfx_qspi_lfm_start(nrf_qspi_cinstr_conf_t const * p_config);
* @param[in] finalize True if custom instruction long frame mode is to be finalized
* after this transfer.
*
* @retval NRFX_SUCCESS Operation was successful.
* @retval NRFX_ERROR_TIMEOUT External memory is busy or there are connection issues.
* Long frame mode becomes deactivated.
* @retval NRFX_SUCCESS Operation was successful.
* @retval NRFX_ERROR_TIMEOUT External memory is busy or there are connection issues.
* Long frame mode becomes deactivated.
* @retval NRFX_ERROR_FORBIDDEN The operation could trigger nRF5340 anomaly 159
* due to the current configuration of clocks.
* Refer to the errata document for more information.
*/
nrfx_err_t nrfx_qspi_lfm_xfer(void const * p_tx_buffer,
void * p_rx_buffer,

2
nrfx/drivers/include/nrfx_rng.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2016 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/include/nrfx_rramc.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2023, Nordic Semiconductor ASA
* Copyright (c) 2023 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

6
nrfx/drivers/include/nrfx_rtc.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2014 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2014 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -73,8 +73,8 @@ typedef struct
/** @brief Macro for creating an RTC driver instance. */
#define NRFX_RTC_INSTANCE(id) \
{ \
.p_reg = NRFX_CONCAT_3(NRF_, RTC, id), \
.instance_id = NRFX_CONCAT_3(NRFX_RTC, id, _INST_IDX), \
.p_reg = NRFX_CONCAT(NRF_, RTC, id), \
.instance_id = NRFX_CONCAT(NRFX_RTC, id, _INST_IDX), \
.cc_channel_count = NRF_RTC_CC_CHANNEL_COUNT(id), \
}

2
nrfx/drivers/include/nrfx_saadc.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

6
nrfx/drivers/include/nrfx_spi.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -67,8 +67,8 @@ enum {
/** @brief Macro for creating an instance of the SPI master driver. */
#define NRFX_SPI_INSTANCE(id) \
{ \
.p_reg = NRFX_CONCAT_2(NRF_SPI, id), \
.drv_inst_idx = NRFX_CONCAT_3(NRFX_SPI, id, _INST_IDX), \
.p_reg = NRFX_CONCAT(NRF_, SPI, id), \
.drv_inst_idx = NRFX_CONCAT(NRFX_SPI, id, _INST_IDX), \
}
/**

13
nrfx/drivers/include/nrfx_spim.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -67,8 +67,8 @@ enum {
/** @brief Macro for creating an instance of the SPIM driver. */
#define NRFX_SPIM_INSTANCE(id) \
{ \
.p_reg = NRFX_CONCAT_2(NRF_SPIM, id), \
.drv_inst_idx = NRFX_CONCAT_3(NRFX_SPIM, id, _INST_IDX), \
.p_reg = NRFX_CONCAT(NRF_, SPIM, id), \
.drv_inst_idx = NRFX_CONCAT(NRFX_SPIM, id, _INST_IDX), \
}
/** @brief Configuration structure of the SPIM driver instance. */
@ -160,8 +160,9 @@ typedef struct
.mode = NRF_SPIM_MODE_0, \
.bit_order = NRF_SPIM_BIT_ORDER_MSB_FIRST, \
.miso_pull = NRF_GPIO_PIN_NOPULL, \
NRFX_COND_CODE_1(NRFX_SPIM_EXTENDED_ENABLED, (.use_hw_ss = false, .ss_duration = 0x02,), ()) \
NRFX_COND_CODE_1(NRFX_SPIM_EXTENDED_ENABLED, (.rx_delay = 0x02,), ()) \
NRFX_COND_CODE_1(NRFX_SPIM_EXTENDED_ENABLED, (.use_hw_ss = false,), ()) \
NRFX_COND_CODE_1(NRFX_SPIM_EXTENDED_ENABLED, (.ss_duration = NRF_SPIM_CSNDUR_DEFAULT,), ()) \
NRFX_COND_CODE_1(NRFX_SPIM_EXTENDED_ENABLED, (.rx_delay = NRF_SPIM_RXDELAY_DEFAULT,), ()) \
NRFX_COND_CODE_1(NRFX_SPIM_EXTENDED_ENABLED, (.dcx_pin = NRF_SPIM_PIN_NOT_CONNECTED,), ()) \
}
@ -275,8 +276,6 @@ typedef void (* nrfx_spim_evt_handler_t)(nrfx_spim_evt_t const * p_event,
* @retval NRFX_ERROR_NOT_SUPPORTED Requested configuration is not supported
* by the SPIM instance.
* @retval NRFX_ERROR_INVALID_PARAM Requested frequency is not available on the specified driver instance or pins.
* @retval NRFX_ERROR_FORBIDDEN Software-controlled Slave Select and hardware-controlled Slave Select
cannot be active at the same time.
*/
nrfx_err_t nrfx_spim_init(nrfx_spim_t const * p_instance,
nrfx_spim_config_t const * p_config,

6
nrfx/drivers/include/nrfx_spis.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -67,8 +67,8 @@ enum {
/** @brief Macro for creating an instance of the SPI slave driver. */
#define NRFX_SPIS_INSTANCE(id) \
{ \
.p_reg = NRFX_CONCAT_2(NRF_SPIS, id), \
.drv_inst_idx = NRFX_CONCAT_3(NRFX_SPIS, id, _INST_IDX), \
.p_reg = NRFX_CONCAT(NRF_, SPIS, id), \
.drv_inst_idx = NRFX_CONCAT(NRFX_SPIS, id, _INST_IDX), \
}
/** @brief SPI slave driver event types. */

2
nrfx/drivers/include/nrfx_systick.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2016 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/include/nrfx_tbm.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2022 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2022 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/include/nrfx_temp.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2019 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2019 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

6
nrfx/drivers/include/nrfx_timer.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -61,8 +61,8 @@ typedef struct
/** @brief Macro for creating a timer driver instance. */
#define NRFX_TIMER_INSTANCE(id) \
{ \
.p_reg = NRFX_CONCAT_2(NRF_TIMER, id), \
.instance_id = NRFX_CONCAT_3(NRFX_TIMER, id, _INST_IDX), \
.p_reg = NRFX_CONCAT(NRF_, TIMER, id), \
.instance_id = NRFX_CONCAT(NRFX_TIMER, id, _INST_IDX), \
.cc_channel_count = NRF_TIMER_CC_CHANNEL_COUNT(id), \
}

6
nrfx/drivers/include/nrfx_twi.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -61,8 +61,8 @@ typedef struct
/** @brief Macro for creating a TWI master driver instance. */
#define NRFX_TWI_INSTANCE(id) \
{ \
.p_twi = NRFX_CONCAT_2(NRF_TWI, id), \
.drv_inst_idx = NRFX_CONCAT_3(NRFX_TWI, id, _INST_IDX), \
.p_twi = NRFX_CONCAT(NRF_, TWI, id), \
.drv_inst_idx = NRFX_CONCAT(NRFX_TWI, id, _INST_IDX), \
}
#ifndef __NRFX_DOXYGEN__

2
nrfx/drivers/include/nrfx_twi_twim.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2019 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2019 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

6
nrfx/drivers/include/nrfx_twim.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -59,8 +59,8 @@ typedef struct
/** @brief Macro for creating a TWIM driver instance. */
#define NRFX_TWIM_INSTANCE(id) \
{ \
.p_twim = NRFX_CONCAT_2(NRF_TWIM, id), \
.drv_inst_idx = NRFX_CONCAT_3(NRFX_TWIM, id, _INST_IDX), \
.p_twim = NRFX_CONCAT(NRF_, TWIM, id), \
.drv_inst_idx = NRFX_CONCAT(NRFX_TWIM, id, _INST_IDX), \
}
#ifndef __NRFX_DOXYGEN__

6
nrfx/drivers/include/nrfx_twis.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -67,8 +67,8 @@ enum {
/** @brief Macro for creating a TWIS driver instance. */
#define NRFX_TWIS_INSTANCE(id) \
{ \
.p_reg = NRFX_CONCAT_2(NRF_TWIS, id), \
.drv_inst_idx = NRFX_CONCAT_3(NRFX_TWIS, id, _INST_IDX), \
.p_reg = NRFX_CONCAT(NRF_, TWIS, id), \
.drv_inst_idx = NRFX_CONCAT(NRFX_TWIS, id, _INST_IDX), \
}
/** @brief Event callback function event definitions. */

6
nrfx/drivers/include/nrfx_uart.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -66,8 +66,8 @@ enum {
/** @brief Macro for creating a UART driver instance. */
#define NRFX_UART_INSTANCE(id) \
{ \
.p_reg = NRFX_CONCAT_2(NRF_UART, id), \
.drv_inst_idx = NRFX_CONCAT_3(NRFX_UART, id, _INST_IDX), \
.p_reg = NRFX_CONCAT(NRF_, UART, id), \
.drv_inst_idx = NRFX_CONCAT(NRFX_UART, id, _INST_IDX), \
}
/** @brief Types of UART driver events. */

6
nrfx/drivers/include/nrfx_uarte.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -66,8 +66,8 @@ enum {
/** @brief Macro for creating a UARTE driver instance. */
#define NRFX_UARTE_INSTANCE(id) \
{ \
.p_reg = NRFX_CONCAT_2(NRF_UARTE, id), \
.drv_inst_idx = NRFX_CONCAT_3(NRFX_UARTE, id, _INST_IDX), \
.p_reg = NRFX_CONCAT(NRF_, UARTE, id), \
.drv_inst_idx = NRFX_CONCAT(NRFX_UARTE, id, _INST_IDX), \
}
/**@defgroup NRFX_UARTE_RX_ENABLE_FLAGS Flags used for @ref nrfx_uarte_rx_enable.

2
nrfx/drivers/include/nrfx_usbd.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2016 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/include/nrfx_usbreg.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2019 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2019 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/include/nrfx_vevif.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2021 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2021 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

6
nrfx/drivers/include/nrfx_wdt.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2014 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2014 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -115,8 +115,8 @@ enum {
/** @brief Macro for creating an instance of the WDT driver. */
#define NRFX_WDT_INSTANCE(id) \
{ \
.p_reg = NRF_WDT##id, \
.drv_inst_idx = NRFX_CONCAT_3(NRFX_WDT, id, _INST_IDX), \
.p_reg = NRFX_CONCAT(NRF_, WDT, id), \
.drv_inst_idx = NRFX_CONCAT(NRFX_WDT, id, _INST_IDX), \
}
/** @brief Structure for WDT initialization. */

2
nrfx/drivers/nrfx_common.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2017 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/nrfx_errors.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2017 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/nrfx_ext.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2022 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2022 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/nrfx_utils.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2022 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2022 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/nrfx_utils_internal.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2022 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2022 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/src/nrfx_adc.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/src/nrfx_bellboard.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2021 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2021 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/src/nrfx_clock.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2016 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/src/nrfx_comp.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/src/nrfx_dppi.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2018 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2018 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/src/nrfx_egu.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2019 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2019 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/src/nrfx_gpiote.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

185
nrfx/drivers/src/nrfx_grtc.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2021 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2021 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -36,6 +36,7 @@
#if NRFX_CHECK(NRFX_GRTC_ENABLED)
#include <nrfx_grtc.h>
#include <soc/nrfx_coredep.h>
#include <helpers/nrfx_flag32_allocator.h>
#define NRFX_LOG_MODULE GRTC
@ -53,11 +54,11 @@
#define GRTC_CHANNEL_MASK_TO_INT_MASK(ch_mask) ((ch_mask) << GRTC_INTEN0_COMPARE0_Pos)
#if !defined(NRFX_GRTC_CONFIG_ALLOWED_CC_CHANNELS_MASK)
#define NRFX_GRTC_CONFIG_ALLOWED_CC_CHANNELS_MASK 0
#error "Channels mask for GRTC must be defined."
#endif
#if !defined(NRFX_GRTC_CONFIG_NUM_OF_CC_CHANNELS)
#define NRFX_GRTC_CONFIG_NUM_OF_CC_CHANNELS 0
#error "Number of channels for GRTC must be defined."
#endif
#if NRF_GRTC_HAS_RTCOUNTER
@ -89,6 +90,9 @@
#define MAIN_GRTC_CC_CHANNEL (m_cb.channel_data[0].channel)
#endif // !(defined(NRF_SECURE) && NRFY_GRTC_HAS_EXTENDED)
/* The maximum SYSCOUNTERVALID settling time equals 1x32k cycles + 20x16MHz cycles. */
#define GRTC_SYSCOUNTERVALID_SETTLE_MAX_TIME_US 33
typedef struct
{
nrfx_drv_state_t state; /**< Driver state. */
@ -98,6 +102,8 @@ typedef struct
#if NRF_GRTC_HAS_RTCOUNTER
nrfx_grtc_rtcomparesync_handler_t rtcomparesync_handler; /**< User handler corresponding to rtcomparesync event.*/
void * rtcomparesync_context; /**< User context for rtcomparesync event handler. */
#endif
#if NRFY_GRTC_HAS_EXTENDED
nrfx_grtc_syscountervalid_handler_t syscountervalid_handler; /**< User handler corresponding to syscountervalid event. */
void * syscountervalid_context; /**< User context for syscountervalid event handler. */
#endif
@ -213,6 +219,59 @@ static void cc_channel_prepare(nrfx_grtc_channel_t * p_chan_data)
channel_used_mark(p_chan_data->channel);
}
#if NRFY_GRTC_HAS_EXTENDED && \
(NRFX_IS_ENABLED(NRFX_GRTC_CONFIG_SLEEP_ALLOWED) || \
NRFX_IS_ENABLED(NRFX_GRTC_CONFIG_AUTOSTART))
static void sleep_configure(nrfx_grtc_sleep_config_t const * p_sleep_cfg)
{
nrfy_grtc_sys_counter_auto_mode_set(NRF_GRTC, p_sleep_cfg->auto_mode);
nrfy_grtc_timeout_set(NRF_GRTC, p_sleep_cfg->timeout);
nrfy_grtc_waketime_set(NRF_GRTC, p_sleep_cfg->waketime);
}
#if NRFX_IS_ENABLED(NRFX_GRTC_CONFIG_SLEEP_ALLOWED)
static void sleep_configuration_get(nrfx_grtc_sleep_config_t * p_sleep_cfg)
{
p_sleep_cfg->auto_mode = nrfy_grtc_sys_counter_auto_mode_check(NRF_GRTC);
p_sleep_cfg->timeout = nrfy_grtc_timeout_get(NRF_GRTC);
p_sleep_cfg->waketime = nrfy_grtc_waketime_get(NRF_GRTC);
}
#endif // NRFX_IS_ENABLED(NRFX_GRTC_CONFIG_SLEEP_ALLOWED)
#endif /* NRFY_GRTC_HAS_EXTENDED &&
(NRFX_IS_ENABLED(NRFX_GRTC_CONFIG_SLEEP_ALLOWED) ||
NRFX_IS_ENABLED(NRFX_GRTC_CONFIG_AUTOSTART)) */
static inline bool is_active(void)
{
#if NRFY_GRTC_HAS_SYSCOUNTER_ARRAY
return nrfy_grtc_sys_counter_active_check(NRF_GRTC);
#else
return nrfy_grtc_sys_counter_active_state_request_check(NRF_GRTC);
#endif
}
static inline void grtc_wakeup(void)
{
#if defined(NRF_GRTC_HAS_SYSCOUNTER_ARRAY) && (NRF_GRTC_HAS_SYSCOUNTER_ARRAY == 1)
nrfy_grtc_sys_counter_active_set(NRF_GRTC, true);
#else
nrfy_grtc_sys_counter_active_state_request_set(NRF_GRTC, true);
nrfx_coredep_delay_us(GRTC_SYSCOUNTERVALID_SETTLE_MAX_TIME_US);
#endif
}
static inline void grtc_sleep(void)
{
if (NRFX_IS_ENABLED(NRFX_GRTC_CONFIG_SLEEP_ALLOWED))
{
#if defined(NRF_GRTC_HAS_SYSCOUNTER_ARRAY) && (NRF_GRTC_HAS_SYSCOUNTER_ARRAY == 1)
nrfy_grtc_sys_counter_active_set(NRF_GRTC, false);
#else
nrfy_grtc_sys_counter_active_state_request_set(NRF_GRTC, false);
#endif
}
}
void nrfx_grtc_active_request_set(bool active)
{
NRFX_ASSERT(m_cb.state == NRFX_DRV_STATE_INITIALIZED);
@ -220,7 +279,14 @@ void nrfx_grtc_active_request_set(bool active)
#if NRFY_GRTC_HAS_SYSCOUNTER_ARRAY
nrfy_grtc_sys_counter_active_set(NRF_GRTC, active);
#else
nrfy_grtc_sys_counter_active_state_request_set(NRF_GRTC, active);
if (active)
{
grtc_wakeup();
}
else
{
nrfy_grtc_sys_counter_active_state_request_set(NRF_GRTC, active);
}
#endif
}
@ -241,25 +307,18 @@ nrfx_err_t nrfx_grtc_syscounter_get(uint64_t * p_counter)
return err_code;
}
#endif // NRFY_GRTC_HAS_EXTENDED
#if NRFY_GRTC_HAS_SYSCOUNTER_ARRAY
if (nrfy_grtc_sys_counter_active_check(NRF_GRTC))
NRFX_CRITICAL_SECTION_ENTER();
if (NRFX_IS_ENABLED(NRFX_GRTC_CONFIG_SLEEP_ALLOWED) && !is_active())
{
while (!nrfy_grtc_sys_conter_ready_check(NRF_GRTC))
{}
grtc_wakeup();
*p_counter = nrfy_grtc_sys_counter_get(NRF_GRTC);
grtc_sleep();
}
else
{
nrfy_grtc_sys_counter_active_set(NRF_GRTC, true);
while (!nrfy_grtc_sys_conter_ready_check(NRF_GRTC))
{}
*p_counter = nrfy_grtc_sys_counter_get(NRF_GRTC);
nrfy_grtc_sys_counter_active_set(NRF_GRTC, false);
}
#else
*p_counter = nrfy_grtc_sys_counter_get(NRF_GRTC);
#endif
NRFX_CRITICAL_SECTION_EXIT();
return err_code;
}
@ -329,6 +388,17 @@ nrfx_err_t nrfx_grtc_init(uint8_t interrupt_priority)
NRFX_LOG_ERROR_STRING_GET(err_code));
return err_code;
}
#if NRFY_GRTC_HAS_EXTENDED && NRFX_IS_ENABLED(NRFX_GRTC_CONFIG_AUTOSTART)
nrfx_grtc_sleep_config_t sleep_cfg = NRFX_GRTC_SLEEP_DEFAULT_CONFIG;
#if !NRFX_IS_ENABLED(NRFX_GRTC_CONFIG_AUTOEN)
sleep_cfg.auto_mode = false;
#endif
nrfy_grtc_sys_counter_set(NRF_GRTC, false);
sleep_configure(&sleep_cfg);
#endif
if ((num_of_channels_get(NRFX_GRTC_CONFIG_ALLOWED_CC_CHANNELS_MASK) !=
NRFX_GRTC_CONFIG_NUM_OF_CC_CHANNELS) || (NRFX_GRTC_CONFIG_NUM_OF_CC_CHANNELS == 0))
{
@ -346,14 +416,43 @@ nrfx_err_t nrfx_grtc_init(uint8_t interrupt_priority)
nrfy_grtc_int_init(NRF_GRTC, GRTC_ALL_INT_MASK, interrupt_priority, false);
#if NRFY_GRTC_HAS_EXTENDED
#if NRFY_GRTC_HAS_EXTENDED && NRFX_IS_ENABLED(NRFX_GRTC_CONFIG_AUTOSTART)
nrfy_grtc_prepare(NRF_GRTC, true);
#endif
if (!NRFX_IS_ENABLED(NRFX_GRTC_CONFIG_SLEEP_ALLOWED))
{
grtc_wakeup();
}
m_cb.state = NRFX_DRV_STATE_INITIALIZED;
NRFX_LOG_INFO("GRTC initialized.");
return err_code;
}
#if NRFY_GRTC_HAS_EXTENDED
nrfx_err_t nrfx_grtc_sleep_configure(nrfx_grtc_sleep_config_t const * p_sleep_cfg)
{
NRFX_ASSERT(p_sleep_cfg);
#if NRFX_IS_ENABLED(NRFX_GRTC_CONFIG_SLEEP_ALLOWED)
sleep_configure(p_sleep_cfg);
return NRFX_SUCCESS;
#else
return NRFX_ERROR_NOT_SUPPORTED;
#endif
}
nrfx_err_t nrfx_grtc_sleep_configuration_get(nrfx_grtc_sleep_config_t * p_sleep_cfg)
{
NRFX_ASSERT(p_sleep_cfg);
#if NRFX_IS_ENABLED(NRFX_GRTC_CONFIG_SLEEP_ALLOWED)
sleep_configuration_get(p_sleep_cfg);
return NRFX_SUCCESS;
#else
return NRFX_ERROR_NOT_SUPPORTED;
#endif
}
#endif // NRFY_GRTC_HAS_EXTENDED
#if NRF_GRTC_HAS_RTCOUNTER
nrfx_err_t nrfx_grtc_rtcounter_cc_disable(void)
{
@ -432,7 +531,9 @@ nrfx_err_t nrfx_grtc_rtcounter_cc_absolute_set(nrfx_grtc_rtcounter_handler_data_
p_chan_data->p_context = p_handler_data->p_context;
p_chan_data->channel = GRTC_RTCOUNTER_COMPARE_CHANNEL;
NRFX_CRITICAL_SECTION_ENTER();
nrfy_grtc_rt_counter_cc_set(NRF_GRTC, val, sync);
NRFX_CRITICAL_SECTION_EXIT();
nrf_grtc_event_t event = NRF_GRTC_EVENT_RTCOMPARE;
@ -515,11 +616,6 @@ void nrfx_grtc_uninit(void)
NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED);
nrfy_grtc_int_disable(NRF_GRTC, GRTC_ALL_INT_MASK);
#if NRFY_GRTC_HAS_EXTENDED
nrfy_grtc_sys_counter_set(NRF_GRTC, false);
nrf_grtc_task_trigger(NRF_GRTC, NRF_GRTC_TASK_STOP);
nrf_grtc_task_trigger(NRF_GRTC, NRF_GRTC_TASK_CLEAR);
#endif // NRFY_GRTC_HAS_EXTENDED
for (uint8_t chan = 0; ch_mask; chan++, ch_mask >>= 1)
{
@ -538,17 +634,19 @@ void nrfx_grtc_uninit(void)
}
nrfy_grtc_int_uninit(NRF_GRTC);
#if NRFY_GRTC_HAS_EXTENDED
nrfy_grtc_sys_counter_auto_mode_set(NRF_GRTC, false);
nrfy_grtc_sys_counter_set(NRF_GRTC, false);
#endif
#if NRFY_GRTC_HAS_SYSCOUNTER_ARRAY
nrfy_grtc_sys_counter_active_set(NRF_GRTC, false);
#else
nrfy_grtc_sys_counter_active_state_request_set(NRF_GRTC, false);
#endif
#if NRFY_GRTC_HAS_EXTENDED && NRFX_IS_ENABLED(NRFX_GRTC_CONFIG_AUTOSTART)
nrfy_grtc_sys_counter_auto_mode_set(NRF_GRTC, false);
nrfy_grtc_sys_counter_set(NRF_GRTC, false);
nrf_grtc_task_trigger(NRF_GRTC, NRF_GRTC_TASK_STOP);
nrf_grtc_task_trigger(NRF_GRTC, NRF_GRTC_TASK_CLEAR);
#endif // NRFY_GRTC_HAS_EXTENDED && NRFX_IS_ENABLED(NRFX_GRTC_CONFIG_AUTOSTART)
m_cb.state = NRFX_DRV_STATE_UNINITIALIZED;
NRFX_LOG_INFO("GRTC uninitialized.");
}
@ -576,7 +674,9 @@ void nrfx_grtc_rtcounter_cc_int_disable(void)
nrfy_grtc_int_disable(NRF_GRTC, NRF_GRTC_INT_RTCOMPARE_MASK | NRF_GRTC_INT_RTCOMPARESYNC_MASK);
NRFX_LOG_INFO("GRTC RTCOMPARE/RTCOMPARESYNC interrupt disabled.");
}
#endif // NRF_GRTC_HAS_RTCOUNTER
#if NRFY_GRTC_HAS_EXTENDED
void nrfx_grtc_syscountervalid_int_enable(nrfx_grtc_syscountervalid_handler_t handler,
void * p_context)
{
@ -595,7 +695,7 @@ void nrfx_grtc_syscountervalid_int_disable(void)
nrfy_grtc_int_disable(NRF_GRTC, NRF_GRTC_INT_SYSCOUNTERVALID_MASK);
NRFX_LOG_INFO("GRTC SYSCOUNTERVALID interrupt disabled.");
}
#endif // NRF_GRTC_HAS_RTCOUNTER
#endif // NRFY_GRTC_HAS_EXTENDED
nrfx_err_t nrfx_grtc_syscounter_cc_disable(uint8_t channel)
{
@ -654,7 +754,9 @@ nrfx_err_t nrfx_grtc_syscounter_cc_absolute_set(nrfx_grtc_channel_t * p_chan_dat
}
cc_channel_prepare(p_chan_data);
NRFX_CRITICAL_SECTION_ENTER();
nrfy_grtc_sys_counter_cc_set(NRF_GRTC, p_chan_data->channel, val);
NRFX_CRITICAL_SECTION_EXIT();
nrfy_grtc_sys_counter_compare_event_int_clear_enable(NRF_GRTC,
p_chan_data->channel,
enable_irq);
@ -682,9 +784,25 @@ nrfx_err_t nrfx_grtc_syscounter_cc_relative_set(nrfx_grtc_channel_t *
}
cc_channel_prepare(p_chan_data);
nrfy_grtc_sys_counter_cc_add_set(NRF_GRTC, p_chan_data->channel,
val,
(nrf_grtc_cc_add_reference_t)reference);
NRFX_CRITICAL_SECTION_ENTER();
if (NRFX_IS_ENABLED(NRFX_GRTC_CONFIG_SLEEP_ALLOWED) && !is_active())
{
grtc_wakeup();
nrfy_grtc_sys_counter_cc_add_set(NRF_GRTC,
p_chan_data->channel,
val,
(nrf_grtc_cc_add_reference_t)reference);
grtc_sleep();
}
else
{
nrfy_grtc_sys_counter_cc_add_set(NRF_GRTC,
p_chan_data->channel,
val,
(nrf_grtc_cc_add_reference_t)reference);
}
NRFX_CRITICAL_SECTION_EXIT();
nrfy_grtc_sys_counter_compare_event_int_clear_enable(NRF_GRTC,
p_chan_data->channel,
enable_irq);
@ -837,7 +955,8 @@ static void grtc_irq_handler(void)
m_cb.rtcomparesync_handler(m_cb.rtcomparesync_context);
}
}
#endif // NRF_GRTC_HAS_RTCOUNTER
#if NRFY_GRTC_HAS_EXTENDED
/* The SYSCOUNTERVALID bit is automatically cleared when GRTC goes into sleep state and set
* when returning from this state. It can't be cleared inside the ISR procedure because we rely
* on it during SYSCOUNTER value reading procedure. */
@ -850,7 +969,7 @@ static void grtc_irq_handler(void)
m_cb.syscountervalid_handler(m_cb.syscountervalid_context);
}
}
#endif // NRF_GRTC_HAS_RTCOUNTER
#endif // NRFY_GRTC_HAS_EXTENDED
}
void nrfx_grtc_irq_handler(void)

2
nrfx/drivers/src/nrfx_i2s.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/src/nrfx_ipc.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2019 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2019 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/src/nrfx_lpcomp.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/src/nrfx_nfct.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2018 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2018 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/src/nrfx_nvmc.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2019 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2019 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/src/nrfx_pdm.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

52
nrfx/drivers/src/nrfx_power.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2017 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -61,6 +61,11 @@ extern void nrfx_clock_irq_handler(void);
* @{
*/
#if (NRF_POWER_HAS_CONST_LATENCY && NRF_POWER_HAS_LOW_POWER)
/** This variable is used as a reference counter of @ref nrfx_power_constlat_mode_request calls. */
static uint8_t m_power_mode_refs = 0;
#endif
/**
* This variable is used to check whether common POWER_CLOCK common interrupt
* should be disabled or not if @ref nrfx_clock tries to disable the interrupt.
@ -267,6 +272,51 @@ void nrfx_power_sleepevt_uninit(void)
}
#endif /* NRF_POWER_HAS_SLEEPEVT */
#if (NRF_POWER_HAS_CONST_LATENCY && NRF_POWER_HAS_LOW_POWER)
nrfx_err_t nrfx_power_constlat_mode_request(void)
{
NRFX_ASSERT(m_power_mode_refs != UINT8_MAX);
nrfx_err_t err_code = NRFX_ERROR_ALREADY;
NRFX_CRITICAL_SECTION_ENTER();
m_power_mode_refs++;
if (m_power_mode_refs == 1)
{
nrf_power_task_trigger(NRF_POWER, NRF_POWER_TASK_CONSTLAT);
err_code = NRFX_SUCCESS;
}
NRFX_CRITICAL_SECTION_EXIT();
return err_code;
}
nrfx_err_t nrfx_power_constlat_mode_free(void)
{
NRFX_ASSERT(m_power_mode_refs != 0);
nrfx_err_t err_code = NRFX_ERROR_BUSY;
NRFX_CRITICAL_SECTION_ENTER();
m_power_mode_refs--;
if (m_power_mode_refs == 0)
{
nrf_power_task_trigger(NRF_POWER, NRF_POWER_TASK_LOWPWR);
err_code = NRFX_SUCCESS;
}
NRFX_CRITICAL_SECTION_EXIT();
return err_code;
}
nrfx_power_mode_t nrfx_power_mode_get(void)
{
return m_power_mode_refs > 0 ? NRFX_POWER_MODE_CONSTLAT : NRFX_POWER_MODE_LOWPWR;
}
#endif
#if NRF_POWER_HAS_USBREG
void nrfx_power_usbevt_init(nrfx_power_usbevt_config_t const * p_config)
{

2
nrfx/drivers/src/nrfx_ppi.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/src/nrfx_pwm.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/src/nrfx_qdec.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

54
nrfx/drivers/src/nrfx_qspi.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2016 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -36,6 +36,7 @@
#if NRFX_CHECK(NRFX_QSPI_ENABLED)
#include <nrfx_qspi.h>
#include <hal/nrf_clock.h>
#include <hal/nrf_gpio.h>
#include <nrf_erratas.h>
@ -115,7 +116,8 @@ static qspi_control_block_t m_cb;
static nrfx_err_t qspi_activate(bool wait);
static nrfx_err_t qspi_ready_wait(void);
static void qspi_workaround_apply(void);
static void qspi_workaround_215_43_apply(void);
static bool qspi_errata_159_conditions_check(void);
static nrfx_err_t qspi_xfer(void * p_buffer,
size_t length,
@ -125,6 +127,11 @@ static nrfx_err_t qspi_xfer(void * p_buffer,
NRFX_ASSERT(m_cb.state != NRFX_QSPI_STATE_UNINITIALIZED);
NRFX_ASSERT(p_buffer != NULL);
if (qspi_errata_159_conditions_check())
{
return NRFX_ERROR_FORBIDDEN;
}
if (!nrfx_is_in_ram(p_buffer) || !nrfx_is_word_aligned(p_buffer))
{
return NRFX_ERROR_INVALID_ADDR;
@ -316,7 +323,7 @@ static nrfx_err_t qspi_configure(nrfx_qspi_config_t const * p_config)
* It will be reenabled if needed before the next QSPI operation.
*/
nrf_qspi_int_disable(NRF_QSPI, NRF_QSPI_INT_READY_MASK);
qspi_workaround_apply();
qspi_workaround_215_43_apply();
}
nrf_qspi_xip_offset_set(NRF_QSPI, p_config->xip_offset);
@ -381,7 +388,22 @@ static void qspi_deactivate(void)
nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY);
}
static void qspi_workaround_apply(void)
static bool qspi_errata_159_conditions_check(void)
{
#if NRF_CLOCK_HAS_HFCLK192M && NRF53_ERRATA_159_ENABLE_WORKAROUND
if ((nrf_clock_hfclk192m_div_get(NRF_CLOCK) != NRF_CLOCK_HFCLK_DIV_1) ||
(nrf_clock_hfclk_div_get(NRF_CLOCK) != NRF_CLOCK_HFCLK_DIV_2))
{
return true;
}
else
#endif
{
return false;
}
}
static void qspi_workaround_215_43_apply(void)
{
nrf_qspi_pins_t pins;
nrf_qspi_pins_t disconnected_pins = {
@ -493,6 +515,11 @@ nrfx_err_t nrfx_qspi_cinstr_xfer(nrf_qspi_cinstr_conf_t const * p_config,
{
NRFX_ASSERT(m_cb.state != NRFX_QSPI_STATE_UNINITIALIZED);
if (qspi_errata_159_conditions_check())
{
return NRFX_ERROR_FORBIDDEN;
}
if (m_cb.state != NRFX_QSPI_STATE_IDLE)
{
return NRFX_ERROR_BUSY;
@ -515,7 +542,7 @@ nrfx_err_t nrfx_qspi_cinstr_xfer(nrf_qspi_cinstr_conf_t const * p_config,
*/
if (NRF52_ERRATA_215_ENABLE_WORKAROUND || NRF53_ERRATA_43_ENABLE_WORKAROUND)
{
qspi_workaround_apply();
qspi_workaround_215_43_apply();
}
/* In some cases, only opcode should be sent. To prevent execution, set function code is
@ -566,6 +593,11 @@ nrfx_err_t nrfx_qspi_lfm_start(nrf_qspi_cinstr_conf_t const * p_config)
NRFX_ASSERT(m_cb.state != NRFX_QSPI_STATE_UNINITIALIZED);
NRFX_ASSERT(p_config->length == NRF_QSPI_CINSTR_LEN_1B);
if (qspi_errata_159_conditions_check())
{
return NRFX_ERROR_FORBIDDEN;
}
if (m_cb.state != NRFX_QSPI_STATE_IDLE)
{
return NRFX_ERROR_BUSY;
@ -588,7 +620,7 @@ nrfx_err_t nrfx_qspi_lfm_start(nrf_qspi_cinstr_conf_t const * p_config)
*/
if (NRF52_ERRATA_215_ENABLE_WORKAROUND || NRF53_ERRATA_43_ENABLE_WORKAROUND)
{
qspi_workaround_apply();
qspi_workaround_215_43_apply();
}
NRFX_ASSERT(!(nrf_qspi_cinstr_long_transfer_is_ongoing(NRF_QSPI)));
@ -617,6 +649,11 @@ nrfx_err_t nrfx_qspi_lfm_xfer(void const * p_tx_buffer,
NRFX_ASSERT(m_cb.state != NRFX_QSPI_STATE_UNINITIALIZED);
NRFX_ASSERT(nrf_qspi_cinstr_long_transfer_is_ongoing(NRF_QSPI));
if (qspi_errata_159_conditions_check())
{
return NRFX_ERROR_FORBIDDEN;
}
nrfx_err_t status = NRFX_SUCCESS;
/* Perform transfers in packets of 8 bytes. Last transfer may be shorter. */
@ -779,6 +816,11 @@ nrfx_err_t nrfx_qspi_erase(nrf_qspi_erase_len_t length,
{
NRFX_ASSERT(m_cb.state != NRFX_QSPI_STATE_UNINITIALIZED);
if (qspi_errata_159_conditions_check())
{
return NRFX_ERROR_FORBIDDEN;
}
if (!nrfx_is_word_aligned((void const *)start_address))
{
return NRFX_ERROR_INVALID_ADDR;

2
nrfx/drivers/src/nrfx_rng.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2016 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/src/nrfx_rramc.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2023, Nordic Semiconductor ASA
* Copyright (c) 2023 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/src/nrfx_rtc.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2014 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2014 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/src/nrfx_saadc.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/src/nrfx_spi.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

62
nrfx/drivers/src/nrfx_spim.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -108,7 +108,10 @@
#define SPIM_MAX_DATARATE_TOKEN32 1
#if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED)
static const uint32_t rxdelay_support_mask =
NRFX_FEATURE_SUPPORTED_MASK(SPIM, FEATURE_RXDELAY_PRESENT);
static const uint32_t dcx_support_mask =
NRFX_FEATURE_SUPPORTED_MASK(SPIM, FEATURE_HARDWARE_DCX_PRESENT) |
NRFX_FEATURE_SUPPORTED_MASK(SPIM, FEATURE_DCX_PRESENT);
static const uint32_t hw_csn_support_mask =
NRFX_FEATURE_SUPPORTED_MASK(SPIM, FEATURE_HARDWARE_CSN_PRESENT);
@ -123,6 +126,8 @@ static const uint8_t easydma_support_bits[] __UNUSED =
(((freq != NRFX_MHZ_TO_HZ(32)) && (freq != NRFX_MHZ_TO_HZ(16))) || \
((NRFX_BIT(drv_inst_idx)) & datarate32_support_mask))
#define SPIM_RXDELAY_PRESENT_VALIDATE(drv_inst_idx) (NRFX_BIT(drv_inst_idx) & rxdelay_support_mask)
#define SPIM_DCX_PRESENT_VALIDATE(drv_inst_idx) (NRFX_BIT(drv_inst_idx) & dcx_support_mask)
#define SPIM_HW_CSN_PRESENT_VALIDATE(drv_inst_idx) (NRFX_BIT(drv_inst_idx) & hw_csn_support_mask)
@ -257,7 +262,9 @@ static void configure_pins(nrfx_spim_t const * p_instance,
nrf_gpio_pin_drive_t pin_drive;
// Configure pin drive - high drive for 32 MHz clock frequency.
#if (NRF_SPIM_HAS_FREQUENCY && NRF_SPIM_HAS_32_MHZ_FREQ) || NRF_SPIM_HAS_PRESCALER
#if defined(LUMOS_XXAA)
pin_drive = NRF_GPIO_PIN_H0H1;
#elif (NRF_SPIM_HAS_FREQUENCY && NRF_SPIM_HAS_32_MHZ_FREQ) || NRF_SPIM_HAS_PRESCALER
pin_drive = (p_config->frequency == NRFX_MHZ_TO_HZ(32)) ? NRF_GPIO_PIN_H0H1 : NRF_GPIO_PIN_S0S1;
#else
pin_drive = NRF_GPIO_PIN_S0S1;
@ -453,9 +460,9 @@ static void spim_configure(nrfx_spim_t const * p_instance,
configure_pins(p_instance, p_config);
#if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED)
bool ext_support = NRFX_BIT(p_instance->drv_inst_idx) & hw_csn_support_mask;
bool hw_csn = p_config->use_hw_ss;
if (ext_support && hw_csn)
bool hw_csn_supported = SPIM_HW_CSN_PRESENT_VALIDATE(p_instance->drv_inst_idx);
bool use_csn = hw_csn_supported && p_config->use_hw_ss;
if (use_csn)
{
p_cb->ss_pin = NRF_SPIM_PIN_NOT_CONNECTED;
}
@ -482,20 +489,45 @@ static void spim_configure(nrfx_spim_t const * p_instance,
#endif
.mode = p_config->mode,
.bit_order = p_config->bit_order,
#if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED)
#if NRFY_SPIM_HAS_EXTENDED
/* Extended config is applied even if only single instance supports it.
For other instances, and also when NRFX_SPIM_EXTENDED_ENABLED is 0,
apply default configuration. */
.ext_config =
{
.pins =
{
.dcx_pin = p_config->dcx_pin,
.csn_pin = p_config->use_hw_ss ? p_config->ss_pin : NRF_SPIM_PIN_NOT_CONNECTED
#if NRFY_SPIM_HAS_DCX
.dcx_pin = NRFX_COND_CODE_1(NRFX_SPIM_EXTENDED_ENABLED,
(p_config->dcx_pin,),
(NRF_SPIM_DCX_DEFAULT,))
#endif
#if NRFY_SPIM_HAS_HW_CSN
.csn_pin = NRFX_COND_CODE_1(NRFX_SPIM_EXTENDED_ENABLED,
(use_csn ? p_config->ss_pin : NRF_SPIM_CSN_DEFAULT,),
(NRF_SPIM_CSN_DEFAULT,))
#endif
},
.csn_pol = p_config->ss_active_high ? NRF_SPIM_CSN_POL_HIGH : NRF_SPIM_CSN_POL_LOW,
.csn_duration = p_config->ss_duration,
.rx_delay = p_config->rx_delay
#if NRFY_SPIM_HAS_HW_CSN
.csn_pol = NRFX_COND_CODE_1(NRFX_SPIM_EXTENDED_ENABLED,
(use_csn ?
(p_config->ss_active_high ?
NRF_SPIM_CSN_POL_HIGH : NRF_SPIM_CSN_POL_LOW) :
(nrf_spim_csn_pol_t)NRF_SPIM_CSNPOL_DEFAULT,),
((nrf_spim_csn_pol_t)NRF_SPIM_CSNPOL_DEFAULT,))
.csn_duration = NRFX_COND_CODE_1(NRFX_SPIM_EXTENDED_ENABLED,
(use_csn ?
p_config->ss_duration : NRF_SPIM_CSNDUR_DEFAULT,),
(NRF_SPIM_CSNDUR_DEFAULT,))
#endif
#if NRFY_SPIM_HAS_RXDELAY
.rx_delay = NRFX_COND_CODE_1(NRFX_SPIM_EXTENDED_ENABLED,
(SPIM_RXDELAY_PRESENT_VALIDATE(p_instance->drv_inst_idx) ?
p_config->rx_delay : NRF_SPIM_RXDELAY_DEFAULT,),
(NRF_SPIM_RXDELAY_DEFAULT,))
#endif
},
.ext_enable = ext_support && (hw_csn || (p_config->dcx_pin != NRF_SPIM_PIN_NOT_CONNECTED)),
#endif // NRFX_SPIM_EXTENDED_ENABLED
#endif // NRFY_SPIM_HAS_EXTENDED
.skip_psel_cfg = p_config->skip_psel_cfg
};
@ -632,8 +664,12 @@ void nrfx_spim_uninit(nrfx_spim_t const * p_instance)
{
nrfy_spim_ext_pins_t ext_pins;
nrfy_spim_ext_pins_get(p_instance->p_reg, &ext_pins);
#if NRFY_SPIM_HAS_DCX
spim_pin_uninit(ext_pins.dcx_pin);
#endif
#if NRFY_SPIM_HAS_HW_CSN
spim_pin_uninit(ext_pins.csn_pin);
#endif
}
#endif
}

2
nrfx/drivers/src/nrfx_spis.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2013 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/src/nrfx_systick.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2016 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/src/nrfx_tbm.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2022 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2022 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/src/nrfx_temp.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2019 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2019 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/src/nrfx_timer.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/src/nrfx_twi.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

12
nrfx/drivers/src/nrfx_twi_twim.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2019 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2019 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -51,6 +51,16 @@ nrfx_err_t nrfx_twi_twim_bus_recover(uint32_t scl_pin, uint32_t sda_pin)
TWI_TWIM_PIN_CONFIGURE(scl_pin);
TWI_TWIM_PIN_CONFIGURE(sda_pin);
#if NRF_GPIO_HAS_CLOCKPIN
#if defined(NRF_TWIM_CLOCKPIN_SCL_NEEDED)
nrf_gpio_pin_clock_set(scl_pin, true);
#endif
#if defined(NRF_TWIM_CLOCKPIN_SDA_NEEDED)
nrf_gpio_pin_clock_set(sda_pin, true);
#endif
#endif
NRFX_DELAY_US(4);
for (uint8_t i = 0; i < 9; i++)

9
nrfx/drivers/src/nrfx_twim.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -243,8 +243,13 @@ static bool pins_configure(nrfx_twim_config_t const * p_config)
NRFX_ASSERT(p_config->scl_pin != p_config->sda_pin);
TWIM_PIN_INIT(p_config->scl_pin, pin_drive);
TWIM_PIN_INIT(p_config->sda_pin, pin_drive);
#if NRF_GPIO_HAS_CLOCKPIN && defined(NRF_TWIM_CLOCKPIN_SCL_NEEDED)
#if NRF_GPIO_HAS_CLOCKPIN
#if defined(NRF_TWIM_CLOCKPIN_SCL_NEEDED)
nrfy_gpio_pin_clock_set(p_config->scl_pin, true);
#endif
#if defined(NRF_TWIM_CLOCKPIN_SDA_NEEDED)
nrfy_gpio_pin_clock_set(p_config->sda_pin, true);
#endif
#endif
}
return true;

9
nrfx/drivers/src/nrfx_twis.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -537,8 +537,13 @@ nrfx_err_t nrfx_twis_init(nrfx_twis_t const * p_instance,
NRFX_ASSERT(p_config->scl_pin != p_config->sda_pin);
nrfx_twis_config_pin(p_config->scl_pin, p_config->scl_pull);
nrfx_twis_config_pin(p_config->sda_pin, p_config->sda_pull);
#if NRF_GPIO_HAS_CLOCKPIN && defined(NRF_TWIS_CLOCKPIN_SCL_NEEDED)
#if NRF_GPIO_HAS_CLOCKPIN
#if defined(NRF_TWIS_CLOCKPIN_SCL_NEEDED)
nrf_gpio_pin_clock_set(p_config->scl_pin, true);
#endif
#if defined(NRF_TWIS_CLOCKPIN_SDA_NEEDED)
nrf_gpio_pin_clock_set(p_config->sda_pin, true);
#endif
#endif
}
twis_configure(p_instance, p_config);

2
nrfx/drivers/src/nrfx_uart.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

24
nrfx/drivers/src/nrfx_uarte.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -1171,6 +1171,7 @@ static void on_rx_disabled(NRF_UARTE_Type * p_uarte,
uarte_control_block_t * p_cb,
size_t flush_cnt)
{
nrfy_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_RXDRDY);
nrfy_uarte_shorts_disable(p_uarte, NRF_UARTE_SHORT_ENDRX_STARTRX);
nrfy_uarte_int_disable(p_uarte, rx_int_mask);
disable_hw_from_rx(p_uarte);
@ -1219,14 +1220,7 @@ static bool rx_flushed_handler(NRF_UARTE_Type * p_uarte, uarte_control_block_t *
memcpy(p_cb->rx.curr.p_buffer, p_cb->rx.flush.p_buffer, p_cb->rx.flush.length);
p_cb->rx.off = p_cb->rx.flush.length;
p_cb->rx.flush.length = 0;
if (nrfy_uarte_int_enable_check(p_uarte, NRF_UARTE_INT_RXDRDY_MASK) && p_cb->handler)
{
user_handler(p_cb, NRFX_UARTE_EVT_RX_BYTE);
}
else
{
NRFX_ATOMIC_FETCH_OR(&p_cb->flags, UARTE_FLAG_RX_FROM_FLUSH);
}
NRFX_ATOMIC_FETCH_OR(&p_cb->flags, UARTE_FLAG_RX_FROM_FLUSH);
}
return true;
@ -1274,6 +1268,13 @@ nrfx_err_t nrfx_uarte_rx_enable(nrfx_uarte_t const * p_instance, uint32_t flags)
return NRFX_ERROR_NO_MEM;
}
if (nrfy_uarte_int_enable_check(p_uarte, NRF_UARTE_INT_RXDRDY_MASK) && p_cb->handler &&
(p_cb->flags & UARTE_FLAG_RX_FROM_FLUSH))
{
NRFX_ATOMIC_FETCH_AND(&p_cb->flags, ~UARTE_FLAG_RX_FROM_FLUSH);
user_handler(p_cb, NRFX_UARTE_EVT_RX_BYTE);
}
/* Check if instance is still enabled. It might get disabled at some point. */
if (p_cb->flags & UARTE_FLAG_RX_ENABLED)
{
@ -1755,6 +1756,11 @@ static void handler_on_rx_done(uarte_control_block_t * p_cb,
static void rxto_irq_handler(NRF_UARTE_Type * p_uarte,
uarte_control_block_t * p_cb)
{
if (RX_CACHE_SUPPORTED && (p_cb->flags & UARTE_FLAG_RX_USE_CACHE))
{
p_cb->rx.p_cache->user[0] = (nrfy_uarte_buffer_t){ NULL, 0 };
}
if (p_cb->rx.curr.p_buffer)
{
handler_on_rx_done(p_cb, p_cb->rx.curr.p_buffer, 0, true);

2
nrfx/drivers/src/nrfx_usbd.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2016 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/src/nrfx_usbd_errata.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2016 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/src/nrfx_usbreg.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2019 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2019 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

7
nrfx/drivers/src/nrfx_vevif.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2021 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2021 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -37,6 +37,7 @@
#include <nrfx_vevif.h>
#include <nrf_bitmask.h>
#include <hal/nrf_vpr.h>
#include <hal/nrf_vpr_csr.h>
#include <hal/nrf_vpr_csr_vevif.h>
@ -83,10 +84,8 @@ nrfx_err_t nrfx_vevif_init(nrf_vpr_clic_priority_t interrupt_priority,
m_cb.p_context = p_context;
m_cb.state = NRFX_DRV_STATE_INITIALIZED;
nrf_vpr_csr_machine_interrupts_enable();
nrf_vpr_csr_rtperiph_enable_set(true);
nrf_vpr_csr_vevif_tasks_set(0);
nrf_vpr_csr_vevif_tasks_clear(NRF_VPR_TASK_TRIGGER_ALL_MASK);
for (uint8_t i = 0; i < NRF_VPR_CSR_VEVIF_EVENT_TASK_COUNT; i++)
{

2
nrfx/drivers/src/nrfx_wdt.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2015 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/drivers/src/prs/nrfx_prs.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2017 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

25
nrfx/drivers/src/prs/nrfx_prs.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2017 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@ -100,6 +100,27 @@ extern "C" {
#elif defined(NRF5340_XXAA_NETWORK)
// SPIM0, SPIS0, TWIM0, TWIS0, UARTE0
#define NRFX_PRS_BOX_0_ADDR NRF_UARTE0
#elif defined(NRF54H20_XXAA)
// SPIM130, SPIS130, TWIM130, TWIS130, UARTE130
#define NRFX_PRS_BOX_0_ADDR NRF_UARTE130
// SPIM131, SPIS131, TWIM131, TWIS131, UARTE131
#define NRFX_PRS_BOX_1_ADDR NRF_UARTE131
// SPIM132, SPIS132, TWIM132, TWIS132, UARTE132
#define NRFX_PRS_BOX_2_ADDR NRF_UARTE132
// SPIM133, SPIS133, TWIM133, TWIS133, UARTE133
#define NRFX_PRS_BOX_3_ADDR NRF_UARTE133
// SPIM134, SPIS134, TWIM134, TWIS134, UARTE134
#define NRFX_PRS_BOX_4_ADDR NRF_UARTE134
// SPIM135, SPIS135, TWIM135, TWIS135, UARTE135
#define NRFX_PRS_BOX_5_ADDR NRF_UARTE135
// SPIM136, SPIS136, TWIM136, TWIS136, UARTE136
#define NRFX_PRS_BOX_6_ADDR NRF_UARTE136
// SPIM137, SPIS137, TWIM137, TWIS137, UARTE137
#define NRFX_PRS_BOX_7_ADDR NRF_UARTE137
// SPIM120, UARTE120
#define NRFX_PRS_BOX_8_ADDR NRF_UARTE120
// COMP, LPCOMP
#define NRFX_PRS_BOX_9_ADDR NRF_COMP
#elif defined(NRF54H20_ENGA_XXAA)
// SPIM130, SPIS130, TWIM130, TWIS130, UARTE130
#define NRFX_PRS_BOX_0_ADDR NRF_UARTE130
@ -121,7 +142,7 @@ extern "C" {
#define NRFX_PRS_BOX_8_ADDR NRF_UARTE120
// COMP, LPCOMP
#define NRFX_PRS_BOX_9_ADDR NRF_COMP
#elif defined(NRF54L15_ENGA_XXAA)
#elif defined(NRF54L15_XXAA) || defined(NRF54L15_ENGA_XXAA)
// SPIM00, SPIS00, UARTE00
#define NRFX_PRS_BOX_0_ADDR NRF_UARTE00
// SPIM20, SPIS20, TWIM20, TWIS20, UARTE20

2
nrfx/hal/nrf_aar.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2019 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2019 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/hal/nrf_acl.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2018 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2018 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

2
nrfx/hal/nrf_adc.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2014 - 2023, Nordic Semiconductor ASA
* Copyright (c) 2014 - 2024, Nordic Semiconductor ASA
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause

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