215 lines
5.6 KiB
ArmAsm
215 lines
5.6 KiB
ArmAsm
/***************************************************************************//**
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* Copyright 2019-2020 Microchip FPGA Embedded Systems Solutions.
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*
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* SPDX-License-Identifier: MIT
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*
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* MPFS HAL Embedded Software
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*
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* Hardware registers access functions.
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* The implementation of these function is platform and toolchain specific.
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* The functions declared here are implemented using assembler as part of the
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* processor/toolchain specific HAL.
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*
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*/
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.section .text
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.globl HW_set_32bit_reg
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.globl HW_get_32bit_reg
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.globl HW_set_32bit_reg_field
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.globl HW_get_32bit_reg_field
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.globl HW_set_16bit_reg
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.globl HW_get_16bit_reg
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.globl HW_set_16bit_reg_field
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.globl HW_get_16bit_reg_field
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.globl HW_set_8bit_reg
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.globl HW_get_8bit_reg
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.globl HW_set_8bit_reg_field
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.globl HW_get_8bit_reg_field
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/***************************************************************************//**
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* HW_set_32bit_reg is used to write the content of a 32 bits wide peripheral
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* register.
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*
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* a0: addr_t reg_addr
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* a1: uint32_t value
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*/
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HW_set_32bit_reg:
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sw a1, 0(a0)
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ret
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/***************************************************************************//**
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* HW_get_32bit_reg is used to read the content of a 32 bits wide peripheral
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* register.
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*
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* a0: addr_t reg_addr
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* @return 32 bits value read from the peripheral register.
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*/
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HW_get_32bit_reg:
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lw a0, 0(a0)
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ret
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/***************************************************************************//**
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* HW_set_32bit_reg_field is used to set the content of a field in a 32 bits
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* wide peripheral register.
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*
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* a0: addr_t reg_addr
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* a1: int_fast8_t shift
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* a2: uint32_t mask
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* a3: uint32_t value
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*/
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HW_set_32bit_reg_field:
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mv t3, a3
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sll t3, t3, a1
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and t3, t3, a2
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lw t1, 0(a0)
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mv t2, a2
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not t2, t2
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and t1, t1, t2
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or t1, t1, t3
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sw t1, 0(a0)
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ret
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/***************************************************************************//**
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* HW_get_32bit_reg_field is used to read the content of a field out of a
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* 32 bits wide peripheral register.
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*
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* a0: addr_t reg_addr
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* a1: int_fast8_t shift
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* a2: uint32_t mask
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*
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* @return 32 bits value containing the register field value specified
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* as parameter.
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*/
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HW_get_32bit_reg_field:
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lw a0, 0(a0)
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and a0, a0, a2
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srl a0, a0, a1
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ret
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/***************************************************************************//**
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* HW_set_16bit_reg is used to write the content of a 16 bits wide peripheral
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* register.
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*
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* a0: addr_t reg_addr
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* a1: uint_fast16_t value
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*/
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HW_set_16bit_reg:
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sh a1, 0(a0)
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ret
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/***************************************************************************//**
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* HW_get_16bit_reg is used to read the content of a 16 bits wide peripheral
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* register.
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*
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* a0: addr_t reg_addr
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* @return 16 bits value read from the peripheral register.
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*/
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HW_get_16bit_reg:
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lh a0, (a0)
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ret
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/***************************************************************************//**
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* HW_set_16bit_reg_field is used to set the content of a field in a 16 bits
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* wide peripheral register.
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*
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* a0: addr_t reg_addr
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* a1: int_fast8_t shift
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* a2: uint_fast16_t mask
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* a3: uint_fast16_t value
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* @param value Value to be written in the specified field.
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*/
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HW_set_16bit_reg_field:
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mv t3, a3
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sll t3, t3, a1
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and t3, t3, a2
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lh t1, 0(a0)
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mv t2, a2
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not t2, t2
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and t1, t1, t2
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or t1, t1, t3
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sh t1, 0(a0)
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ret
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/***************************************************************************//**
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* HW_get_16bit_reg_field is used to read the content of a field from a
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* 16 bits wide peripheral register.
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*
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* a0: addr_t reg_addr
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* a1: int_fast8_t shift
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* a2: uint_fast16_t mask
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*
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* @return 16 bits value containing the register field value specified
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* as parameter.
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*/
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HW_get_16bit_reg_field:
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lh a0, 0(a0)
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and a0, a0, a2
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srl a0, a0, a1
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ret
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/***************************************************************************//**
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* HW_set_8bit_reg is used to write the content of a 8 bits wide peripheral
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* register.
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*
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* a0: addr_t reg_addr
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* a1: uint_fast8_t value
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*/
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HW_set_8bit_reg:
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sb a1, 0(a0)
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ret
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/***************************************************************************//**
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* HW_get_8bit_reg is used to read the content of a 8 bits wide peripheral
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* register.
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*
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* a0: addr_t reg_addr
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* @return 8 bits value read from the peripheral register.
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*/
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HW_get_8bit_reg:
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lb a0, 0(a0)
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ret
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/***************************************************************************//**
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* HW_set_8bit_reg_field is used to set the content of a field in a 8 bits
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* wide peripheral register.
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*
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* a0: addr_t reg_addr,
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* a1: int_fast8_t shift
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* a2: uint_fast8_t mask
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* a3: uint_fast8_t value
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*/
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HW_set_8bit_reg_field:
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mv t3, a3
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sll t3, t3, a1
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and t3, t3, a2
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lb t1, 0(a0)
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mv t2, a2
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not t2, t2
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and t1, t1, t2
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or t1, t1, t3
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sb t1, 0(a0)
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ret
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/***************************************************************************//**
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* HW_get_8bit_reg_field is used to read the content of a field from a
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* 8 bits wide peripheral register.
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*
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* a0: addr_t reg_addr
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* a1: int_fast8_t shift
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* a2: uint_fast8_t mask
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*
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* @return 8 bits value containing the register field value specified
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* as parameter.
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*/
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HW_get_8bit_reg_field:
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lb a0, 0(a0)
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and a0, a0, a2
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srl a0, a0, a1
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ret
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.end
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