Add missing eSPI MSVW08 - MSVW11 definitions.
Update GPIO ID enum with max value.
Remove non-printable character from SAF header.
Make sure all structure typedefs have a structure name.
Rename SPISLV to SPIP.
Changed all hex digits to lowe case.
Converted all "ul/UL" suffixes to "u".
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Origin
MCHP
https://github.com/MicrochipTech/hal_microchip
Status:
version: 1.2.0
MEC150x/2x GPIO control register alternate function field is a two
bit field but mask was set for 4 bits.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Origin
MCHP
https://github.com/MicrochipTech/hal_microchip
Status:
version: 1.2.0
Add missing ADC register field defines for control and others.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Origin:
MCHP
https://github.com/MicrochipTech/hal_microchip
Status:
version 1.2.0
Add all GIRQ interrupt source definitions to the ECIA
component header. Add peripheral instance numbers to
main MEC1501 header. Add common BIT macro if not defined
in an outside header.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Origin:
MCHP
https://github.com/MicrochipTech/hal_microchip
Status:
version 1.1.0
Add Microchip MEC15xx eSPI SAF header and SAF changes
in other affected hardware headers: espi_io and qmspi.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
OOB RX and TX registers transfer length fields had
incorrect mask value. Fixed OOB RX status all RW1C mask
to mask only RW1C and added another status mask for
all status(RW1C and RO).
Signed-off-by: Scott Worley <scott.worley@microchip.com>
GIRQ22 was missing from the MCHP_GIRQ_IDS enum resulting
in incorrect calculations based on the enum value. PECI
status 2 register had incorrect named bit positions resulting
in compile error when used.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Correct HAL macros related to eSPI block
Add GIRQ bit definitions for VWires and some peripherals
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Updated MEC1501 HAL headers. Add interrupt routing defines for timers.
Fix eSPI virtual wire source access. Add new headers for Port80
capture and TFDP.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Some more were added since the cleanup pass in June 2018. See e.g.
commit 2d50da70a1 ("drivers: ipm: Kconfig: Remove redundant 'default n'
properties") for a motivation. It also avoids people wondering whether
or not they need to put in 'default n'.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Conor Paxton