524 lines
9.8 KiB
C
524 lines
9.8 KiB
C
/*
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* Autogenerated file
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <dt-bindings/pinctrl/atmel_sam_pinctrl.h>
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/* pa6_gpio */
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#define PA6_GPIO \
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SAM_PINMUX(a, 6, gpio, gpio)
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/* pa6a_eic_extint6 */
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#define PA6A_EIC_EXTINT6 \
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SAM_PINMUX(a, 6, a, periph)
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/* pa6b_adc_ain6 */
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#define PA6B_ADC_AIN6 \
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SAM_PINMUX(a, 6, b, periph)
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/* pa6b_ac_ain2 */
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#define PA6B_AC_AIN2 \
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SAM_PINMUX(a, 6, b, periph)
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/* pa6b_ptc_y4 */
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#define PA6B_PTC_Y4 \
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SAM_PINMUX(a, 6, b, periph)
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/* pa6d_sercom0_pad2 */
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#define PA6D_SERCOM0_PAD2 \
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SAM_PINMUX(a, 6, d, periph)
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/* pa6e_tcc1_wo0 */
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#define PA6E_TCC1_WO0 \
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SAM_PINMUX(a, 6, e, periph)
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/* pa7_gpio */
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#define PA7_GPIO \
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SAM_PINMUX(a, 7, gpio, gpio)
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/* pa7a_eic_extint7 */
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#define PA7A_EIC_EXTINT7 \
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SAM_PINMUX(a, 7, a, periph)
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/* pa7b_adc_ain7 */
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#define PA7B_ADC_AIN7 \
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SAM_PINMUX(a, 7, b, periph)
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/* pa7b_ac_ain3 */
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#define PA7B_AC_AIN3 \
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SAM_PINMUX(a, 7, b, periph)
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/* pa7b_ptc_y5 */
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#define PA7B_PTC_Y5 \
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SAM_PINMUX(a, 7, b, periph)
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/* pa7d_sercom0_pad3 */
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#define PA7D_SERCOM0_PAD3 \
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SAM_PINMUX(a, 7, d, periph)
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/* pa7e_tcc1_wo1 */
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#define PA7E_TCC1_WO1 \
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SAM_PINMUX(a, 7, e, periph)
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/* pa8_gpio */
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#define PA8_GPIO \
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SAM_PINMUX(a, 8, gpio, gpio)
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/* pa8a_eic_nmi */
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#define PA8A_EIC_NMI \
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SAM_PINMUX(a, 8, a, periph)
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/* pa8b_adc_ain16 */
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#define PA8B_ADC_AIN16 \
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SAM_PINMUX(a, 8, b, periph)
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/* pa8b_ptc_x0 */
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#define PA8B_PTC_X0 \
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SAM_PINMUX(a, 8, b, periph)
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/* pa8c_sercom0_pad0 */
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#define PA8C_SERCOM0_PAD0 \
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SAM_PINMUX(a, 8, c, periph)
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/* pa8d_sercom2_pad0 */
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#define PA8D_SERCOM2_PAD0 \
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SAM_PINMUX(a, 8, d, periph)
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/* pa8e_tcc0_wo0 */
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#define PA8E_TCC0_WO0 \
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SAM_PINMUX(a, 8, e, periph)
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/* pa8f_radio_fectrl0 */
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#define PA8F_RADIO_FECTRL0 \
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SAM_PINMUX(a, 8, f, periph)
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/* pa9_gpio */
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#define PA9_GPIO \
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SAM_PINMUX(a, 9, gpio, gpio)
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/* pa9a_eic_extint9 */
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#define PA9A_EIC_EXTINT9 \
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SAM_PINMUX(a, 9, a, periph)
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/* pa9b_adc_ain17 */
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#define PA9B_ADC_AIN17 \
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SAM_PINMUX(a, 9, b, periph)
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/* pa9b_ptc_x1 */
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#define PA9B_PTC_X1 \
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SAM_PINMUX(a, 9, b, periph)
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/* pa9c_sercom0_pad1 */
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#define PA9C_SERCOM0_PAD1 \
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SAM_PINMUX(a, 9, c, periph)
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/* pa9d_sercom2_pad1 */
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#define PA9D_SERCOM2_PAD1 \
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SAM_PINMUX(a, 9, d, periph)
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/* pa9e_tcc0_wo1 */
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#define PA9E_TCC0_WO1 \
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SAM_PINMUX(a, 9, e, periph)
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/* pa9f_radio_fectrl1 */
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#define PA9F_RADIO_FECTRL1 \
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SAM_PINMUX(a, 9, f, periph)
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/* pa10_gpio */
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#define PA10_GPIO \
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SAM_PINMUX(a, 10, gpio, gpio)
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/* pa10a_eic_extint10 */
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#define PA10A_EIC_EXTINT10 \
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SAM_PINMUX(a, 10, a, periph)
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/* pa11_gpio */
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#define PA11_GPIO \
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SAM_PINMUX(a, 11, gpio, gpio)
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/* pa11a_eic_extint11 */
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#define PA11A_EIC_EXTINT11 \
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SAM_PINMUX(a, 11, a, periph)
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/* pa14_gpio */
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#define PA14_GPIO \
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SAM_PINMUX(a, 14, gpio, gpio)
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/* pa14a_eic_extint14 */
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#define PA14A_EIC_EXTINT14 \
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SAM_PINMUX(a, 14, a, periph)
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/* pa14c_sercom2_pad2 */
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#define PA14C_SERCOM2_PAD2 \
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SAM_PINMUX(a, 14, c, periph)
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/* pa14e_tc3_wo0 */
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#define PA14E_TC3_WO0 \
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SAM_PINMUX(a, 14, e, periph)
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/* pa14f_radio_fectrl4 */
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#define PA14F_RADIO_FECTRL4 \
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SAM_PINMUX(a, 14, f, periph)
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/* pa14h_gclk_io0 */
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#define PA14H_GCLK_IO0 \
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SAM_PINMUX(a, 14, h, periph)
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/* pa15_gpio */
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#define PA15_GPIO \
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SAM_PINMUX(a, 15, gpio, gpio)
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/* pa15a_eic_extint15 */
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#define PA15A_EIC_EXTINT15 \
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SAM_PINMUX(a, 15, a, periph)
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/* pa15c_sercom2_pad3 */
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#define PA15C_SERCOM2_PAD3 \
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SAM_PINMUX(a, 15, c, periph)
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/* pa15e_tc3_wo1 */
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#define PA15E_TC3_WO1 \
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SAM_PINMUX(a, 15, e, periph)
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/* pa15f_radio_fectrl5 */
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#define PA15F_RADIO_FECTRL5 \
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SAM_PINMUX(a, 15, f, periph)
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/* pa15h_gclk_io1 */
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#define PA15H_GCLK_IO1 \
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SAM_PINMUX(a, 15, h, periph)
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/* pa16_gpio */
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#define PA16_GPIO \
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SAM_PINMUX(a, 16, gpio, gpio)
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/* pa16b_ptc_x4 */
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#define PA16B_PTC_X4 \
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SAM_PINMUX(a, 16, b, periph)
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/* pa16c_sercom1_pad0 */
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#define PA16C_SERCOM1_PAD0 \
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SAM_PINMUX(a, 16, c, periph)
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/* pa16d_sercom3_pad0 */
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#define PA16D_SERCOM3_PAD0 \
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SAM_PINMUX(a, 16, d, periph)
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/* pa16e_tcc2_wo0 */
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#define PA16E_TCC2_WO0 \
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SAM_PINMUX(a, 16, e, periph)
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/* pa16f_tcc0_wo6 */
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#define PA16F_TCC0_WO6 \
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SAM_PINMUX(a, 16, f, periph)
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/* pa16h_gclk_io2 */
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#define PA16H_GCLK_IO2 \
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SAM_PINMUX(a, 16, h, periph)
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/* pa17_gpio */
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#define PA17_GPIO \
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SAM_PINMUX(a, 17, gpio, gpio)
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/* pa17a_eic_extint1 */
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#define PA17A_EIC_EXTINT1 \
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SAM_PINMUX(a, 17, a, periph)
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/* pa17b_ptc_x5 */
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#define PA17B_PTC_X5 \
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SAM_PINMUX(a, 17, b, periph)
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/* pa17c_sercom1_pad1 */
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#define PA17C_SERCOM1_PAD1 \
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SAM_PINMUX(a, 17, c, periph)
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/* pa17d_sercom3_pad1 */
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#define PA17D_SERCOM3_PAD1 \
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SAM_PINMUX(a, 17, d, periph)
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/* pa17e_tcc2_wo1 */
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#define PA17E_TCC2_WO1 \
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SAM_PINMUX(a, 17, e, periph)
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/* pa17f_tcc0_wo7 */
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#define PA17F_TCC0_WO7 \
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SAM_PINMUX(a, 17, f, periph)
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/* pa17h_gclk_io3 */
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#define PA17H_GCLK_IO3 \
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SAM_PINMUX(a, 17, h, periph)
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/* pa18_gpio */
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#define PA18_GPIO \
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SAM_PINMUX(a, 18, gpio, gpio)
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/* pa18a_eic_extint2 */
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#define PA18A_EIC_EXTINT2 \
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SAM_PINMUX(a, 18, a, periph)
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/* pa18b_ptc_x6 */
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#define PA18B_PTC_X6 \
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SAM_PINMUX(a, 18, b, periph)
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/* pa18c_sercom1_pad2 */
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#define PA18C_SERCOM1_PAD2 \
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SAM_PINMUX(a, 18, c, periph)
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/* pa18d_sercom3_pad2 */
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#define PA18D_SERCOM3_PAD2 \
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SAM_PINMUX(a, 18, d, periph)
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/* pa18e_tc3_wo0 */
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#define PA18E_TC3_WO0 \
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SAM_PINMUX(a, 18, e, periph)
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/* pa18f_tcc0_wo2 */
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#define PA18F_TCC0_WO2 \
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SAM_PINMUX(a, 18, f, periph)
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/* pa18h_ac_cmp0 */
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#define PA18H_AC_CMP0 \
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SAM_PINMUX(a, 18, h, periph)
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/* pa19_gpio */
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#define PA19_GPIO \
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SAM_PINMUX(a, 19, gpio, gpio)
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/* pa19a_eic_extint3 */
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#define PA19A_EIC_EXTINT3 \
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SAM_PINMUX(a, 19, a, periph)
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/* pa19b_ptc_x7 */
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#define PA19B_PTC_X7 \
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SAM_PINMUX(a, 19, b, periph)
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/* pa19c_sercom1_pad3 */
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#define PA19C_SERCOM1_PAD3 \
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SAM_PINMUX(a, 19, c, periph)
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/* pa19d_sercom3_pad3 */
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#define PA19D_SERCOM3_PAD3 \
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SAM_PINMUX(a, 19, d, periph)
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/* pa19e_tc3_wo1 */
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#define PA19E_TC3_WO1 \
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SAM_PINMUX(a, 19, e, periph)
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/* pa19f_tcc0_wo3 */
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#define PA19F_TCC0_WO3 \
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SAM_PINMUX(a, 19, f, periph)
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/* pa19h_ac_cmp1 */
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#define PA19H_AC_CMP1 \
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SAM_PINMUX(a, 19, h, periph)
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/* pa20_gpio */
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#define PA20_GPIO \
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SAM_PINMUX(a, 20, gpio, gpio)
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/* pa24_gpio */
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#define PA24_GPIO \
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SAM_PINMUX(a, 24, gpio, gpio)
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/* pa24a_eic_extint12 */
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#define PA24A_EIC_EXTINT12 \
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SAM_PINMUX(a, 24, a, periph)
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/* pa24c_sercom3_pad2 */
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#define PA24C_SERCOM3_PAD2 \
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SAM_PINMUX(a, 24, c, periph)
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/* pa24d_sercom5_pad2 */
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#define PA24D_SERCOM5_PAD2 \
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SAM_PINMUX(a, 24, d, periph)
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/* pa24e_tc5_wo0 */
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#define PA24E_TC5_WO0 \
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SAM_PINMUX(a, 24, e, periph)
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/* pa24f_tcc1_wo2 */
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#define PA24F_TCC1_WO2 \
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SAM_PINMUX(a, 24, f, periph)
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/* pa24g_usb_dm */
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#define PA24G_USB_DM \
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SAM_PINMUX(a, 24, g, periph)
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/* pa25_gpio */
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#define PA25_GPIO \
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SAM_PINMUX(a, 25, gpio, gpio)
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/* pa25a_eic_extint13 */
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#define PA25A_EIC_EXTINT13 \
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SAM_PINMUX(a, 25, a, periph)
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/* pa25b_ptc_x11 */
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#define PA25B_PTC_X11 \
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SAM_PINMUX(a, 25, b, periph)
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/* pa25c_sercom3_pad3 */
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#define PA25C_SERCOM3_PAD3 \
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SAM_PINMUX(a, 25, c, periph)
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/* pa25d_sercom5_pad3 */
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#define PA25D_SERCOM5_PAD3 \
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SAM_PINMUX(a, 25, d, periph)
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/* pa25e_tc5_wo1 */
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#define PA25E_TC5_WO1 \
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SAM_PINMUX(a, 25, e, periph)
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/* pa25f_tcc1_wo3 */
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#define PA25F_TCC1_WO3 \
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SAM_PINMUX(a, 25, f, periph)
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/* pa25g_usb_dp */
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#define PA25G_USB_DP \
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SAM_PINMUX(a, 25, g, periph)
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/* pa27_gpio */
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#define PA27_GPIO \
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SAM_PINMUX(a, 27, gpio, gpio)
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/* pa27a_eic_extint15 */
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#define PA27A_EIC_EXTINT15 \
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SAM_PINMUX(a, 27, a, periph)
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/* pa27f_sercom3_pad0 */
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#define PA27F_SERCOM3_PAD0 \
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SAM_PINMUX(a, 27, f, periph)
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/* pa27h_gclk_io0 */
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#define PA27H_GCLK_IO0 \
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SAM_PINMUX(a, 27, h, periph)
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/* pa28_gpio */
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#define PA28_GPIO \
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SAM_PINMUX(a, 28, gpio, gpio)
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/* pa28a_eic_extint8 */
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#define PA28A_EIC_EXTINT8 \
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SAM_PINMUX(a, 28, a, periph)
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/* pa28f_sercom3_pad1 */
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#define PA28F_SERCOM3_PAD1 \
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SAM_PINMUX(a, 28, f, periph)
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/* pa28h_gclk_io0 */
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#define PA28H_GCLK_IO0 \
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SAM_PINMUX(a, 28, h, periph)
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/* pa30_gpio */
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#define PA30_GPIO \
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SAM_PINMUX(a, 30, gpio, gpio)
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/* pa30a_eic_extint10 */
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#define PA30A_EIC_EXTINT10 \
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SAM_PINMUX(a, 30, a, periph)
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/* pa30d_sercom1_pad2 */
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#define PA30D_SERCOM1_PAD2 \
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SAM_PINMUX(a, 30, d, periph)
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/* pa30e_tcc1_wo0 */
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#define PA30E_TCC1_WO0 \
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SAM_PINMUX(a, 30, e, periph)
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/* pa30g_swd_clk */
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#define PA30G_SWD_CLK \
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SAM_PINMUX(a, 30, g, periph)
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/* pa30h_gclk_io0 */
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#define PA30H_GCLK_IO0 \
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SAM_PINMUX(a, 30, h, periph)
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/* pa31_gpio */
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#define PA31_GPIO \
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SAM_PINMUX(a, 31, gpio, gpio)
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/* pa31a_eic_extint11 */
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#define PA31A_EIC_EXTINT11 \
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SAM_PINMUX(a, 31, a, periph)
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/* pa31d_sercom1_pad3 */
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#define PA31D_SERCOM1_PAD3 \
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SAM_PINMUX(a, 31, d, periph)
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/* pa31e_tcc1_wo1 */
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#define PA31E_TCC1_WO1 \
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SAM_PINMUX(a, 31, e, periph)
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/* pa31g_swd_io */
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#define PA31G_SWD_IO \
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SAM_PINMUX(a, 31, g, periph)
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/* pb0_gpio */
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#define PB0_GPIO \
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SAM_PINMUX(b, 0, gpio, gpio)
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/* pb0a_eic_extint0 */
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#define PB0A_EIC_EXTINT0 \
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SAM_PINMUX(b, 0, a, periph)
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/* pb15_gpio */
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#define PB15_GPIO \
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SAM_PINMUX(b, 15, gpio, gpio)
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/* pb16_gpio */
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#define PB16_GPIO \
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SAM_PINMUX(b, 16, gpio, gpio)
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/* pb16a_eic_extint0 */
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#define PB16A_EIC_EXTINT0 \
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SAM_PINMUX(b, 16, a, periph)
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/* pb17_gpio */
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#define PB17_GPIO \
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SAM_PINMUX(b, 17, gpio, gpio)
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/* pb17a_eic_extint1 */
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#define PB17A_EIC_EXTINT1 \
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SAM_PINMUX(b, 17, a, periph)
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/* pb30_gpio */
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#define PB30_GPIO \
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SAM_PINMUX(b, 30, gpio, gpio)
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/* pb30f_sercom4_pad2 */
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#define PB30F_SERCOM4_PAD2 \
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SAM_PINMUX(b, 30, f, periph)
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/* pb31_gpio */
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#define PB31_GPIO \
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SAM_PINMUX(b, 31, gpio, gpio)
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/* pb31f_sercom4_pad1 */
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#define PB31F_SERCOM4_PAD1 \
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SAM_PINMUX(b, 31, f, periph)
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/* pc16_gpio */
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#define PC16_GPIO \
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SAM_PINMUX(c, 16, gpio, gpio)
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/* pc16f_glkc_io1 */
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#define PC16F_GLKC_IO1 \
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SAM_PINMUX(c, 16, f, periph)
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/* pc18_gpio */
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#define PC18_GPIO \
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SAM_PINMUX(c, 18, gpio, gpio)
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/* pc18f_sercom4_pad3 */
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#define PC18F_SERCOM4_PAD3 \
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SAM_PINMUX(c, 18, f, periph)
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/* pc19_gpio */
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#define PC19_GPIO \
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SAM_PINMUX(c, 19, gpio, gpio)
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/* pc19f_sercom4_pad0 */
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#define PC19F_SERCOM4_PAD0 \
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SAM_PINMUX(c, 19, f, periph)
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