736 lines
14 KiB
C
736 lines
14 KiB
C
/*
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* Autogenerated file
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <dt-bindings/pinctrl/atmel_sam_pinctrl.h>
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/* pa0_gpio */
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#define PA0_GPIO \
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SAM_PINMUX(a, 0, gpio, gpio)
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/* pa1_gpio */
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#define PA1_GPIO \
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SAM_PINMUX(a, 1, gpio, gpio)
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/* pa2_gpio */
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#define PA2_GPIO \
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SAM_PINMUX(a, 2, gpio, gpio)
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/* pa2a_scif_gclk0 */
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#define PA2A_SCIF_GCLK0 \
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SAM_PINMUX(a, 2, a, periph)
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/* pa2b_spi_npcs0 */
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#define PA2B_SPI_NPCS0 \
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SAM_PINMUX(a, 2, b, periph)
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/* pa2g_catb_dis */
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#define PA2G_CATB_DIS \
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SAM_PINMUX(a, 2, g, periph)
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/* pa3_gpio */
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#define PA3_GPIO \
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SAM_PINMUX(a, 3, gpio, gpio)
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/* pa3b_spi_miso */
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#define PA3B_SPI_MISO \
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SAM_PINMUX(a, 3, b, periph)
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/* pa4_gpio */
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#define PA4_GPIO \
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SAM_PINMUX(a, 4, gpio, gpio)
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/* pa4a_adcife_ad0 */
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#define PA4A_ADCIFE_AD0 \
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SAM_PINMUX(a, 4, a, periph)
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/* pa4b_usart0_clk */
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#define PA4B_USART0_CLK \
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SAM_PINMUX(a, 4, b, periph)
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/* pa4c_eic_extint2 */
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#define PA4C_EIC_EXTINT2 \
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SAM_PINMUX(a, 4, c, periph)
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/* pa4d_gloc_in1 */
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#define PA4D_GLOC_IN1 \
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SAM_PINMUX(a, 4, d, periph)
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/* pa4g_catb_sense0 */
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#define PA4G_CATB_SENSE0 \
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SAM_PINMUX(a, 4, g, periph)
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/* pa5_gpio */
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#define PA5_GPIO \
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SAM_PINMUX(a, 5, gpio, gpio)
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/* pa5a_adcife_ad1 */
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#define PA5A_ADCIFE_AD1 \
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SAM_PINMUX(a, 5, a, periph)
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/* pa5b_usart0_rxd */
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#define PA5B_USART0_RXD \
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SAM_PINMUX(a, 5, b, periph)
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/* pa5c_eic_extint3 */
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#define PA5C_EIC_EXTINT3 \
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SAM_PINMUX(a, 5, c, periph)
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/* pa5d_gloc_in2 */
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#define PA5D_GLOC_IN2 \
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SAM_PINMUX(a, 5, d, periph)
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/* pa5e_adcife_trigger */
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#define PA5E_ADCIFE_TRIGGER \
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SAM_PINMUX(a, 5, e, periph)
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/* pa5g_catb_sense1 */
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#define PA5G_CATB_SENSE1 \
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SAM_PINMUX(a, 5, g, periph)
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/* pa6_gpio */
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#define PA6_GPIO \
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SAM_PINMUX(a, 6, gpio, gpio)
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/* pa6a_dacc_vout */
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#define PA6A_DACC_VOUT \
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SAM_PINMUX(a, 6, a, periph)
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/* pa6b_usart0_rts */
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#define PA6B_USART0_RTS \
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SAM_PINMUX(a, 6, b, periph)
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/* pa6c_eic_extint1 */
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#define PA6C_EIC_EXTINT1 \
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SAM_PINMUX(a, 6, c, periph)
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/* pa6d_gloc_in0 */
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#define PA6D_GLOC_IN0 \
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SAM_PINMUX(a, 6, d, periph)
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/* pa6e_acifc_acan0 */
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#define PA6E_ACIFC_ACAN0 \
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SAM_PINMUX(a, 6, e, periph)
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/* pa6g_catb_sense2 */
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#define PA6G_CATB_SENSE2 \
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SAM_PINMUX(a, 6, g, periph)
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/* pa7_gpio */
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#define PA7_GPIO \
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SAM_PINMUX(a, 7, gpio, gpio)
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/* pa7a_adcife_ad2 */
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#define PA7A_ADCIFE_AD2 \
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SAM_PINMUX(a, 7, a, periph)
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/* pa7b_usart0_txd */
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#define PA7B_USART0_TXD \
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SAM_PINMUX(a, 7, b, periph)
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/* pa7c_eic_extint4 */
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#define PA7C_EIC_EXTINT4 \
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SAM_PINMUX(a, 7, c, periph)
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/* pa7d_gloc_in3 */
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#define PA7D_GLOC_IN3 \
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SAM_PINMUX(a, 7, d, periph)
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/* pa7e_acifc_acap0 */
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#define PA7E_ACIFC_ACAP0 \
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SAM_PINMUX(a, 7, e, periph)
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/* pa7g_catb_sense3 */
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#define PA7G_CATB_SENSE3 \
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SAM_PINMUX(a, 7, g, periph)
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/* pa8_gpio */
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#define PA8_GPIO \
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SAM_PINMUX(a, 8, gpio, gpio)
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/* pa8a_usart0_rts */
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#define PA8A_USART0_RTS \
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SAM_PINMUX(a, 8, a, periph)
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/* pa8b_tc0_a0 */
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#define PA8B_TC0_A0 \
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SAM_PINMUX(a, 8, b, periph)
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/* pa8c_pevc_evt0 */
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#define PA8C_PEVC_EVT0 \
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SAM_PINMUX(a, 8, c, periph)
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/* pa8d_gloc_out0 */
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#define PA8D_GLOC_OUT0 \
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SAM_PINMUX(a, 8, d, periph)
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/* pa8g_catb_sense4 */
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#define PA8G_CATB_SENSE4 \
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SAM_PINMUX(a, 8, g, periph)
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/* pa9_gpio */
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#define PA9_GPIO \
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SAM_PINMUX(a, 9, gpio, gpio)
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/* pa9a_usart0_cts */
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#define PA9A_USART0_CTS \
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SAM_PINMUX(a, 9, a, periph)
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/* pa9b_tc0_b0 */
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#define PA9B_TC0_B0 \
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SAM_PINMUX(a, 9, b, periph)
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/* pa9c_pevc_evt1 */
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#define PA9C_PEVC_EVT1 \
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SAM_PINMUX(a, 9, c, periph)
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/* pa9d_parc_pcdata0 */
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#define PA9D_PARC_PCDATA0 \
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SAM_PINMUX(a, 9, d, periph)
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/* pa9g_catb_sense5 */
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#define PA9G_CATB_SENSE5 \
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SAM_PINMUX(a, 9, g, periph)
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/* pa10_gpio */
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#define PA10_GPIO \
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SAM_PINMUX(a, 10, gpio, gpio)
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/* pa10a_usart0_clk */
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#define PA10A_USART0_CLK \
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SAM_PINMUX(a, 10, a, periph)
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/* pa10b_tc0_a1 */
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#define PA10B_TC0_A1 \
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SAM_PINMUX(a, 10, b, periph)
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/* pa10c_pevc_evt2 */
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#define PA10C_PEVC_EVT2 \
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SAM_PINMUX(a, 10, c, periph)
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/* pa10d_parc_pcdata1 */
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#define PA10D_PARC_PCDATA1 \
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SAM_PINMUX(a, 10, d, periph)
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/* pa10g_catb_sense6 */
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#define PA10G_CATB_SENSE6 \
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SAM_PINMUX(a, 10, g, periph)
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/* pa11_gpio */
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#define PA11_GPIO \
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SAM_PINMUX(a, 11, gpio, gpio)
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/* pa11a_usart0_rxd */
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#define PA11A_USART0_RXD \
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SAM_PINMUX(a, 11, a, periph)
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/* pa11b_tc0_b1 */
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#define PA11B_TC0_B1 \
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SAM_PINMUX(a, 11, b, periph)
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/* pa11c_pevc_evt3 */
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#define PA11C_PEVC_EVT3 \
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SAM_PINMUX(a, 11, c, periph)
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/* pa11d_parc_pcdata2 */
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#define PA11D_PARC_PCDATA2 \
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SAM_PINMUX(a, 11, d, periph)
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/* pa11g_catb_sense7 */
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#define PA11G_CATB_SENSE7 \
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SAM_PINMUX(a, 11, g, periph)
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/* pa12_gpio */
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#define PA12_GPIO \
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SAM_PINMUX(a, 12, gpio, gpio)
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/* pa12a_usart0_txd */
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#define PA12A_USART0_TXD \
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SAM_PINMUX(a, 12, a, periph)
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/* pa12b_tc0_a2 */
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#define PA12B_TC0_A2 \
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SAM_PINMUX(a, 12, b, periph)
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/* pa12d_parc_pcdata3 */
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#define PA12D_PARC_PCDATA3 \
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SAM_PINMUX(a, 12, d, periph)
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/* pa12g_catb_dis */
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#define PA12G_CATB_DIS \
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SAM_PINMUX(a, 12, g, periph)
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/* pa13_gpio */
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#define PA13_GPIO \
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SAM_PINMUX(a, 13, gpio, gpio)
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/* pa13a_usart1_rts */
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#define PA13A_USART1_RTS \
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SAM_PINMUX(a, 13, a, periph)
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/* pa13b_tc0_b2 */
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#define PA13B_TC0_B2 \
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SAM_PINMUX(a, 13, b, periph)
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/* pa13c_spi_npcs1 */
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#define PA13C_SPI_NPCS1 \
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SAM_PINMUX(a, 13, c, periph)
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/* pa13d_parc_pcdata4 */
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#define PA13D_PARC_PCDATA4 \
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SAM_PINMUX(a, 13, d, periph)
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/* pa13g_catb_sense8 */
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#define PA13G_CATB_SENSE8 \
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SAM_PINMUX(a, 13, g, periph)
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/* pa14_gpio */
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#define PA14_GPIO \
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SAM_PINMUX(a, 14, gpio, gpio)
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/* pa14a_usart1_clk */
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#define PA14A_USART1_CLK \
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SAM_PINMUX(a, 14, a, periph)
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/* pa14b_tc0_clk0 */
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#define PA14B_TC0_CLK0 \
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SAM_PINMUX(a, 14, b, periph)
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/* pa14c_spi_npcs2 */
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#define PA14C_SPI_NPCS2 \
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SAM_PINMUX(a, 14, c, periph)
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/* pa14d_parc_pcdata5 */
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#define PA14D_PARC_PCDATA5 \
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SAM_PINMUX(a, 14, d, periph)
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/* pa14g_catb_sense9 */
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#define PA14G_CATB_SENSE9 \
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SAM_PINMUX(a, 14, g, periph)
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/* pa15_gpio */
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#define PA15_GPIO \
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SAM_PINMUX(a, 15, gpio, gpio)
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/* pa15a_usart1_rxd */
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#define PA15A_USART1_RXD \
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SAM_PINMUX(a, 15, a, periph)
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/* pa15b_tc0_clk1 */
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#define PA15B_TC0_CLK1 \
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SAM_PINMUX(a, 15, b, periph)
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/* pa15c_spi_npcs3 */
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#define PA15C_SPI_NPCS3 \
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SAM_PINMUX(a, 15, c, periph)
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/* pa15d_parc_pcdata6 */
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#define PA15D_PARC_PCDATA6 \
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SAM_PINMUX(a, 15, d, periph)
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/* pa15g_catb_sense10 */
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#define PA15G_CATB_SENSE10 \
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SAM_PINMUX(a, 15, g, periph)
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/* pa16_gpio */
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#define PA16_GPIO \
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SAM_PINMUX(a, 16, gpio, gpio)
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/* pa16a_usart1_txd */
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#define PA16A_USART1_TXD \
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SAM_PINMUX(a, 16, a, periph)
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/* pa16b_tc0_clk2 */
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#define PA16B_TC0_CLK2 \
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SAM_PINMUX(a, 16, b, periph)
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/* pa16c_eic_extint1 */
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#define PA16C_EIC_EXTINT1 \
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SAM_PINMUX(a, 16, c, periph)
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/* pa16d_parc_pcdata7 */
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#define PA16D_PARC_PCDATA7 \
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SAM_PINMUX(a, 16, d, periph)
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/* pa16g_catb_sense11 */
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#define PA16G_CATB_SENSE11 \
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SAM_PINMUX(a, 16, g, periph)
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/* pa17_gpio */
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#define PA17_GPIO \
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SAM_PINMUX(a, 17, gpio, gpio)
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/* pa17a_usart2_rts */
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#define PA17A_USART2_RTS \
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SAM_PINMUX(a, 17, a, periph)
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/* pa17b_abdacb_dac0 */
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#define PA17B_ABDACB_DAC0 \
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SAM_PINMUX(a, 17, b, periph)
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/* pa17c_eic_extint2 */
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#define PA17C_EIC_EXTINT2 \
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SAM_PINMUX(a, 17, c, periph)
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/* pa17d_parc_pcck */
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#define PA17D_PARC_PCCK \
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SAM_PINMUX(a, 17, d, periph)
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/* pa17g_catb_sense12 */
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#define PA17G_CATB_SENSE12 \
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SAM_PINMUX(a, 17, g, periph)
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/* pa18_gpio */
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#define PA18_GPIO \
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SAM_PINMUX(a, 18, gpio, gpio)
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/* pa18a_usart2_clk */
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#define PA18A_USART2_CLK \
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SAM_PINMUX(a, 18, a, periph)
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/* pa18b_abdacb_dacn0 */
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#define PA18B_ABDACB_DACN0 \
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SAM_PINMUX(a, 18, b, periph)
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/* pa18c_eic_extint3 */
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#define PA18C_EIC_EXTINT3 \
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SAM_PINMUX(a, 18, c, periph)
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/* pa18d_parc_pcen1 */
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#define PA18D_PARC_PCEN1 \
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SAM_PINMUX(a, 18, d, periph)
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/* pa18g_catb_sense13 */
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#define PA18G_CATB_SENSE13 \
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SAM_PINMUX(a, 18, g, periph)
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/* pa19_gpio */
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#define PA19_GPIO \
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SAM_PINMUX(a, 19, gpio, gpio)
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/* pa19a_usart2_rxd */
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#define PA19A_USART2_RXD \
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SAM_PINMUX(a, 19, a, periph)
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/* pa19b_abdacb_dac1 */
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#define PA19B_ABDACB_DAC1 \
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SAM_PINMUX(a, 19, b, periph)
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/* pa19c_eic_extint4 */
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#define PA19C_EIC_EXTINT4 \
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SAM_PINMUX(a, 19, c, periph)
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/* pa19d_parc_pcen2 */
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#define PA19D_PARC_PCEN2 \
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SAM_PINMUX(a, 19, d, periph)
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/* pa19e_scif_gclk0 */
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#define PA19E_SCIF_GCLK0 \
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SAM_PINMUX(a, 19, e, periph)
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/* pa19g_catb_sense14 */
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#define PA19G_CATB_SENSE14 \
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SAM_PINMUX(a, 19, g, periph)
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/* pa20_gpio */
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#define PA20_GPIO \
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SAM_PINMUX(a, 20, gpio, gpio)
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/* pa20a_usart2_txd */
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#define PA20A_USART2_TXD \
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SAM_PINMUX(a, 20, a, periph)
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/* pa20b_abdacb_dacn1 */
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#define PA20B_ABDACB_DACN1 \
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SAM_PINMUX(a, 20, b, periph)
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/* pa20c_eic_extint5 */
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#define PA20C_EIC_EXTINT5 \
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SAM_PINMUX(a, 20, c, periph)
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/* pa20d_gcloc_in0 */
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#define PA20D_GCLOC_IN0 \
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SAM_PINMUX(a, 20, d, periph)
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/* pa20e_scif_gclk1 */
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#define PA20E_SCIF_GCLK1 \
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SAM_PINMUX(a, 20, e, periph)
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/* pa20g_catb_sense15 */
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#define PA20G_CATB_SENSE15 \
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SAM_PINMUX(a, 20, g, periph)
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/* pa21_gpio */
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#define PA21_GPIO \
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SAM_PINMUX(a, 21, gpio, gpio)
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/* pa21a_spi_miso */
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#define PA21A_SPI_MISO \
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SAM_PINMUX(a, 21, a, periph)
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/* pa21b_usart1_cts */
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#define PA21B_USART1_CTS \
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SAM_PINMUX(a, 21, b, periph)
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/* pa21c_eic_extint6 */
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#define PA21C_EIC_EXTINT6 \
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SAM_PINMUX(a, 21, c, periph)
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/* pa21d_gcloc_in1 */
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#define PA21D_GCLOC_IN1 \
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SAM_PINMUX(a, 21, d, periph)
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/* pa21e_twim2_twd */
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#define PA21E_TWIM2_TWD \
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SAM_PINMUX(a, 21, e, periph)
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/* pa21g_catb_sense16 */
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#define PA21G_CATB_SENSE16 \
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SAM_PINMUX(a, 21, g, periph)
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/* pa22_gpio */
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#define PA22_GPIO \
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SAM_PINMUX(a, 22, gpio, gpio)
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/* pa22a_spi_mosi */
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#define PA22A_SPI_MOSI \
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SAM_PINMUX(a, 22, a, periph)
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/* pa22b_usart2_cts */
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#define PA22B_USART2_CTS \
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SAM_PINMUX(a, 22, b, periph)
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/* pa22c_eic_extint7 */
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#define PA22C_EIC_EXTINT7 \
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SAM_PINMUX(a, 22, c, periph)
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/* pa22d_gcloc_in2 */
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#define PA22D_GCLOC_IN2 \
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SAM_PINMUX(a, 22, d, periph)
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/* pa22e_twim2_twck */
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#define PA22E_TWIM2_TWCK \
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SAM_PINMUX(a, 22, e, periph)
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/* pa22g_catb_sense17 */
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#define PA22G_CATB_SENSE17 \
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SAM_PINMUX(a, 22, g, periph)
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/* pa23_gpio */
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#define PA23_GPIO \
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SAM_PINMUX(a, 23, gpio, gpio)
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/* pa23a_spi_sck */
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#define PA23A_SPI_SCK \
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SAM_PINMUX(a, 23, a, periph)
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/* pa23b_twims0_twd */
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#define PA23B_TWIMS0_TWD \
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SAM_PINMUX(a, 23, b, periph)
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/* pa23c_eic_extint8 */
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#define PA23C_EIC_EXTINT8 \
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SAM_PINMUX(a, 23, c, periph)
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/* pa23d_gcloc_in3 */
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#define PA23D_GCLOC_IN3 \
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SAM_PINMUX(a, 23, d, periph)
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/* pa23e_scif_glck_in0 */
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#define PA23E_SCIF_GLCK_IN0 \
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SAM_PINMUX(a, 23, e, periph)
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/* pa23g_catb_dis */
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#define PA23G_CATB_DIS \
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SAM_PINMUX(a, 23, g, periph)
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/* pa24_gpio */
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#define PA24_GPIO \
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SAM_PINMUX(a, 24, gpio, gpio)
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/* pa24a_spi_npcs0 */
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#define PA24A_SPI_NPCS0 \
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SAM_PINMUX(a, 24, a, periph)
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/* pa24b_twims0_twck */
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#define PA24B_TWIMS0_TWCK \
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SAM_PINMUX(a, 24, b, periph)
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/* pa24d_gcloc_out0 */
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#define PA24D_GCLOC_OUT0 \
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SAM_PINMUX(a, 24, d, periph)
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/* pa24e_scif_glck_in1 */
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#define PA24E_SCIF_GLCK_IN1 \
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SAM_PINMUX(a, 24, e, periph)
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/* pa24g_catb_sense18 */
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#define PA24G_CATB_SENSE18 \
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SAM_PINMUX(a, 24, g, periph)
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/* pa25_gpio */
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#define PA25_GPIO \
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SAM_PINMUX(a, 25, gpio, gpio)
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/* pa25b_usart2_rxd */
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#define PA25B_USART2_RXD \
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SAM_PINMUX(a, 25, b, periph)
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/* pa25g_catb_sense19 */
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#define PA25G_CATB_SENSE19 \
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SAM_PINMUX(a, 25, g, periph)
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/* pa26_gpio */
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#define PA26_GPIO \
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SAM_PINMUX(a, 26, gpio, gpio)
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/* pa26b_usart2_txd */
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#define PA26B_USART2_TXD \
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SAM_PINMUX(a, 26, b, periph)
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/* pa26g_catb_sense20 */
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#define PA26G_CATB_SENSE20 \
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SAM_PINMUX(a, 26, g, periph)
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/* pa27_gpio */
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#define PA27_GPIO \
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SAM_PINMUX(a, 27, gpio, gpio)
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/* pa27a_spi_miso */
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#define PA27A_SPI_MISO \
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SAM_PINMUX(a, 27, a, periph)
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/* pa27b_iisc_isck */
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#define PA27B_IISC_ISCK \
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SAM_PINMUX(a, 27, b, periph)
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/* pa27c_abdacb_dac0 */
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#define PA27C_ABDACB_DAC0 \
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SAM_PINMUX(a, 27, c, periph)
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/* pa27d_gloc_in4 */
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#define PA27D_GLOC_IN4 \
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SAM_PINMUX(a, 27, d, periph)
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/* pa27e_usart3_rts */
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#define PA27E_USART3_RTS \
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SAM_PINMUX(a, 27, e, periph)
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/* pa27g_catb_sense0 */
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#define PA27G_CATB_SENSE0 \
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SAM_PINMUX(a, 27, g, periph)
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/* pa28_gpio */
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#define PA28_GPIO \
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SAM_PINMUX(a, 28, gpio, gpio)
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/* pa28a_spi_mosi */
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#define PA28A_SPI_MOSI \
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SAM_PINMUX(a, 28, a, periph)
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/* pa28b_iisc_isdi */
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#define PA28B_IISC_ISDI \
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SAM_PINMUX(a, 28, b, periph)
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/* pa28c_abdacb_dacn0 */
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#define PA28C_ABDACB_DACN0 \
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SAM_PINMUX(a, 28, c, periph)
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/* pa28d_gloc_in5 */
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#define PA28D_GLOC_IN5 \
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SAM_PINMUX(a, 28, d, periph)
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/* pa28e_usart3_cts */
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#define PA28E_USART3_CTS \
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SAM_PINMUX(a, 28, e, periph)
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/* pa28g_catb_sense1 */
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#define PA28G_CATB_SENSE1 \
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SAM_PINMUX(a, 28, g, periph)
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/* pa29_gpio */
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#define PA29_GPIO \
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SAM_PINMUX(a, 29, gpio, gpio)
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/* pa29a_spi_sck */
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#define PA29A_SPI_SCK \
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SAM_PINMUX(a, 29, a, periph)
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/* pa29b_iisc_iws */
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#define PA29B_IISC_IWS \
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SAM_PINMUX(a, 29, b, periph)
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/* pa29c_abdacb_dac1 */
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#define PA29C_ABDACB_DAC1 \
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SAM_PINMUX(a, 29, c, periph)
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/* pa29d_gloc_in6 */
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#define PA29D_GLOC_IN6 \
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SAM_PINMUX(a, 29, d, periph)
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/* pa29e_usart3_clk */
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#define PA29E_USART3_CLK \
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SAM_PINMUX(a, 29, e, periph)
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/* pa29g_catb_sense2 */
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#define PA29G_CATB_SENSE2 \
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SAM_PINMUX(a, 29, g, periph)
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/* pa30_gpio */
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#define PA30_GPIO \
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SAM_PINMUX(a, 30, gpio, gpio)
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/* pa30a_spi_npcs0 */
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#define PA30A_SPI_NPCS0 \
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SAM_PINMUX(a, 30, a, periph)
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/* pa30b_iisc_isdo */
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#define PA30B_IISC_ISDO \
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SAM_PINMUX(a, 30, b, periph)
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/* pa30c_abdacb_dacn1 */
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#define PA30C_ABDACB_DACN1 \
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SAM_PINMUX(a, 30, c, periph)
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/* pa30d_gloc_in7 */
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#define PA30D_GLOC_IN7 \
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SAM_PINMUX(a, 30, d, periph)
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/* pa30e_usart3_rxd */
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#define PA30E_USART3_RXD \
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SAM_PINMUX(a, 30, e, periph)
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/* pa30g_catb_sense3 */
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#define PA30G_CATB_SENSE3 \
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SAM_PINMUX(a, 30, g, periph)
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/* pa31_gpio */
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#define PA31_GPIO \
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SAM_PINMUX(a, 31, gpio, gpio)
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/* pa31a_spi_npcs1 */
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#define PA31A_SPI_NPCS1 \
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SAM_PINMUX(a, 31, a, periph)
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/* pa31b_iisc_imck */
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#define PA31B_IISC_IMCK \
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SAM_PINMUX(a, 31, b, periph)
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/* pa31c_abdacb_clk */
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#define PA31C_ABDACB_CLK \
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SAM_PINMUX(a, 31, c, periph)
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/* pa31d_gloc_out1 */
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#define PA31D_GLOC_OUT1 \
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SAM_PINMUX(a, 31, d, periph)
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/* pa31e_usart3_txd */
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#define PA31E_USART3_TXD \
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SAM_PINMUX(a, 31, e, periph)
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/* pa31g_catb_dis */
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#define PA31G_CATB_DIS \
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SAM_PINMUX(a, 31, g, periph)
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