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hal_atmel/include/dt-bindings/pinctrl/sam3XXh-pinctrl.h

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/*
* Autogenerated file
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <dt-bindings/pinctrl/atmel_sam_pinctrl.h>
/* pa0_gpio */
#define PA0_GPIO \
SAM_PINMUX(a, 0, gpio, gpio)
/* pa0a_can0_tx */
#define PA0A_CAN0_TX \
SAM_PINMUX(a, 0, a, periph)
/* pa0b_pwm_pwml3 */
#define PA0B_PWM_PWML3 \
SAM_PINMUX(a, 0, b, periph)
/* pa1_gpio */
#define PA1_GPIO \
SAM_PINMUX(a, 1, gpio, gpio)
/* pa1a_can0_rx */
#define PA1A_CAN0_RX \
SAM_PINMUX(a, 1, a, periph)
/* pa1b_pmc_pck0 */
#define PA1B_PMC_PCK0 \
SAM_PINMUX(a, 1, b, periph)
/* pa1x_supc_wkup0 */
#define PA1X_SUPC_WKUP0 \
SAM_PINMUX(a, 1, wkup0, wakeup)
/* pa2_gpio */
#define PA2_GPIO \
SAM_PINMUX(a, 2, gpio, gpio)
/* pa2a_tc0_tioa1 */
#define PA2A_TC0_TIOA1 \
SAM_PINMUX(a, 2, a, periph)
/* pa2b_ebi_nandrdy */
#define PA2B_EBI_NANDRDY \
SAM_PINMUX(a, 2, b, periph)
/* pa2x_adc_ad0 */
#define PA2X_ADC_AD0 \
SAM_PINMUX(a, 2, x, extra)
/* pa3_gpio */
#define PA3_GPIO \
SAM_PINMUX(a, 3, gpio, gpio)
/* pa3a_tc0_tiob1 */
#define PA3A_TC0_TIOB1 \
SAM_PINMUX(a, 3, a, periph)
/* pa3b_pwm_pwmfi1 */
#define PA3B_PWM_PWMFI1 \
SAM_PINMUX(a, 3, b, periph)
/* pa3x_adc_ad1 */
#define PA3X_ADC_AD1 \
SAM_PINMUX(a, 3, x, extra)
/* pa3x_supc_wkup1 */
#define PA3X_SUPC_WKUP1 \
SAM_PINMUX(a, 3, wkup1, wakeup)
/* pa4_gpio */
#define PA4_GPIO \
SAM_PINMUX(a, 4, gpio, gpio)
/* pa4a_tc0_tclk1 */
#define PA4A_TC0_TCLK1 \
SAM_PINMUX(a, 4, a, periph)
/* pa4b_ebi_nwait */
#define PA4B_EBI_NWAIT \
SAM_PINMUX(a, 4, b, periph)
/* pa4x_adc_ad2 */
#define PA4X_ADC_AD2 \
SAM_PINMUX(a, 4, x, extra)
/* pa5_gpio */
#define PA5_GPIO \
SAM_PINMUX(a, 5, gpio, gpio)
/* pa5a_tc0_tioa2 */
#define PA5A_TC0_TIOA2 \
SAM_PINMUX(a, 5, a, periph)
/* pa5b_pwm_pwmfi0 */
#define PA5B_PWM_PWMFI0 \
SAM_PINMUX(a, 5, b, periph)
/* pa5x_supc_wkup2 */
#define PA5X_SUPC_WKUP2 \
SAM_PINMUX(a, 5, wkup2, wakeup)
/* pa6_gpio */
#define PA6_GPIO \
SAM_PINMUX(a, 6, gpio, gpio)
/* pa6a_tc0_tiob2 */
#define PA6A_TC0_TIOB2 \
SAM_PINMUX(a, 6, a, periph)
/* pa6b_ebi_ncs0 */
#define PA6B_EBI_NCS0 \
SAM_PINMUX(a, 6, b, periph)
/* pa6x_adc_ad3 */
#define PA6X_ADC_AD3 \
SAM_PINMUX(a, 6, x, extra)
/* pa7_gpio */
#define PA7_GPIO \
SAM_PINMUX(a, 7, gpio, gpio)
/* pa7a_tc0_tclk2 */
#define PA7A_TC0_TCLK2 \
SAM_PINMUX(a, 7, a, periph)
/* pa7b_ebi_ncs1 */
#define PA7B_EBI_NCS1 \
SAM_PINMUX(a, 7, b, periph)
/* pa7x_supc_wkup3 */
#define PA7X_SUPC_WKUP3 \
SAM_PINMUX(a, 7, wkup3, wakeup)
/* pa8_gpio */
#define PA8_GPIO \
SAM_PINMUX(a, 8, gpio, gpio)
/* pa8a_uart_rxd */
#define PA8A_UART_RXD \
SAM_PINMUX(a, 8, a, periph)
/* pa8b_pwm_pwmh0 */
#define PA8B_PWM_PWMH0 \
SAM_PINMUX(a, 8, b, periph)
/* pa8x_supc_wkup4 */
#define PA8X_SUPC_WKUP4 \
SAM_PINMUX(a, 8, wkup4, wakeup)
/* pa9_gpio */
#define PA9_GPIO \
SAM_PINMUX(a, 9, gpio, gpio)
/* pa9a_uart_txd */
#define PA9A_UART_TXD \
SAM_PINMUX(a, 9, a, periph)
/* pa9b_pwm_pwmh3 */
#define PA9B_PWM_PWMH3 \
SAM_PINMUX(a, 9, b, periph)
/* pa10_gpio */
#define PA10_GPIO \
SAM_PINMUX(a, 10, gpio, gpio)
/* pa10a_usart0_rxd */
#define PA10A_USART0_RXD \
SAM_PINMUX(a, 10, a, periph)
/* pa10b_dacc_datrg */
#define PA10B_DACC_DATRG \
SAM_PINMUX(a, 10, b, periph)
/* pa10x_supc_wkup5 */
#define PA10X_SUPC_WKUP5 \
SAM_PINMUX(a, 10, wkup5, wakeup)
/* pa11_gpio */
#define PA11_GPIO \
SAM_PINMUX(a, 11, gpio, gpio)
/* pa11a_usart0_txd */
#define PA11A_USART0_TXD \
SAM_PINMUX(a, 11, a, periph)
/* pa11b_adc_adtrg */
#define PA11B_ADC_ADTRG \
SAM_PINMUX(a, 11, b, periph)
/* pa11x_supc_wkup6 */
#define PA11X_SUPC_WKUP6 \
SAM_PINMUX(a, 11, wkup6, wakeup)
/* pa12_gpio */
#define PA12_GPIO \
SAM_PINMUX(a, 12, gpio, gpio)
/* pa12a_usart1_rxd */
#define PA12A_USART1_RXD \
SAM_PINMUX(a, 12, a, periph)
/* pa12b_pwm_pwml1 */
#define PA12B_PWM_PWML1 \
SAM_PINMUX(a, 12, b, periph)
/* pa12x_supc_wkup7 */
#define PA12X_SUPC_WKUP7 \
SAM_PINMUX(a, 12, wkup7, wakeup)
/* pa13_gpio */
#define PA13_GPIO \
SAM_PINMUX(a, 13, gpio, gpio)
/* pa13a_usart1_txd */
#define PA13A_USART1_TXD \
SAM_PINMUX(a, 13, a, periph)
/* pa13b_pwm_pwmh2 */
#define PA13B_PWM_PWMH2 \
SAM_PINMUX(a, 13, b, periph)
/* pa14_gpio */
#define PA14_GPIO \
SAM_PINMUX(a, 14, gpio, gpio)
/* pa14a_usart1_rts */
#define PA14A_USART1_RTS \
SAM_PINMUX(a, 14, a, periph)
/* pa14b_ssc_tk */
#define PA14B_SSC_TK \
SAM_PINMUX(a, 14, b, periph)
/* pa15_gpio */
#define PA15_GPIO \
SAM_PINMUX(a, 15, gpio, gpio)
/* pa15a_usart1_cts */
#define PA15A_USART1_CTS \
SAM_PINMUX(a, 15, a, periph)
/* pa15b_ssc_tf */
#define PA15B_SSC_TF \
SAM_PINMUX(a, 15, b, periph)
/* pa15x_supc_wkup8 */
#define PA15X_SUPC_WKUP8 \
SAM_PINMUX(a, 15, wkup8, wakeup)
/* pa16_gpio */
#define PA16_GPIO \
SAM_PINMUX(a, 16, gpio, gpio)
/* pa16a_spi1_spck1 */
#define PA16A_SPI1_SPCK1 \
SAM_PINMUX(a, 16, a, periph)
/* pa16b_ssc_td */
#define PA16B_SSC_TD \
SAM_PINMUX(a, 16, b, periph)
/* pa16x_adc_ad7 */
#define PA16X_ADC_AD7 \
SAM_PINMUX(a, 16, x, extra)
/* pa17_gpio */
#define PA17_GPIO \
SAM_PINMUX(a, 17, gpio, gpio)
/* pa17a_twi0_twd */
#define PA17A_TWI0_TWD \
SAM_PINMUX(a, 17, a, periph)
/* pa17b_spi0_spck0 */
#define PA17B_SPI0_SPCK0 \
SAM_PINMUX(a, 17, b, periph)
/* pa18_gpio */
#define PA18_GPIO \
SAM_PINMUX(a, 18, gpio, gpio)
/* pa18a_twi0_twck */
#define PA18A_TWI0_TWCK \
SAM_PINMUX(a, 18, a, periph)
/* pa18b_ebi_a20 */
#define PA18B_EBI_A20 \
SAM_PINMUX(a, 18, b, periph)
/* pa18x_supc_wkup9 */
#define PA18X_SUPC_WKUP9 \
SAM_PINMUX(a, 18, wkup9, wakeup)
/* pa19_gpio */
#define PA19_GPIO \
SAM_PINMUX(a, 19, gpio, gpio)
/* pa19a_hsmci_mcck */
#define PA19A_HSMCI_MCCK \
SAM_PINMUX(a, 19, a, periph)
/* pa19b_pwm_pwmh1 */
#define PA19B_PWM_PWMH1 \
SAM_PINMUX(a, 19, b, periph)
/* pa20_gpio */
#define PA20_GPIO \
SAM_PINMUX(a, 20, gpio, gpio)
/* pa20a_hsmci_mccda */
#define PA20A_HSMCI_MCCDA \
SAM_PINMUX(a, 20, a, periph)
/* pa20b_pwm_pwml2 */
#define PA20B_PWM_PWML2 \
SAM_PINMUX(a, 20, b, periph)
/* pa21_gpio */
#define PA21_GPIO \
SAM_PINMUX(a, 21, gpio, gpio)
/* pa21a_hsmci_mcda0 */
#define PA21A_HSMCI_MCDA0 \
SAM_PINMUX(a, 21, a, periph)
/* pa21b_pwm_pwml0 */
#define PA21B_PWM_PWML0 \
SAM_PINMUX(a, 21, b, periph)
/* pa22_gpio */
#define PA22_GPIO \
SAM_PINMUX(a, 22, gpio, gpio)
/* pa22a_hsmci_mcda1 */
#define PA22A_HSMCI_MCDA1 \
SAM_PINMUX(a, 22, a, periph)
/* pa22b_tc1_tclk3 */
#define PA22B_TC1_TCLK3 \
SAM_PINMUX(a, 22, b, periph)
/* pa22x_adc_ad4 */
#define PA22X_ADC_AD4 \
SAM_PINMUX(a, 22, x, extra)
/* pa23_gpio */
#define PA23_GPIO \
SAM_PINMUX(a, 23, gpio, gpio)
/* pa23a_hsmci_mcda2 */
#define PA23A_HSMCI_MCDA2 \
SAM_PINMUX(a, 23, a, periph)
/* pa23b_tc1_tclk4 */
#define PA23B_TC1_TCLK4 \
SAM_PINMUX(a, 23, b, periph)
/* pa23x_adc_ad5 */
#define PA23X_ADC_AD5 \
SAM_PINMUX(a, 23, x, extra)
/* pa24_gpio */
#define PA24_GPIO \
SAM_PINMUX(a, 24, gpio, gpio)
/* pa24a_hsmci_mcda3 */
#define PA24A_HSMCI_MCDA3 \
SAM_PINMUX(a, 24, a, periph)
/* pa24b_pmc_pck1 */
#define PA24B_PMC_PCK1 \
SAM_PINMUX(a, 24, b, periph)
/* pa24x_adc_ad6 */
#define PA24X_ADC_AD6 \
SAM_PINMUX(a, 24, x, extra)
/* pa25_gpio */
#define PA25_GPIO \
SAM_PINMUX(a, 25, gpio, gpio)
/* pa25a_spi0_miso */
#define PA25A_SPI0_MISO \
SAM_PINMUX(a, 25, a, periph)
/* pa25b_ebi_a18 */
#define PA25B_EBI_A18 \
SAM_PINMUX(a, 25, b, periph)
/* pa26_gpio */
#define PA26_GPIO \
SAM_PINMUX(a, 26, gpio, gpio)
/* pa26a_spi0_mosi */
#define PA26A_SPI0_MOSI \
SAM_PINMUX(a, 26, a, periph)
/* pa26b_ebi_a19 */
#define PA26B_EBI_A19 \
SAM_PINMUX(a, 26, b, periph)
/* pa27_gpio */
#define PA27_GPIO \
SAM_PINMUX(a, 27, gpio, gpio)
/* pa27a_spi0_spck */
#define PA27A_SPI0_SPCK \
SAM_PINMUX(a, 27, a, periph)
/* pa27b_ebi_a20 */
#define PA27B_EBI_A20 \
SAM_PINMUX(a, 27, b, periph)
/* pa27x_supc_wkup10 */
#define PA27X_SUPC_WKUP10 \
SAM_PINMUX(a, 27, wkup10, wakeup)
/* pa28_gpio */
#define PA28_GPIO \
SAM_PINMUX(a, 28, gpio, gpio)
/* pa28a_spi0_npcs0 */
#define PA28A_SPI0_NPCS0 \
SAM_PINMUX(a, 28, a, periph)
/* pa28b_pmc_pck2 */
#define PA28B_PMC_PCK2 \
SAM_PINMUX(a, 28, b, periph)
/* pa28x_supc_wkup11 */
#define PA28X_SUPC_WKUP11 \
SAM_PINMUX(a, 28, wkup11, wakeup)
/* pa29_gpio */
#define PA29_GPIO \
SAM_PINMUX(a, 29, gpio, gpio)
/* pa29a_spi0_npcs1 */
#define PA29A_SPI0_NPCS1 \
SAM_PINMUX(a, 29, a, periph)
/* pa29b_ebi_nrd */
#define PA29B_EBI_NRD \
SAM_PINMUX(a, 29, b, periph)
/* pa30_gpio */
#define PA30_GPIO \
SAM_PINMUX(a, 30, gpio, gpio)
/* pa30a_spi0_npcs2 */
#define PA30A_SPI0_NPCS2 \
SAM_PINMUX(a, 30, a, periph)
/* pa30b_pmc_pck1 */
#define PA30B_PMC_PCK1 \
SAM_PINMUX(a, 30, b, periph)
/* pa31_gpio */
#define PA31_GPIO \
SAM_PINMUX(a, 31, gpio, gpio)
/* pa31a_spi_npcs3 */
#define PA31A_SPI_NPCS3 \
SAM_PINMUX(a, 31, a, periph)
/* pa31b_pmc_pck2 */
#define PA31B_PMC_PCK2 \
SAM_PINMUX(a, 31, b, periph)
/* pb0_gpio */
#define PB0_GPIO \
SAM_PINMUX(b, 0, gpio, gpio)
/* pb0a_emac_etxck_erefck */
#define PB0A_EMAC_ETXCK_EREFCK \
SAM_PINMUX(b, 0, a, periph)
/* pb0b_tc1_tioa3 */
#define PB0B_TC1_TIOA3 \
SAM_PINMUX(b, 0, b, periph)
/* pb1_gpio */
#define PB1_GPIO \
SAM_PINMUX(b, 1, gpio, gpio)
/* pb1a_emac_etxen */
#define PB1A_EMAC_ETXEN \
SAM_PINMUX(b, 1, a, periph)
/* pb1b_tc1_tiob3 */
#define PB1B_TC1_TIOB3 \
SAM_PINMUX(b, 1, b, periph)
/* pb2_gpio */
#define PB2_GPIO \
SAM_PINMUX(b, 2, gpio, gpio)
/* pb2a_emac_etx0 */
#define PB2A_EMAC_ETX0 \
SAM_PINMUX(b, 2, a, periph)
/* pb2b_tc1_tioa4 */
#define PB2B_TC1_TIOA4 \
SAM_PINMUX(b, 2, b, periph)
/* pb3_gpio */
#define PB3_GPIO \
SAM_PINMUX(b, 3, gpio, gpio)
/* pb3a_emac_etx1 */
#define PB3A_EMAC_ETX1 \
SAM_PINMUX(b, 3, a, periph)
/* pb3b_tc1_tiob4 */
#define PB3B_TC1_TIOB4 \
SAM_PINMUX(b, 3, b, periph)
/* pb4_gpio */
#define PB4_GPIO \
SAM_PINMUX(b, 4, gpio, gpio)
/* pb4a_emac_ecrsdv_erxdv */
#define PB4A_EMAC_ECRSDV_ERXDV \
SAM_PINMUX(b, 4, a, periph)
/* pb4b_tc1_tioa5 */
#define PB4B_TC1_TIOA5 \
SAM_PINMUX(b, 4, b, periph)
/* pb5_gpio */
#define PB5_GPIO \
SAM_PINMUX(b, 5, gpio, gpio)
/* pb5a_emac_erx0 */
#define PB5A_EMAC_ERX0 \
SAM_PINMUX(b, 5, a, periph)
/* pb5b_tc1_tiob5 */
#define PB5B_TC1_TIOB5 \
SAM_PINMUX(b, 5, b, periph)
/* pb6_gpio */
#define PB6_GPIO \
SAM_PINMUX(b, 6, gpio, gpio)
/* pb6a_emac_erx1 */
#define PB6A_EMAC_ERX1 \
SAM_PINMUX(b, 6, a, periph)
/* pb6b_pwm_pwml4 */
#define PB6B_PWM_PWML4 \
SAM_PINMUX(b, 6, b, periph)
/* pb7_gpio */
#define PB7_GPIO \
SAM_PINMUX(b, 7, gpio, gpio)
/* pb7a_emac_erxer */
#define PB7A_EMAC_ERXER \
SAM_PINMUX(b, 7, a, periph)
/* pb7b_pwm_pwml5 */
#define PB7B_PWM_PWML5 \
SAM_PINMUX(b, 7, b, periph)
/* pb8_gpio */
#define PB8_GPIO \
SAM_PINMUX(b, 8, gpio, gpio)
/* pb8a_emac_emdc */
#define PB8A_EMAC_EMDC \
SAM_PINMUX(b, 8, a, periph)
/* pb8b_pwm_pwml6 */
#define PB8B_PWM_PWML6 \
SAM_PINMUX(b, 8, b, periph)
/* pb9_gpio */
#define PB9_GPIO \
SAM_PINMUX(b, 9, gpio, gpio)
/* pb9a_emac_emdio */
#define PB9A_EMAC_EMDIO \
SAM_PINMUX(b, 9, a, periph)
/* pb9b_pwm_pwml7 */
#define PB9B_PWM_PWML7 \
SAM_PINMUX(b, 9, b, periph)
/* pb10_gpio */
#define PB10_GPIO \
SAM_PINMUX(b, 10, gpio, gpio)
/* pb10a_uotg_vbof */
#define PB10A_UOTG_VBOF \
SAM_PINMUX(b, 10, a, periph)
/* pb10b_ebi_a18 */
#define PB10B_EBI_A18 \
SAM_PINMUX(b, 10, b, periph)
/* pb11_gpio */
#define PB11_GPIO \
SAM_PINMUX(b, 11, gpio, gpio)
/* pb11a_uotg_id */
#define PB11A_UOTG_ID \
SAM_PINMUX(b, 11, a, periph)
/* pb11b_ebi_a19 */
#define PB11B_EBI_A19 \
SAM_PINMUX(b, 11, b, periph)
/* pb12_gpio */
#define PB12_GPIO \
SAM_PINMUX(b, 12, gpio, gpio)
/* pb12a_twi1_twd */
#define PB12A_TWI1_TWD \
SAM_PINMUX(b, 12, a, periph)
/* pb12b_pwm_pwmh0 */
#define PB12B_PWM_PWMH0 \
SAM_PINMUX(b, 12, b, periph)
/* pb12x_adc_ad8 */
#define PB12X_ADC_AD8 \
SAM_PINMUX(b, 12, x, extra)
/* pb13_gpio */
#define PB13_GPIO \
SAM_PINMUX(b, 13, gpio, gpio)
/* pb13a_twi1_twck */
#define PB13A_TWI1_TWCK \
SAM_PINMUX(b, 13, a, periph)
/* pb13b_pwm_pwmh1 */
#define PB13B_PWM_PWMH1 \
SAM_PINMUX(b, 13, b, periph)
/* pb13x_adc_ad9 */
#define PB13X_ADC_AD9 \
SAM_PINMUX(b, 13, x, extra)
/* pb14_gpio */
#define PB14_GPIO \
SAM_PINMUX(b, 14, gpio, gpio)
/* pb14a_can1_tx */
#define PB14A_CAN1_TX \
SAM_PINMUX(b, 14, a, periph)
/* pb14b_pwm_pwmh2 */
#define PB14B_PWM_PWMH2 \
SAM_PINMUX(b, 14, b, periph)
/* pb15_gpio */
#define PB15_GPIO \
SAM_PINMUX(b, 15, gpio, gpio)
/* pb15a_can1_rx */
#define PB15A_CAN1_RX \
SAM_PINMUX(b, 15, a, periph)
/* pb15b_pwm_pwmh3 */
#define PB15B_PWM_PWMH3 \
SAM_PINMUX(b, 15, b, periph)
/* pb15x_dacc_dac0 */
#define PB15X_DACC_DAC0 \
SAM_PINMUX(b, 15, x, extra)
/* pb15x_supc_wkup10 */
#define PB15X_SUPC_WKUP10 \
SAM_PINMUX(b, 15, wkup10, wakeup)
/* pb16_gpio */
#define PB16_GPIO \
SAM_PINMUX(b, 16, gpio, gpio)
/* pb16a_tc1_tclk5 */
#define PB16A_TC1_TCLK5 \
SAM_PINMUX(b, 16, a, periph)
/* pb16b_pwm_pwml0 */
#define PB16B_PWM_PWML0 \
SAM_PINMUX(b, 16, b, periph)
/* pb16x_dacc_dac1 */
#define PB16X_DACC_DAC1 \
SAM_PINMUX(b, 16, x, extra)
/* pb17_gpio */
#define PB17_GPIO \
SAM_PINMUX(b, 17, gpio, gpio)
/* pb17a_ssc_rf */
#define PB17A_SSC_RF \
SAM_PINMUX(b, 17, a, periph)
/* pb17b_pwm_pwml1 */
#define PB17B_PWM_PWML1 \
SAM_PINMUX(b, 17, b, periph)
/* pb17x_adc_ad10 */
#define PB17X_ADC_AD10 \
SAM_PINMUX(b, 17, x, extra)
/* pb18_gpio */
#define PB18_GPIO \
SAM_PINMUX(b, 18, gpio, gpio)
/* pb18a_ssc_rd */
#define PB18A_SSC_RD \
SAM_PINMUX(b, 18, a, periph)
/* pb18b_pwm_pwml2 */
#define PB18B_PWM_PWML2 \
SAM_PINMUX(b, 18, b, periph)
/* pb18x_adc_ad11 */
#define PB18X_ADC_AD11 \
SAM_PINMUX(b, 18, x, extra)
/* pb19_gpio */
#define PB19_GPIO \
SAM_PINMUX(b, 19, gpio, gpio)
/* pb19a_ssc_rk */
#define PB19A_SSC_RK \
SAM_PINMUX(b, 19, a, periph)
/* pb19b_pwm_pwml3 */
#define PB19B_PWM_PWML3 \
SAM_PINMUX(b, 19, b, periph)
/* pb19x_adc_ad12 */
#define PB19X_ADC_AD12 \
SAM_PINMUX(b, 19, x, extra)
/* pb20_gpio */
#define PB20_GPIO \
SAM_PINMUX(b, 20, gpio, gpio)
/* pb20a_usart2_txd */
#define PB20A_USART2_TXD \
SAM_PINMUX(b, 20, a, periph)
/* pb20b_spi0_npcs1 */
#define PB20B_SPI0_NPCS1 \
SAM_PINMUX(b, 20, b, periph)
/* pb20x_adc_ad13 */
#define PB20X_ADC_AD13 \
SAM_PINMUX(b, 20, x, extra)
/* pb21_gpio */
#define PB21_GPIO \
SAM_PINMUX(b, 21, gpio, gpio)
/* pb21a_usart2_rxd */
#define PB21A_USART2_RXD \
SAM_PINMUX(b, 21, a, periph)
/* pb21b_spi0_npcs2 */
#define PB21B_SPI0_NPCS2 \
SAM_PINMUX(b, 21, b, periph)
/* pb21x_adc_ad14 */
#define PB21X_ADC_AD14 \
SAM_PINMUX(b, 21, x, extra)
/* pb21x_supc_wkup13 */
#define PB21X_SUPC_WKUP13 \
SAM_PINMUX(b, 21, wkup13, wakeup)
/* pb22_gpio */
#define PB22_GPIO \
SAM_PINMUX(b, 22, gpio, gpio)
/* pb22a_usart2_rts */
#define PB22A_USART2_RTS \
SAM_PINMUX(b, 22, a, periph)
/* pb22b_pmc_pck0 */
#define PB22B_PMC_PCK0 \
SAM_PINMUX(b, 22, b, periph)
/* pb23_gpio */
#define PB23_GPIO \
SAM_PINMUX(b, 23, gpio, gpio)
/* pb23a_usart2_cts */
#define PB23A_USART2_CTS \
SAM_PINMUX(b, 23, a, periph)
/* pb23b_spi0_npcs3 */
#define PB23B_SPI0_NPCS3 \
SAM_PINMUX(b, 23, b, periph)
/* pb23x_supc_wkup14 */
#define PB23X_SUPC_WKUP14 \
SAM_PINMUX(b, 23, wkup14, wakeup)
/* pb24_gpio */
#define PB24_GPIO \
SAM_PINMUX(b, 24, gpio, gpio)
/* pb24a_usart2_sck */
#define PB24A_USART2_SCK \
SAM_PINMUX(b, 24, a, periph)
/* pb24b_ebi_ncs2 */
#define PB24B_EBI_NCS2 \
SAM_PINMUX(b, 24, b, periph)
/* pb25_gpio */
#define PB25_GPIO \
SAM_PINMUX(b, 25, gpio, gpio)
/* pb25a_usart0_rts */
#define PB25A_USART0_RTS \
SAM_PINMUX(b, 25, a, periph)
/* pb25b_tc0_tioa0 */
#define PB25B_TC0_TIOA0 \
SAM_PINMUX(b, 25, b, periph)
/* pb26_gpio */
#define PB26_GPIO \
SAM_PINMUX(b, 26, gpio, gpio)
/* pb26a_usart0_cts */
#define PB26A_USART0_CTS \
SAM_PINMUX(b, 26, a, periph)
/* pb26b_tc0_tclk0 */
#define PB26B_TC0_TCLK0 \
SAM_PINMUX(b, 26, b, periph)
/* pb26x_supc_wkup15 */
#define PB26X_SUPC_WKUP15 \
SAM_PINMUX(b, 26, wkup15, wakeup)
/* pb27_gpio */
#define PB27_GPIO \
SAM_PINMUX(b, 27, gpio, gpio)
/* pb27a_ebi_ncs3 */
#define PB27A_EBI_NCS3 \
SAM_PINMUX(b, 27, a, periph)
/* pb27b_tc0_tiob0 */
#define PB27B_TC0_TIOB0 \
SAM_PINMUX(b, 27, b, periph)
/* pb28_gpio */
#define PB28_GPIO \
SAM_PINMUX(b, 28, gpio, gpio)
/* pb29_gpio */
#define PB29_GPIO \
SAM_PINMUX(b, 29, gpio, gpio)
/* pb30_gpio */
#define PB30_GPIO \
SAM_PINMUX(b, 30, gpio, gpio)
/* pb31_gpio */
#define PB31_GPIO \
SAM_PINMUX(b, 31, gpio, gpio)
/* pc0_gpio */
#define PC0_GPIO \
SAM_PINMUX(c, 0, gpio, gpio)
/* pc0x_flash_erase */
#define PC0X_FLASH_ERASE \
SAM_PINMUX(c, 0, x, extra)
/* pc1_gpio */
#define PC1_GPIO \
SAM_PINMUX(c, 1, gpio, gpio)
/* pc2_gpio */
#define PC2_GPIO \
SAM_PINMUX(c, 2, gpio, gpio)
/* pc2a_ebi_d0 */
#define PC2A_EBI_D0 \
SAM_PINMUX(c, 2, a, periph)
/* pc2b_pwm_pwml0 */
#define PC2B_PWM_PWML0 \
SAM_PINMUX(c, 2, b, periph)
/* pc3_gpio */
#define PC3_GPIO \
SAM_PINMUX(c, 3, gpio, gpio)
/* pc3a_ebi_d1 */
#define PC3A_EBI_D1 \
SAM_PINMUX(c, 3, a, periph)
/* pc3b_pwm_pwmh0 */
#define PC3B_PWM_PWMH0 \
SAM_PINMUX(c, 3, b, periph)
/* pc4_gpio */
#define PC4_GPIO \
SAM_PINMUX(c, 4, gpio, gpio)
/* pc4a_ebi_d2 */
#define PC4A_EBI_D2 \
SAM_PINMUX(c, 4, a, periph)
/* pc4b_pwm_pwml1 */
#define PC4B_PWM_PWML1 \
SAM_PINMUX(c, 4, b, periph)
/* pc5_gpio */
#define PC5_GPIO \
SAM_PINMUX(c, 5, gpio, gpio)
/* pc5a_ebi_d3 */
#define PC5A_EBI_D3 \
SAM_PINMUX(c, 5, a, periph)
/* pc5b_pwm_pwmh1 */
#define PC5B_PWM_PWMH1 \
SAM_PINMUX(c, 5, b, periph)
/* pc6_gpio */
#define PC6_GPIO \
SAM_PINMUX(c, 6, gpio, gpio)
/* pc6a_ebi_d4 */
#define PC6A_EBI_D4 \
SAM_PINMUX(c, 6, a, periph)
/* pc6b_pwm_pwml2 */
#define PC6B_PWM_PWML2 \
SAM_PINMUX(c, 6, b, periph)
/* pc7_gpio */
#define PC7_GPIO \
SAM_PINMUX(c, 7, gpio, gpio)
/* pc7a_ebi_d5 */
#define PC7A_EBI_D5 \
SAM_PINMUX(c, 7, a, periph)
/* pc7b_pwm_pwmh2 */
#define PC7B_PWM_PWMH2 \
SAM_PINMUX(c, 7, b, periph)
/* pc8_gpio */
#define PC8_GPIO \
SAM_PINMUX(c, 8, gpio, gpio)
/* pc8a_ebi_d6 */
#define PC8A_EBI_D6 \
SAM_PINMUX(c, 8, a, periph)
/* pc8b_pwm_pwml3 */
#define PC8B_PWM_PWML3 \
SAM_PINMUX(c, 8, b, periph)
/* pc9_gpio */
#define PC9_GPIO \
SAM_PINMUX(c, 9, gpio, gpio)
/* pc9a_ebi_d7 */
#define PC9A_EBI_D7 \
SAM_PINMUX(c, 9, a, periph)
/* pc9b_pwm_pwmh3 */
#define PC9B_PWM_PWMH3 \
SAM_PINMUX(c, 9, b, periph)
/* pc10_gpio */
#define PC10_GPIO \
SAM_PINMUX(c, 10, gpio, gpio)
/* pc10a_ebi_d8 */
#define PC10A_EBI_D8 \
SAM_PINMUX(c, 10, a, periph)
/* pc10b_emac_ecrs */
#define PC10B_EMAC_ECRS \
SAM_PINMUX(c, 10, b, periph)
/* pc11_gpio */
#define PC11_GPIO \
SAM_PINMUX(c, 11, gpio, gpio)
/* pc11a_ebi_d9 */
#define PC11A_EBI_D9 \
SAM_PINMUX(c, 11, a, periph)
/* pc11b_emac_erx2 */
#define PC11B_EMAC_ERX2 \
SAM_PINMUX(c, 11, b, periph)
/* pc12_gpio */
#define PC12_GPIO \
SAM_PINMUX(c, 12, gpio, gpio)
/* pc12a_ebi_d10 */
#define PC12A_EBI_D10 \
SAM_PINMUX(c, 12, a, periph)
/* pc12b_emac_erx3 */
#define PC12B_EMAC_ERX3 \
SAM_PINMUX(c, 12, b, periph)
/* pc13_gpio */
#define PC13_GPIO \
SAM_PINMUX(c, 13, gpio, gpio)
/* pc13a_ebi_d11 */
#define PC13A_EBI_D11 \
SAM_PINMUX(c, 13, a, periph)
/* pc13b_emac_ecol */
#define PC13B_EMAC_ECOL \
SAM_PINMUX(c, 13, b, periph)
/* pc14_gpio */
#define PC14_GPIO \
SAM_PINMUX(c, 14, gpio, gpio)
/* pc14a_ebi_d12 */
#define PC14A_EBI_D12 \
SAM_PINMUX(c, 14, a, periph)
/* pc14b_emac_erxck */
#define PC14B_EMAC_ERXCK \
SAM_PINMUX(c, 14, b, periph)
/* pc15_gpio */
#define PC15_GPIO \
SAM_PINMUX(c, 15, gpio, gpio)
/* pc15a_ebi_d13 */
#define PC15A_EBI_D13 \
SAM_PINMUX(c, 15, a, periph)
/* pc15b_emac_etx2 */
#define PC15B_EMAC_ETX2 \
SAM_PINMUX(c, 15, b, periph)
/* pc16_gpio */
#define PC16_GPIO \
SAM_PINMUX(c, 16, gpio, gpio)
/* pc16a_ebi_d14 */
#define PC16A_EBI_D14 \
SAM_PINMUX(c, 16, a, periph)
/* pc16b_emac_etx3 */
#define PC16B_EMAC_ETX3 \
SAM_PINMUX(c, 16, b, periph)
/* pc17_gpio */
#define PC17_GPIO \
SAM_PINMUX(c, 17, gpio, gpio)
/* pc17a_ebi_d15 */
#define PC17A_EBI_D15 \
SAM_PINMUX(c, 17, a, periph)
/* pc17b_emac_etxer */
#define PC17B_EMAC_ETXER \
SAM_PINMUX(c, 17, b, periph)
/* pc18_gpio */
#define PC18_GPIO \
SAM_PINMUX(c, 18, gpio, gpio)
/* pc18a_ebi_nwr0_nwe */
#define PC18A_EBI_NWR0_NWE \
SAM_PINMUX(c, 18, a, periph)
/* pc18b_pwm_pwmh6 */
#define PC18B_PWM_PWMH6 \
SAM_PINMUX(c, 18, b, periph)
/* pc19_gpio */
#define PC19_GPIO \
SAM_PINMUX(c, 19, gpio, gpio)
/* pc19a_ebi_nandoe */
#define PC19A_EBI_NANDOE \
SAM_PINMUX(c, 19, a, periph)
/* pc19b_pwm_pwmh5 */
#define PC19B_PWM_PWMH5 \
SAM_PINMUX(c, 19, b, periph)
/* pc20_gpio */
#define PC20_GPIO \
SAM_PINMUX(c, 20, gpio, gpio)
/* pc20a_ebi_nandwe */
#define PC20A_EBI_NANDWE \
SAM_PINMUX(c, 20, a, periph)
/* pc20b_pwm_pwmh4 */
#define PC20B_PWM_PWMH4 \
SAM_PINMUX(c, 20, b, periph)
/* pc21_gpio */
#define PC21_GPIO \
SAM_PINMUX(c, 21, gpio, gpio)
/* pc21a_ebi_a0_nbs0 */
#define PC21A_EBI_A0_NBS0 \
SAM_PINMUX(c, 21, a, periph)
/* pc21b_pwm_pwml4 */
#define PC21B_PWM_PWML4 \
SAM_PINMUX(c, 21, b, periph)
/* pc22_gpio */
#define PC22_GPIO \
SAM_PINMUX(c, 22, gpio, gpio)
/* pc22a_ebi_a1 */
#define PC22A_EBI_A1 \
SAM_PINMUX(c, 22, a, periph)
/* pc22b_pwm_pwml5 */
#define PC22B_PWM_PWML5 \
SAM_PINMUX(c, 22, b, periph)
/* pc23_gpio */
#define PC23_GPIO \
SAM_PINMUX(c, 23, gpio, gpio)
/* pc23a_ebi_a2 */
#define PC23A_EBI_A2 \
SAM_PINMUX(c, 23, a, periph)
/* pc23b_pwm_pwml6 */
#define PC23B_PWM_PWML6 \
SAM_PINMUX(c, 23, b, periph)
/* pc24_gpio */
#define PC24_GPIO \
SAM_PINMUX(c, 24, gpio, gpio)
/* pc24a_ebi_a3 */
#define PC24A_EBI_A3 \
SAM_PINMUX(c, 24, a, periph)
/* pc24b_pwm_pwml7 */
#define PC24B_PWM_PWML7 \
SAM_PINMUX(c, 24, b, periph)
/* pc25_gpio */
#define PC25_GPIO \
SAM_PINMUX(c, 25, gpio, gpio)
/* pc25a_ebi_a4 */
#define PC25A_EBI_A4 \
SAM_PINMUX(c, 25, a, periph)
/* pc25b_tc2_tioa6 */
#define PC25B_TC2_TIOA6 \
SAM_PINMUX(c, 25, b, periph)
/* pc26_gpio */
#define PC26_GPIO \
SAM_PINMUX(c, 26, gpio, gpio)
/* pc26a_ebi_a5 */
#define PC26A_EBI_A5 \
SAM_PINMUX(c, 26, a, periph)
/* pc26b_tc2_tiob6 */
#define PC26B_TC2_TIOB6 \
SAM_PINMUX(c, 26, b, periph)
/* pc27_gpio */
#define PC27_GPIO \
SAM_PINMUX(c, 27, gpio, gpio)
/* pc27a_ebi_a6 */
#define PC27A_EBI_A6 \
SAM_PINMUX(c, 27, a, periph)
/* pc27b_tc2_tclk6 */
#define PC27B_TC2_TCLK6 \
SAM_PINMUX(c, 27, b, periph)
/* pc28_gpio */
#define PC28_GPIO \
SAM_PINMUX(c, 28, gpio, gpio)
/* pc28a_ebi_a7 */
#define PC28A_EBI_A7 \
SAM_PINMUX(c, 28, a, periph)
/* pc28b_tc2_tioa7 */
#define PC28B_TC2_TIOA7 \
SAM_PINMUX(c, 28, b, periph)
/* pc29_gpio */
#define PC29_GPIO \
SAM_PINMUX(c, 29, gpio, gpio)
/* pc29a_ebi_a8 */
#define PC29A_EBI_A8 \
SAM_PINMUX(c, 29, a, periph)
/* pc29b_tc2_tiob7 */
#define PC29B_TC2_TIOB7 \
SAM_PINMUX(c, 29, b, periph)
/* pc30_gpio */
#define PC30_GPIO \
SAM_PINMUX(c, 30, gpio, gpio)
/* pc30a_ebi_a9 */
#define PC30A_EBI_A9 \
SAM_PINMUX(c, 30, a, periph)
/* pc30b_tc2_tclk7 */
#define PC30B_TC2_TCLK7 \
SAM_PINMUX(c, 30, b, periph)
/* pd0_gpio */
#define PD0_GPIO \
SAM_PINMUX(d, 0, gpio, gpio)
/* pd0a_ebi_a10 */
#define PD0A_EBI_A10 \
SAM_PINMUX(d, 0, a, periph)
/* pd0b_hsmci_mcda4 */
#define PD0B_HSMCI_MCDA4 \
SAM_PINMUX(d, 0, b, periph)
/* pd1_gpio */
#define PD1_GPIO \
SAM_PINMUX(d, 1, gpio, gpio)
/* pd1a_ebi_a11 */
#define PD1A_EBI_A11 \
SAM_PINMUX(d, 1, a, periph)
/* pd1b_hsmci_mcda5 */
#define PD1B_HSMCI_MCDA5 \
SAM_PINMUX(d, 1, b, periph)
/* pd2_gpio */
#define PD2_GPIO \
SAM_PINMUX(d, 2, gpio, gpio)
/* pd2a_ebi_a12 */
#define PD2A_EBI_A12 \
SAM_PINMUX(d, 2, a, periph)
/* pd2b_hsmci_mcda6 */
#define PD2B_HSMCI_MCDA6 \
SAM_PINMUX(d, 2, b, periph)
/* pd3_gpio */
#define PD3_GPIO \
SAM_PINMUX(d, 3, gpio, gpio)
/* pd3a_ebi_a13 */
#define PD3A_EBI_A13 \
SAM_PINMUX(d, 3, a, periph)
/* pd3b_hsmci_mcda7 */
#define PD3B_HSMCI_MCDA7 \
SAM_PINMUX(d, 3, b, periph)
/* pd4_gpio */
#define PD4_GPIO \
SAM_PINMUX(d, 4, gpio, gpio)
/* pd4a_ebi_a14 */
#define PD4A_EBI_A14 \
SAM_PINMUX(d, 4, a, periph)
/* pd4b_usart3_txd */
#define PD4B_USART3_TXD \
SAM_PINMUX(d, 4, b, periph)
/* pd5_gpio */
#define PD5_GPIO \
SAM_PINMUX(d, 5, gpio, gpio)
/* pd5a_ebi_a15 */
#define PD5A_EBI_A15 \
SAM_PINMUX(d, 5, a, periph)
/* pd5b_usart3_rxd */
#define PD5B_USART3_RXD \
SAM_PINMUX(d, 5, b, periph)
/* pd6_gpio */
#define PD6_GPIO \
SAM_PINMUX(d, 6, gpio, gpio)
/* pd6a_ebi_a16_ba0 */
#define PD6A_EBI_A16_BA0 \
SAM_PINMUX(d, 6, a, periph)
/* pd6b_pwm_pwmfi2 */
#define PD6B_PWM_PWMFI2 \
SAM_PINMUX(d, 6, b, periph)
/* pd7_gpio */
#define PD7_GPIO \
SAM_PINMUX(d, 7, gpio, gpio)
/* pd7a_ebi_a17_ba1 */
#define PD7A_EBI_A17_BA1 \
SAM_PINMUX(d, 7, a, periph)
/* pd7b_tc2_tioa8 */
#define PD7B_TC2_TIOA8 \
SAM_PINMUX(d, 7, b, periph)
/* pd8_gpio */
#define PD8_GPIO \
SAM_PINMUX(d, 8, gpio, gpio)
/* pd8a_ebi_a21_nandale */
#define PD8A_EBI_A21_NANDALE \
SAM_PINMUX(d, 8, a, periph)
/* pd8b_tc2_tiob8 */
#define PD8B_TC2_TIOB8 \
SAM_PINMUX(d, 8, b, periph)
/* pd9_gpio */
#define PD9_GPIO \
SAM_PINMUX(d, 9, gpio, gpio)
/* pd9a_ebi_a22_nandcle */
#define PD9A_EBI_A22_NANDCLE \
SAM_PINMUX(d, 9, a, periph)
/* pd9b_tc2_tclk9 */
#define PD9B_TC2_TCLK9 \
SAM_PINMUX(d, 9, b, periph)
/* pd10_gpio */
#define PD10_GPIO \
SAM_PINMUX(d, 10, gpio, gpio)
/* pd10a_ebi_nwr1_nbs1 */
#define PD10A_EBI_NWR1_NBS1 \
SAM_PINMUX(d, 10, a, periph)
/* pd11_gpio */
#define PD11_GPIO \
SAM_PINMUX(d, 11, gpio, gpio)
/* pd11a_ebi_sda10 */
#define PD11A_EBI_SDA10 \
SAM_PINMUX(d, 11, a, periph)
/* pd12_gpio */
#define PD12_GPIO \
SAM_PINMUX(d, 12, gpio, gpio)
/* pd12a_ebi_sdcs */
#define PD12A_EBI_SDCS \
SAM_PINMUX(d, 12, a, periph)
/* pd13_gpio */
#define PD13_GPIO \
SAM_PINMUX(d, 13, gpio, gpio)
/* pd13a_ebi_sdcke */
#define PD13A_EBI_SDCKE \
SAM_PINMUX(d, 13, a, periph)
/* pd14_gpio */
#define PD14_GPIO \
SAM_PINMUX(d, 14, gpio, gpio)
/* pd14a_ebi_sdwe */
#define PD14A_EBI_SDWE \
SAM_PINMUX(d, 14, a, periph)
/* pd15_gpio */
#define PD15_GPIO \
SAM_PINMUX(d, 15, gpio, gpio)
/* pd15a_ebi_ras */
#define PD15A_EBI_RAS \
SAM_PINMUX(d, 15, a, periph)
/* pd16_gpio */
#define PD16_GPIO \
SAM_PINMUX(d, 16, gpio, gpio)
/* pd16a_ebi_cas */
#define PD16A_EBI_CAS \
SAM_PINMUX(d, 16, a, periph)
/* pd17_gpio */
#define PD17_GPIO \
SAM_PINMUX(d, 17, gpio, gpio)
/* pd17a_ebi_a5 */
#define PD17A_EBI_A5 \
SAM_PINMUX(d, 17, a, periph)
/* pd18_gpio */
#define PD18_GPIO \
SAM_PINMUX(d, 18, gpio, gpio)
/* pd18a_ebi_a6 */
#define PD18A_EBI_A6 \
SAM_PINMUX(d, 18, a, periph)
/* pd19_gpio */
#define PD19_GPIO \
SAM_PINMUX(d, 19, gpio, gpio)
/* pd19a_ebi_a7 */
#define PD19A_EBI_A7 \
SAM_PINMUX(d, 19, a, periph)
/* pd20_gpio */
#define PD20_GPIO \
SAM_PINMUX(d, 20, gpio, gpio)
/* pd20a_ebi_a8 */
#define PD20A_EBI_A8 \
SAM_PINMUX(d, 20, a, periph)
/* pd21_gpio */
#define PD21_GPIO \
SAM_PINMUX(d, 21, gpio, gpio)
/* pd21a_ebi_a9 */
#define PD21A_EBI_A9 \
SAM_PINMUX(d, 21, a, periph)
/* pd22_gpio */
#define PD22_GPIO \
SAM_PINMUX(d, 22, gpio, gpio)
/* pd22a_ebi_a10 */
#define PD22A_EBI_A10 \
SAM_PINMUX(d, 22, a, periph)
/* pd23_gpio */
#define PD23_GPIO \
SAM_PINMUX(d, 23, gpio, gpio)
/* pd23a_ebi_a11 */
#define PD23A_EBI_A11 \
SAM_PINMUX(d, 23, a, periph)
/* pd24_gpio */
#define PD24_GPIO \
SAM_PINMUX(d, 24, gpio, gpio)
/* pd24a_ebi_a12 */
#define PD24A_EBI_A12 \
SAM_PINMUX(d, 24, a, periph)
/* pd25_gpio */
#define PD25_GPIO \
SAM_PINMUX(d, 25, gpio, gpio)
/* pd25a_ebi_a13 */
#define PD25A_EBI_A13 \
SAM_PINMUX(d, 25, a, periph)
/* pd26_gpio */
#define PD26_GPIO \
SAM_PINMUX(d, 26, gpio, gpio)
/* pd26a_ebi_a14 */
#define PD26A_EBI_A14 \
SAM_PINMUX(d, 26, a, periph)
/* pd27_gpio */
#define PD27_GPIO \
SAM_PINMUX(d, 27, gpio, gpio)
/* pd27a_ebi_a15 */
#define PD27A_EBI_A15 \
SAM_PINMUX(d, 27, a, periph)
/* pd28_gpio */
#define PD28_GPIO \
SAM_PINMUX(d, 28, gpio, gpio)
/* pd28a_ebi_a16_ba0 */
#define PD28A_EBI_A16_BA0 \
SAM_PINMUX(d, 28, a, periph)
/* pd29_gpio */
#define PD29_GPIO \
SAM_PINMUX(d, 29, gpio, gpio)
/* pd29a_ebi_a17_ba1 */
#define PD29A_EBI_A17_BA1 \
SAM_PINMUX(d, 29, a, periph)
/* pd30_gpio */
#define PD30_GPIO \
SAM_PINMUX(d, 30, gpio, gpio)
/* pd30a_ebi_a18 */
#define PD30A_EBI_A18 \
SAM_PINMUX(d, 30, a, periph)
/* pe0_gpio */
#define PE0_GPIO \
SAM_PINMUX(e, 0, gpio, gpio)
/* pe0a_ebi_a19 */
#define PE0A_EBI_A19 \
SAM_PINMUX(e, 0, a, periph)
/* pe1_gpio */
#define PE1_GPIO \
SAM_PINMUX(e, 1, gpio, gpio)
/* pe1a_ebi_a20 */
#define PE1A_EBI_A20 \
SAM_PINMUX(e, 1, a, periph)
/* pe2_gpio */
#define PE2_GPIO \
SAM_PINMUX(e, 2, gpio, gpio)
/* pe2a_ebi_a21_nandale */
#define PE2A_EBI_A21_NANDALE \
SAM_PINMUX(e, 2, a, periph)
/* pe3_gpio */
#define PE3_GPIO \
SAM_PINMUX(e, 3, gpio, gpio)
/* pe3a_ebi_a22_nandcle */
#define PE3A_EBI_A22_NANDCLE \
SAM_PINMUX(e, 3, a, periph)
/* pe4_gpio */
#define PE4_GPIO \
SAM_PINMUX(e, 4, gpio, gpio)
/* pe4a_ebi_a23 */
#define PE4A_EBI_A23 \
SAM_PINMUX(e, 4, a, periph)
/* pe5_gpio */
#define PE5_GPIO \
SAM_PINMUX(e, 5, gpio, gpio)
/* pe5a_ebi_ncs4 */
#define PE5A_EBI_NCS4 \
SAM_PINMUX(e, 5, a, periph)
/* pe6_gpio */
#define PE6_GPIO \
SAM_PINMUX(e, 6, gpio, gpio)
/* pe6a_ebi_ncs5 */
#define PE6A_EBI_NCS5 \
SAM_PINMUX(e, 6, a, periph)
/* pe7_gpio */
#define PE7_GPIO \
SAM_PINMUX(e, 7, gpio, gpio)
/* pe8_gpio */
#define PE8_GPIO \
SAM_PINMUX(e, 8, gpio, gpio)
/* pe9_gpio */
#define PE9_GPIO \
SAM_PINMUX(e, 9, gpio, gpio)
/* pe9a_tc1_tioa3 */
#define PE9A_TC1_TIOA3 \
SAM_PINMUX(e, 9, a, periph)
/* pe10_gpio */
#define PE10_GPIO \
SAM_PINMUX(e, 10, gpio, gpio)
/* pe10a_tc1_tiob3 */
#define PE10A_TC1_TIOB3 \
SAM_PINMUX(e, 10, a, periph)
/* pe11_gpio */
#define PE11_GPIO \
SAM_PINMUX(e, 11, gpio, gpio)
/* pe11a_tc1_tioa4 */
#define PE11A_TC1_TIOA4 \
SAM_PINMUX(e, 11, a, periph)
/* pe12_gpio */
#define PE12_GPIO \
SAM_PINMUX(e, 12, gpio, gpio)
/* pe12a_tc1_tiob4 */
#define PE12A_TC1_TIOB4 \
SAM_PINMUX(e, 12, a, periph)
/* pe13_gpio */
#define PE13_GPIO \
SAM_PINMUX(e, 13, gpio, gpio)
/* pe13a_tc1_tioa5 */
#define PE13A_TC1_TIOA5 \
SAM_PINMUX(e, 13, a, periph)
/* pe14_gpio */
#define PE14_GPIO \
SAM_PINMUX(e, 14, gpio, gpio)
/* pe14a_tc1_tiob5 */
#define PE14A_TC1_TIOB5 \
SAM_PINMUX(e, 14, a, periph)
/* pe15_gpio */
#define PE15_GPIO \
SAM_PINMUX(e, 15, gpio, gpio)
/* pe15a_pwm_pwmh0 */
#define PE15A_PWM_PWMH0 \
SAM_PINMUX(e, 15, a, periph)
/* pe16_gpio */
#define PE16_GPIO \
SAM_PINMUX(e, 16, gpio, gpio)
/* pe16a_pwm_pwmh1 */
#define PE16A_PWM_PWMH1 \
SAM_PINMUX(e, 16, a, periph)
/* pe16b_usart3_sck */
#define PE16B_USART3_SCK \
SAM_PINMUX(e, 16, b, periph)
/* pe17_gpio */
#define PE17_GPIO \
SAM_PINMUX(e, 17, gpio, gpio)
/* pe17a_pwm_pwml2 */
#define PE17A_PWM_PWML2 \
SAM_PINMUX(e, 17, a, periph)
/* pe18_gpio */
#define PE18_GPIO \
SAM_PINMUX(e, 18, gpio, gpio)
/* pe18a_pwm_pwml0 */
#define PE18A_PWM_PWML0 \
SAM_PINMUX(e, 18, a, periph)
/* pe18b_ebi_ncs6 */
#define PE18B_EBI_NCS6 \
SAM_PINMUX(e, 18, b, periph)
/* pe19_gpio */
#define PE19_GPIO \
SAM_PINMUX(e, 19, gpio, gpio)
/* pe19a_pwm_pwml4 */
#define PE19A_PWM_PWML4 \
SAM_PINMUX(e, 19, a, periph)
/* pe20_gpio */
#define PE20_GPIO \
SAM_PINMUX(e, 20, gpio, gpio)
/* pe20a_pwm_pwmh4 */
#define PE20A_PWM_PWMH4 \
SAM_PINMUX(e, 20, a, periph)
/* pe20b_hsmci_mccdb */
#define PE20B_HSMCI_MCCDB \
SAM_PINMUX(e, 20, b, periph)
/* pe21_gpio */
#define PE21_GPIO \
SAM_PINMUX(e, 21, gpio, gpio)
/* pe21a_pwm_pwml5 */
#define PE21A_PWM_PWML5 \
SAM_PINMUX(e, 21, a, periph)
/* pe22_gpio */
#define PE22_GPIO \
SAM_PINMUX(e, 22, gpio, gpio)
/* pe22a_pwm_pwmh5 */
#define PE22A_PWM_PWMH5 \
SAM_PINMUX(e, 22, a, periph)
/* pe22b_hsmci_mcdb0 */
#define PE22B_HSMCI_MCDB0 \
SAM_PINMUX(e, 22, b, periph)
/* pe23_gpio */
#define PE23_GPIO \
SAM_PINMUX(e, 23, gpio, gpio)
/* pe23a_pwm_pwml6 */
#define PE23A_PWM_PWML6 \
SAM_PINMUX(e, 23, a, periph)
/* pe24_gpio */
#define PE24_GPIO \
SAM_PINMUX(e, 24, gpio, gpio)
/* pe24a_pwm_pwmh6 */
#define PE24A_PWM_PWMH6 \
SAM_PINMUX(e, 24, a, periph)
/* pe24b_hsmci_mcdb1 */
#define PE24B_HSMCI_MCDB1 \
SAM_PINMUX(e, 24, b, periph)
/* pe25_gpio */
#define PE25_GPIO \
SAM_PINMUX(e, 25, gpio, gpio)
/* pe25a_pwm_pwml7 */
#define PE25A_PWM_PWML7 \
SAM_PINMUX(e, 25, a, periph)
/* pe26_gpio */
#define PE26_GPIO \
SAM_PINMUX(e, 26, gpio, gpio)
/* pe26a_pwm_pwmh7 */
#define PE26A_PWM_PWMH7 \
SAM_PINMUX(e, 26, a, periph)
/* pe26b_hsmci_mcdb2 */
#define PE26B_HSMCI_MCDB2 \
SAM_PINMUX(e, 26, b, periph)
/* pe27_gpio */
#define PE27_GPIO \
SAM_PINMUX(e, 27, gpio, gpio)
/* pe27a_ebi_ncs7 */
#define PE27A_EBI_NCS7 \
SAM_PINMUX(e, 27, a, periph)
/* pe27b_hsmci_mcdb3 */
#define PE27B_HSMCI_MCDB3 \
SAM_PINMUX(e, 27, b, periph)
/* pe28_gpio */
#define PE28_GPIO \
SAM_PINMUX(e, 28, gpio, gpio)
/* pe28a_spi1_miso */
#define PE28A_SPI1_MISO \
SAM_PINMUX(e, 28, a, periph)
/* pe29_gpio */
#define PE29_GPIO \
SAM_PINMUX(e, 29, gpio, gpio)
/* pe29a_spi1_mosi */
#define PE29A_SPI1_MOSI \
SAM_PINMUX(e, 29, a, periph)
/* pe30_gpio */
#define PE30_GPIO \
SAM_PINMUX(e, 30, gpio, gpio)
/* pe30a_spi1_spck */
#define PE30A_SPI1_SPCK \
SAM_PINMUX(e, 30, a, periph)
/* pe31_gpio */
#define PE31_GPIO \
SAM_PINMUX(e, 31, gpio, gpio)
/* pe31a_spi1_npcs0 */
#define PE31A_SPI1_NPCS0 \
SAM_PINMUX(e, 31, a, periph)
/* pf0_gpio */
#define PF0_GPIO \
SAM_PINMUX(f, 0, gpio, gpio)
/* pf0a_spi1_npcs1 */
#define PF0A_SPI1_NPCS1 \
SAM_PINMUX(f, 0, a, periph)
/* pf1_gpio */
#define PF1_GPIO \
SAM_PINMUX(f, 1, gpio, gpio)
/* pf1a_spi1_npcs2 */
#define PF1A_SPI1_NPCS2 \
SAM_PINMUX(f, 1, a, periph)
/* pf2_gpio */
#define PF2_GPIO \
SAM_PINMUX(f, 2, gpio, gpio)
/* pf2a_spi1_npcs3 */
#define PF2A_SPI1_NPCS3 \
SAM_PINMUX(f, 2, a, periph)
/* pf3_gpio */
#define PF3_GPIO \
SAM_PINMUX(f, 3, gpio, gpio)
/* pf3a_pwm_pwmh3 */
#define PF3A_PWM_PWMH3 \
SAM_PINMUX(f, 3, a, periph)
/* pf4_gpio */
#define PF4_GPIO \
SAM_PINMUX(f, 4, gpio, gpio)
/* pf4a_usart3_cts */
#define PF4A_USART3_CTS \
SAM_PINMUX(f, 4, a, periph)
/* pf5_gpio */
#define PF5_GPIO \
SAM_PINMUX(f, 5, gpio, gpio)
/* pf5a_usart3_rts */
#define PF5A_USART3_RTS \
SAM_PINMUX(f, 5, a, periph)
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