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hal_atmel/include/dt-bindings/pinctrl/sam3XXc-pinctrl.h

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/*
* Autogenerated file
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <dt-bindings/pinctrl/atmel_sam_pinctrl.h>
/* pa0_gpio */
#define PA0_GPIO \
SAM_PINMUX(a, 0, gpio, gpio)
/* pa0a_can0_tx */
#define PA0A_CAN0_TX \
SAM_PINMUX(a, 0, a, periph)
/* pa0b_pwm_pwml3 */
#define PA0B_PWM_PWML3 \
SAM_PINMUX(a, 0, b, periph)
/* pa1_gpio */
#define PA1_GPIO \
SAM_PINMUX(a, 1, gpio, gpio)
/* pa1a_can0_rx */
#define PA1A_CAN0_RX \
SAM_PINMUX(a, 1, a, periph)
/* pa1b_pmc_pck0 */
#define PA1B_PMC_PCK0 \
SAM_PINMUX(a, 1, b, periph)
/* pa1x_supc_wkup0 */
#define PA1X_SUPC_WKUP0 \
SAM_PINMUX(a, 1, wkup0, wakeup)
/* pa2_gpio */
#define PA2_GPIO \
SAM_PINMUX(a, 2, gpio, gpio)
/* pa2a_tc0_tioa1 */
#define PA2A_TC0_TIOA1 \
SAM_PINMUX(a, 2, a, periph)
/* pa2x_adc_ad0 */
#define PA2X_ADC_AD0 \
SAM_PINMUX(a, 2, x, extra)
/* pa3_gpio */
#define PA3_GPIO \
SAM_PINMUX(a, 3, gpio, gpio)
/* pa3a_tc0_tiob1 */
#define PA3A_TC0_TIOB1 \
SAM_PINMUX(a, 3, a, periph)
/* pa3b_pwm_pwmfi1 */
#define PA3B_PWM_PWMFI1 \
SAM_PINMUX(a, 3, b, periph)
/* pa3x_adc_ad1 */
#define PA3X_ADC_AD1 \
SAM_PINMUX(a, 3, x, extra)
/* pa3x_supc_wkup1 */
#define PA3X_SUPC_WKUP1 \
SAM_PINMUX(a, 3, wkup1, wakeup)
/* pa4_gpio */
#define PA4_GPIO \
SAM_PINMUX(a, 4, gpio, gpio)
/* pa4a_tc0_tclk1 */
#define PA4A_TC0_TCLK1 \
SAM_PINMUX(a, 4, a, periph)
/* pa4x_adc_ad2 */
#define PA4X_ADC_AD2 \
SAM_PINMUX(a, 4, x, extra)
/* pa5_gpio */
#define PA5_GPIO \
SAM_PINMUX(a, 5, gpio, gpio)
/* pa5a_tc0_tioa2 */
#define PA5A_TC0_TIOA2 \
SAM_PINMUX(a, 5, a, periph)
/* pa5b_pwm_pwmfi0 */
#define PA5B_PWM_PWMFI0 \
SAM_PINMUX(a, 5, b, periph)
/* pa5x_supc_wkup2 */
#define PA5X_SUPC_WKUP2 \
SAM_PINMUX(a, 5, wkup2, wakeup)
/* pa6_gpio */
#define PA6_GPIO \
SAM_PINMUX(a, 6, gpio, gpio)
/* pa6a_tc0_tiob2 */
#define PA6A_TC0_TIOB2 \
SAM_PINMUX(a, 6, a, periph)
/* pa6x_adc_ad3 */
#define PA6X_ADC_AD3 \
SAM_PINMUX(a, 6, x, extra)
/* pa7_gpio */
#define PA7_GPIO \
SAM_PINMUX(a, 7, gpio, gpio)
/* pa7a_tc0_tclk2 */
#define PA7A_TC0_TCLK2 \
SAM_PINMUX(a, 7, a, periph)
/* pa7x_supc_wkup3 */
#define PA7X_SUPC_WKUP3 \
SAM_PINMUX(a, 7, wkup3, wakeup)
/* pa8_gpio */
#define PA8_GPIO \
SAM_PINMUX(a, 8, gpio, gpio)
/* pa8a_uart_rxd */
#define PA8A_UART_RXD \
SAM_PINMUX(a, 8, a, periph)
/* pa8b_pwm_pwmh0 */
#define PA8B_PWM_PWMH0 \
SAM_PINMUX(a, 8, b, periph)
/* pa8x_supc_wkup4 */
#define PA8X_SUPC_WKUP4 \
SAM_PINMUX(a, 8, wkup4, wakeup)
/* pa9_gpio */
#define PA9_GPIO \
SAM_PINMUX(a, 9, gpio, gpio)
/* pa9a_uart_txd */
#define PA9A_UART_TXD \
SAM_PINMUX(a, 9, a, periph)
/* pa9b_pwm_pwmh3 */
#define PA9B_PWM_PWMH3 \
SAM_PINMUX(a, 9, b, periph)
/* pa10_gpio */
#define PA10_GPIO \
SAM_PINMUX(a, 10, gpio, gpio)
/* pa10a_usart0_rxd */
#define PA10A_USART0_RXD \
SAM_PINMUX(a, 10, a, periph)
/* pa10b_dacc_datrg */
#define PA10B_DACC_DATRG \
SAM_PINMUX(a, 10, b, periph)
/* pa10x_supc_wkup5 */
#define PA10X_SUPC_WKUP5 \
SAM_PINMUX(a, 10, wkup5, wakeup)
/* pa11_gpio */
#define PA11_GPIO \
SAM_PINMUX(a, 11, gpio, gpio)
/* pa11a_usart0_txd */
#define PA11A_USART0_TXD \
SAM_PINMUX(a, 11, a, periph)
/* pa11b_adc_adtrg */
#define PA11B_ADC_ADTRG \
SAM_PINMUX(a, 11, b, periph)
/* pa11x_supc_wkup6 */
#define PA11X_SUPC_WKUP6 \
SAM_PINMUX(a, 11, wkup6, wakeup)
/* pa12_gpio */
#define PA12_GPIO \
SAM_PINMUX(a, 12, gpio, gpio)
/* pa12a_usart1_rxd */
#define PA12A_USART1_RXD \
SAM_PINMUX(a, 12, a, periph)
/* pa12b_pwm_pwml1 */
#define PA12B_PWM_PWML1 \
SAM_PINMUX(a, 12, b, periph)
/* pa12x_supc_wkup7 */
#define PA12X_SUPC_WKUP7 \
SAM_PINMUX(a, 12, wkup7, wakeup)
/* pa13_gpio */
#define PA13_GPIO \
SAM_PINMUX(a, 13, gpio, gpio)
/* pa13a_usart1_txd */
#define PA13A_USART1_TXD \
SAM_PINMUX(a, 13, a, periph)
/* pa13b_pwm_pwmh2 */
#define PA13B_PWM_PWMH2 \
SAM_PINMUX(a, 13, b, periph)
/* pa14_gpio */
#define PA14_GPIO \
SAM_PINMUX(a, 14, gpio, gpio)
/* pa14a_usart1_rts */
#define PA14A_USART1_RTS \
SAM_PINMUX(a, 14, a, periph)
/* pa14b_ssc_tk */
#define PA14B_SSC_TK \
SAM_PINMUX(a, 14, b, periph)
/* pa15_gpio */
#define PA15_GPIO \
SAM_PINMUX(a, 15, gpio, gpio)
/* pa15a_usart1_cts */
#define PA15A_USART1_CTS \
SAM_PINMUX(a, 15, a, periph)
/* pa15b_ssc_tf */
#define PA15B_SSC_TF \
SAM_PINMUX(a, 15, b, periph)
/* pa15x_supc_wkup8 */
#define PA15X_SUPC_WKUP8 \
SAM_PINMUX(a, 15, wkup8, wakeup)
/* pa16_gpio */
#define PA16_GPIO \
SAM_PINMUX(a, 16, gpio, gpio)
/* pa16a_spi1_spck1 */
#define PA16A_SPI1_SPCK1 \
SAM_PINMUX(a, 16, a, periph)
/* pa16b_ssc_td */
#define PA16B_SSC_TD \
SAM_PINMUX(a, 16, b, periph)
/* pa16x_adc_ad7 */
#define PA16X_ADC_AD7 \
SAM_PINMUX(a, 16, x, extra)
/* pa17_gpio */
#define PA17_GPIO \
SAM_PINMUX(a, 17, gpio, gpio)
/* pa17a_twi0_twd */
#define PA17A_TWI0_TWD \
SAM_PINMUX(a, 17, a, periph)
/* pa17b_spi0_spck0 */
#define PA17B_SPI0_SPCK0 \
SAM_PINMUX(a, 17, b, periph)
/* pa18_gpio */
#define PA18_GPIO \
SAM_PINMUX(a, 18, gpio, gpio)
/* pa18a_twi0_twck */
#define PA18A_TWI0_TWCK \
SAM_PINMUX(a, 18, a, periph)
/* pa18x_supc_wkup9 */
#define PA18X_SUPC_WKUP9 \
SAM_PINMUX(a, 18, wkup9, wakeup)
/* pa19_gpio */
#define PA19_GPIO \
SAM_PINMUX(a, 19, gpio, gpio)
/* pa19a_hsmci_mcck */
#define PA19A_HSMCI_MCCK \
SAM_PINMUX(a, 19, a, periph)
/* pa19b_pwm_pwmh1 */
#define PA19B_PWM_PWMH1 \
SAM_PINMUX(a, 19, b, periph)
/* pa20_gpio */
#define PA20_GPIO \
SAM_PINMUX(a, 20, gpio, gpio)
/* pa20a_hsmci_mccda */
#define PA20A_HSMCI_MCCDA \
SAM_PINMUX(a, 20, a, periph)
/* pa20b_pwm_pwml2 */
#define PA20B_PWM_PWML2 \
SAM_PINMUX(a, 20, b, periph)
/* pa21_gpio */
#define PA21_GPIO \
SAM_PINMUX(a, 21, gpio, gpio)
/* pa21a_hsmci_mcda0 */
#define PA21A_HSMCI_MCDA0 \
SAM_PINMUX(a, 21, a, periph)
/* pa21b_pwm_pwml0 */
#define PA21B_PWM_PWML0 \
SAM_PINMUX(a, 21, b, periph)
/* pa22_gpio */
#define PA22_GPIO \
SAM_PINMUX(a, 22, gpio, gpio)
/* pa22a_hsmci_mcda1 */
#define PA22A_HSMCI_MCDA1 \
SAM_PINMUX(a, 22, a, periph)
/* pa22b_tc1_tclk3 */
#define PA22B_TC1_TCLK3 \
SAM_PINMUX(a, 22, b, periph)
/* pa22x_adc_ad4 */
#define PA22X_ADC_AD4 \
SAM_PINMUX(a, 22, x, extra)
/* pa23_gpio */
#define PA23_GPIO \
SAM_PINMUX(a, 23, gpio, gpio)
/* pa23a_hsmci_mcda2 */
#define PA23A_HSMCI_MCDA2 \
SAM_PINMUX(a, 23, a, periph)
/* pa23b_tc1_tclk4 */
#define PA23B_TC1_TCLK4 \
SAM_PINMUX(a, 23, b, periph)
/* pa23x_adc_ad5 */
#define PA23X_ADC_AD5 \
SAM_PINMUX(a, 23, x, extra)
/* pa24_gpio */
#define PA24_GPIO \
SAM_PINMUX(a, 24, gpio, gpio)
/* pa24a_hsmci_mcda3 */
#define PA24A_HSMCI_MCDA3 \
SAM_PINMUX(a, 24, a, periph)
/* pa24b_pmc_pck1 */
#define PA24B_PMC_PCK1 \
SAM_PINMUX(a, 24, b, periph)
/* pa24x_adc_ad6 */
#define PA24X_ADC_AD6 \
SAM_PINMUX(a, 24, x, extra)
/* pa25_gpio */
#define PA25_GPIO \
SAM_PINMUX(a, 25, gpio, gpio)
/* pa25a_spi0_miso */
#define PA25A_SPI0_MISO \
SAM_PINMUX(a, 25, a, periph)
/* pa26_gpio */
#define PA26_GPIO \
SAM_PINMUX(a, 26, gpio, gpio)
/* pa26a_spi0_mosi */
#define PA26A_SPI0_MOSI \
SAM_PINMUX(a, 26, a, periph)
/* pa27_gpio */
#define PA27_GPIO \
SAM_PINMUX(a, 27, gpio, gpio)
/* pa27a_spi0_spck */
#define PA27A_SPI0_SPCK \
SAM_PINMUX(a, 27, a, periph)
/* pa27x_supc_wkup10 */
#define PA27X_SUPC_WKUP10 \
SAM_PINMUX(a, 27, wkup10, wakeup)
/* pa28_gpio */
#define PA28_GPIO \
SAM_PINMUX(a, 28, gpio, gpio)
/* pa28a_spi0_npcs0 */
#define PA28A_SPI0_NPCS0 \
SAM_PINMUX(a, 28, a, periph)
/* pa28b_pmc_pck2 */
#define PA28B_PMC_PCK2 \
SAM_PINMUX(a, 28, b, periph)
/* pa28x_supc_wkup11 */
#define PA28X_SUPC_WKUP11 \
SAM_PINMUX(a, 28, wkup11, wakeup)
/* pa29_gpio */
#define PA29_GPIO \
SAM_PINMUX(a, 29, gpio, gpio)
/* pa29a_spi0_npcs1 */
#define PA29A_SPI0_NPCS1 \
SAM_PINMUX(a, 29, a, periph)
/* pb0_gpio */
#define PB0_GPIO \
SAM_PINMUX(b, 0, gpio, gpio)
/* pb0a_emac_etxck_erefck */
#define PB0A_EMAC_ETXCK_EREFCK \
SAM_PINMUX(b, 0, a, periph)
/* pb0b_tc1_tioa3 */
#define PB0B_TC1_TIOA3 \
SAM_PINMUX(b, 0, b, periph)
/* pb1_gpio */
#define PB1_GPIO \
SAM_PINMUX(b, 1, gpio, gpio)
/* pb1a_emac_etxen */
#define PB1A_EMAC_ETXEN \
SAM_PINMUX(b, 1, a, periph)
/* pb1b_tc1_tiob3 */
#define PB1B_TC1_TIOB3 \
SAM_PINMUX(b, 1, b, periph)
/* pb2_gpio */
#define PB2_GPIO \
SAM_PINMUX(b, 2, gpio, gpio)
/* pb2a_emac_etx0 */
#define PB2A_EMAC_ETX0 \
SAM_PINMUX(b, 2, a, periph)
/* pb2b_tc1_tioa4 */
#define PB2B_TC1_TIOA4 \
SAM_PINMUX(b, 2, b, periph)
/* pb3_gpio */
#define PB3_GPIO \
SAM_PINMUX(b, 3, gpio, gpio)
/* pb3a_emac_etx1 */
#define PB3A_EMAC_ETX1 \
SAM_PINMUX(b, 3, a, periph)
/* pb3b_tc1_tiob4 */
#define PB3B_TC1_TIOB4 \
SAM_PINMUX(b, 3, b, periph)
/* pb4_gpio */
#define PB4_GPIO \
SAM_PINMUX(b, 4, gpio, gpio)
/* pb4a_emac_ecrsdv_erxdv */
#define PB4A_EMAC_ECRSDV_ERXDV \
SAM_PINMUX(b, 4, a, periph)
/* pb4b_tc1_tioa5 */
#define PB4B_TC1_TIOA5 \
SAM_PINMUX(b, 4, b, periph)
/* pb5_gpio */
#define PB5_GPIO \
SAM_PINMUX(b, 5, gpio, gpio)
/* pb5a_emac_erx0 */
#define PB5A_EMAC_ERX0 \
SAM_PINMUX(b, 5, a, periph)
/* pb5b_tc1_tiob5 */
#define PB5B_TC1_TIOB5 \
SAM_PINMUX(b, 5, b, periph)
/* pb6_gpio */
#define PB6_GPIO \
SAM_PINMUX(b, 6, gpio, gpio)
/* pb6a_emac_erx1 */
#define PB6A_EMAC_ERX1 \
SAM_PINMUX(b, 6, a, periph)
/* pb6b_pwm_pwml4 */
#define PB6B_PWM_PWML4 \
SAM_PINMUX(b, 6, b, periph)
/* pb7_gpio */
#define PB7_GPIO \
SAM_PINMUX(b, 7, gpio, gpio)
/* pb7a_emac_erxer */
#define PB7A_EMAC_ERXER \
SAM_PINMUX(b, 7, a, periph)
/* pb7b_pwm_pwml5 */
#define PB7B_PWM_PWML5 \
SAM_PINMUX(b, 7, b, periph)
/* pb8_gpio */
#define PB8_GPIO \
SAM_PINMUX(b, 8, gpio, gpio)
/* pb8a_emac_emdc */
#define PB8A_EMAC_EMDC \
SAM_PINMUX(b, 8, a, periph)
/* pb8b_pwm_pwml6 */
#define PB8B_PWM_PWML6 \
SAM_PINMUX(b, 8, b, periph)
/* pb9_gpio */
#define PB9_GPIO \
SAM_PINMUX(b, 9, gpio, gpio)
/* pb9a_emac_emdio */
#define PB9A_EMAC_EMDIO \
SAM_PINMUX(b, 9, a, periph)
/* pb9b_pwm_pwml7 */
#define PB9B_PWM_PWML7 \
SAM_PINMUX(b, 9, b, periph)
/* pb10_gpio */
#define PB10_GPIO \
SAM_PINMUX(b, 10, gpio, gpio)
/* pb10a_uotg_vbof */
#define PB10A_UOTG_VBOF \
SAM_PINMUX(b, 10, a, periph)
/* pb11_gpio */
#define PB11_GPIO \
SAM_PINMUX(b, 11, gpio, gpio)
/* pb11a_uotg_id */
#define PB11A_UOTG_ID \
SAM_PINMUX(b, 11, a, periph)
/* pb12_gpio */
#define PB12_GPIO \
SAM_PINMUX(b, 12, gpio, gpio)
/* pb12a_twi1_twd */
#define PB12A_TWI1_TWD \
SAM_PINMUX(b, 12, a, periph)
/* pb12b_pwm_pwmh0 */
#define PB12B_PWM_PWMH0 \
SAM_PINMUX(b, 12, b, periph)
/* pb12x_adc_ad8 */
#define PB12X_ADC_AD8 \
SAM_PINMUX(b, 12, x, extra)
/* pb13_gpio */
#define PB13_GPIO \
SAM_PINMUX(b, 13, gpio, gpio)
/* pb13a_twi1_twck */
#define PB13A_TWI1_TWCK \
SAM_PINMUX(b, 13, a, periph)
/* pb13b_pwm_pwmh1 */
#define PB13B_PWM_PWMH1 \
SAM_PINMUX(b, 13, b, periph)
/* pb13x_adc_ad9 */
#define PB13X_ADC_AD9 \
SAM_PINMUX(b, 13, x, extra)
/* pb14_gpio */
#define PB14_GPIO \
SAM_PINMUX(b, 14, gpio, gpio)
/* pb14a_can1_tx */
#define PB14A_CAN1_TX \
SAM_PINMUX(b, 14, a, periph)
/* pb14b_pwm_pwmh2 */
#define PB14B_PWM_PWMH2 \
SAM_PINMUX(b, 14, b, periph)
/* pb15_gpio */
#define PB15_GPIO \
SAM_PINMUX(b, 15, gpio, gpio)
/* pb15a_can1_rx */
#define PB15A_CAN1_RX \
SAM_PINMUX(b, 15, a, periph)
/* pb15b_pwm_pwmh3 */
#define PB15B_PWM_PWMH3 \
SAM_PINMUX(b, 15, b, periph)
/* pb15x_dacc_dac0 */
#define PB15X_DACC_DAC0 \
SAM_PINMUX(b, 15, x, extra)
/* pb15x_supc_wkup10 */
#define PB15X_SUPC_WKUP10 \
SAM_PINMUX(b, 15, wkup10, wakeup)
/* pb16_gpio */
#define PB16_GPIO \
SAM_PINMUX(b, 16, gpio, gpio)
/* pb16a_tc1_tclk5 */
#define PB16A_TC1_TCLK5 \
SAM_PINMUX(b, 16, a, periph)
/* pb16b_pwm_pwml0 */
#define PB16B_PWM_PWML0 \
SAM_PINMUX(b, 16, b, periph)
/* pb16x_dacc_dac1 */
#define PB16X_DACC_DAC1 \
SAM_PINMUX(b, 16, x, extra)
/* pb17_gpio */
#define PB17_GPIO \
SAM_PINMUX(b, 17, gpio, gpio)
/* pb17a_ssc_rf */
#define PB17A_SSC_RF \
SAM_PINMUX(b, 17, a, periph)
/* pb17b_pwm_pwml1 */
#define PB17B_PWM_PWML1 \
SAM_PINMUX(b, 17, b, periph)
/* pb17x_adc_ad10 */
#define PB17X_ADC_AD10 \
SAM_PINMUX(b, 17, x, extra)
/* pb18_gpio */
#define PB18_GPIO \
SAM_PINMUX(b, 18, gpio, gpio)
/* pb18a_ssc_rd */
#define PB18A_SSC_RD \
SAM_PINMUX(b, 18, a, periph)
/* pb18b_pwm_pwml2 */
#define PB18B_PWM_PWML2 \
SAM_PINMUX(b, 18, b, periph)
/* pb18x_adc_ad11 */
#define PB18X_ADC_AD11 \
SAM_PINMUX(b, 18, x, extra)
/* pb19_gpio */
#define PB19_GPIO \
SAM_PINMUX(b, 19, gpio, gpio)
/* pb19a_ssc_rk */
#define PB19A_SSC_RK \
SAM_PINMUX(b, 19, a, periph)
/* pb19b_pwm_pwml3 */
#define PB19B_PWM_PWML3 \
SAM_PINMUX(b, 19, b, periph)
/* pb19x_adc_ad12 */
#define PB19X_ADC_AD12 \
SAM_PINMUX(b, 19, x, extra)
/* pb20_gpio */
#define PB20_GPIO \
SAM_PINMUX(b, 20, gpio, gpio)
/* pb20a_usart2_txd */
#define PB20A_USART2_TXD \
SAM_PINMUX(b, 20, a, periph)
/* pb20b_spi0_npcs1 */
#define PB20B_SPI0_NPCS1 \
SAM_PINMUX(b, 20, b, periph)
/* pb20x_adc_ad13 */
#define PB20X_ADC_AD13 \
SAM_PINMUX(b, 20, x, extra)
/* pb21_gpio */
#define PB21_GPIO \
SAM_PINMUX(b, 21, gpio, gpio)
/* pb21a_usart2_rxd */
#define PB21A_USART2_RXD \
SAM_PINMUX(b, 21, a, periph)
/* pb21b_spi0_npcs2 */
#define PB21B_SPI0_NPCS2 \
SAM_PINMUX(b, 21, b, periph)
/* pb21x_adc_ad14 */
#define PB21X_ADC_AD14 \
SAM_PINMUX(b, 21, x, extra)
/* pb21x_supc_wkup13 */
#define PB21X_SUPC_WKUP13 \
SAM_PINMUX(b, 21, wkup13, wakeup)
/* pb22_gpio */
#define PB22_GPIO \
SAM_PINMUX(b, 22, gpio, gpio)
/* pb22a_usart2_rts */
#define PB22A_USART2_RTS \
SAM_PINMUX(b, 22, a, periph)
/* pb22b_pmc_pck0 */
#define PB22B_PMC_PCK0 \
SAM_PINMUX(b, 22, b, periph)
/* pb23_gpio */
#define PB23_GPIO \
SAM_PINMUX(b, 23, gpio, gpio)
/* pb23a_usart2_cts */
#define PB23A_USART2_CTS \
SAM_PINMUX(b, 23, a, periph)
/* pb23b_spi0_npcs3 */
#define PB23B_SPI0_NPCS3 \
SAM_PINMUX(b, 23, b, periph)
/* pb23x_supc_wkup14 */
#define PB23X_SUPC_WKUP14 \
SAM_PINMUX(b, 23, wkup14, wakeup)
/* pb24_gpio */
#define PB24_GPIO \
SAM_PINMUX(b, 24, gpio, gpio)
/* pb24a_usart2_sck */
#define PB24A_USART2_SCK \
SAM_PINMUX(b, 24, a, periph)
/* pb25_gpio */
#define PB25_GPIO \
SAM_PINMUX(b, 25, gpio, gpio)
/* pb25a_usart0_rts */
#define PB25A_USART0_RTS \
SAM_PINMUX(b, 25, a, periph)
/* pb25b_tc0_tioa0 */
#define PB25B_TC0_TIOA0 \
SAM_PINMUX(b, 25, b, periph)
/* pb26_gpio */
#define PB26_GPIO \
SAM_PINMUX(b, 26, gpio, gpio)
/* pb26a_usart0_cts */
#define PB26A_USART0_CTS \
SAM_PINMUX(b, 26, a, periph)
/* pb26b_tc0_tclk0 */
#define PB26B_TC0_TCLK0 \
SAM_PINMUX(b, 26, b, periph)
/* pb26x_supc_wkup15 */
#define PB26X_SUPC_WKUP15 \
SAM_PINMUX(b, 26, wkup15, wakeup)
/* pb27_gpio */
#define PB27_GPIO \
SAM_PINMUX(b, 27, gpio, gpio)
/* pb27b_tc0_tiob0 */
#define PB27B_TC0_TIOB0 \
SAM_PINMUX(b, 27, b, periph)
/* pb28_gpio */
#define PB28_GPIO \
SAM_PINMUX(b, 28, gpio, gpio)
/* pb29_gpio */
#define PB29_GPIO \
SAM_PINMUX(b, 29, gpio, gpio)
/* pb30_gpio */
#define PB30_GPIO \
SAM_PINMUX(b, 30, gpio, gpio)
/* pb31_gpio */
#define PB31_GPIO \
SAM_PINMUX(b, 31, gpio, gpio)
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