Remove LITTLE_ENDIAN and __LITTLE_ENDIAN defines

These are not used anywhere in this module and conflict with defines from picolibc (at least). Signed-off-by: Keith Packard <keithp@keithp.com>
2023-03-29 18:55:29 -07:00 · 2023-03-29 18:55:29 -07:00 · 5ab43007ed
parent f47a9a8b55
commit 5ab43007ed
92 changed files with 0 additions and 92 deletions
--- a/asf/sam/include/sam4l/sam4lc2a.h
+++ b/asf/sam/include/sam4l/sam4lc2a.h
@ -379,7 +379,6 @@ void LCDCA_Handler               ( void );
 * \brief Configuration of the Cortex-M4 Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __BB_PRESENT           0         /*!< BIT_BANDING present or not */
 #define __CLKGATE_PRESENT      1         /*!< CLKGATE present or not */
 #define __CM4_REV              1         /*!< Core revision r0p1 */
--- a/asf/sam/include/sam4l/sam4lc2b.h
+++ b/asf/sam/include/sam4l/sam4lc2b.h
@ -379,7 +379,6 @@ void LCDCA_Handler               ( void );
 * \brief Configuration of the Cortex-M4 Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __BB_PRESENT           0         /*!< BIT_BANDING present or not */
 #define __CLKGATE_PRESENT      1         /*!< CLKGATE present or not */
 #define __CM4_REV              1         /*!< Core revision r0p1 */
--- a/asf/sam/include/sam4l/sam4lc2c.h
+++ b/asf/sam/include/sam4l/sam4lc2c.h
@ -379,7 +379,6 @@ void LCDCA_Handler               ( void );
 * \brief Configuration of the Cortex-M4 Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __BB_PRESENT           0         /*!< BIT_BANDING present or not */
 #define __CLKGATE_PRESENT      1         /*!< CLKGATE present or not */
 #define __CM4_REV              1         /*!< Core revision r0p1 */
--- a/asf/sam/include/sam4l/sam4lc4a.h
+++ b/asf/sam/include/sam4l/sam4lc4a.h
@ -379,7 +379,6 @@ void LCDCA_Handler               ( void );
 * \brief Configuration of the Cortex-M4 Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __BB_PRESENT           0         /*!< BIT_BANDING present or not */
 #define __CLKGATE_PRESENT      1         /*!< CLKGATE present or not */
 #define __CM4_REV              1         /*!< Core revision r0p1 */
--- a/asf/sam/include/sam4l/sam4lc4b.h
+++ b/asf/sam/include/sam4l/sam4lc4b.h
@ -379,7 +379,6 @@ void LCDCA_Handler               ( void );
 * \brief Configuration of the Cortex-M4 Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __BB_PRESENT           0         /*!< BIT_BANDING present or not */
 #define __CLKGATE_PRESENT      1         /*!< CLKGATE present or not */
 #define __CM4_REV              1         /*!< Core revision r0p1 */
--- a/asf/sam/include/sam4l/sam4lc4c.h
+++ b/asf/sam/include/sam4l/sam4lc4c.h
@ -379,7 +379,6 @@ void LCDCA_Handler               ( void );
 * \brief Configuration of the Cortex-M4 Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __BB_PRESENT           0         /*!< BIT_BANDING present or not */
 #define __CLKGATE_PRESENT      1         /*!< CLKGATE present or not */
 #define __CM4_REV              1         /*!< Core revision r0p1 */
--- a/asf/sam/include/sam4l/sam4lc8a.h
+++ b/asf/sam/include/sam4l/sam4lc8a.h
@ -379,7 +379,6 @@ void LCDCA_Handler               ( void );
 * \brief Configuration of the Cortex-M4 Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __BB_PRESENT           0         /*!< BIT_BANDING present or not */
 #define __CLKGATE_PRESENT      1         /*!< CLKGATE present or not */
 #define __CM4_REV              1         /*!< Core revision r0p1 */
--- a/asf/sam/include/sam4l/sam4lc8b.h
+++ b/asf/sam/include/sam4l/sam4lc8b.h
@ -379,7 +379,6 @@ void LCDCA_Handler               ( void );
 * \brief Configuration of the Cortex-M4 Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __BB_PRESENT           0         /*!< BIT_BANDING present or not */
 #define __CLKGATE_PRESENT      1         /*!< CLKGATE present or not */
 #define __CM4_REV              1         /*!< Core revision r0p1 */
--- a/asf/sam/include/sam4l/sam4lc8c.h
+++ b/asf/sam/include/sam4l/sam4lc8c.h
@ -379,7 +379,6 @@ void LCDCA_Handler               ( void );
 * \brief Configuration of the Cortex-M4 Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __BB_PRESENT           0         /*!< BIT_BANDING present or not */
 #define __CLKGATE_PRESENT      1         /*!< CLKGATE present or not */
 #define __CM4_REV              1         /*!< Core revision r0p1 */
--- a/asf/sam/include/sam4l/sam4ls2a.h
+++ b/asf/sam/include/sam4l/sam4ls2a.h
@ -375,7 +375,6 @@ void TWIM3_Handler               ( void );
 * \brief Configuration of the Cortex-M4 Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __BB_PRESENT           0         /*!< BIT_BANDING present or not */
 #define __CLKGATE_PRESENT      1         /*!< CLKGATE present or not */
 #define __CM4_REV              1         /*!< Core revision r0p1 */
--- a/asf/sam/include/sam4l/sam4ls2b.h
+++ b/asf/sam/include/sam4l/sam4ls2b.h
@ -375,7 +375,6 @@ void TWIM3_Handler               ( void );
 * \brief Configuration of the Cortex-M4 Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __BB_PRESENT           0         /*!< BIT_BANDING present or not */
 #define __CLKGATE_PRESENT      1         /*!< CLKGATE present or not */
 #define __CM4_REV              1         /*!< Core revision r0p1 */
--- a/asf/sam/include/sam4l/sam4ls2c.h
+++ b/asf/sam/include/sam4l/sam4ls2c.h
@ -375,7 +375,6 @@ void TWIM3_Handler               ( void );
 * \brief Configuration of the Cortex-M4 Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __BB_PRESENT           0         /*!< BIT_BANDING present or not */
 #define __CLKGATE_PRESENT      1         /*!< CLKGATE present or not */
 #define __CM4_REV              1         /*!< Core revision r0p1 */
--- a/asf/sam/include/sam4l/sam4ls4a.h
+++ b/asf/sam/include/sam4l/sam4ls4a.h
@ -375,7 +375,6 @@ void TWIM3_Handler               ( void );
 * \brief Configuration of the Cortex-M4 Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __BB_PRESENT           0         /*!< BIT_BANDING present or not */
 #define __CLKGATE_PRESENT      1         /*!< CLKGATE present or not */
 #define __CM4_REV              1         /*!< Core revision r0p1 */
--- a/asf/sam/include/sam4l/sam4ls4b.h
+++ b/asf/sam/include/sam4l/sam4ls4b.h
@ -375,7 +375,6 @@ void TWIM3_Handler               ( void );
 * \brief Configuration of the Cortex-M4 Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __BB_PRESENT           0         /*!< BIT_BANDING present or not */
 #define __CLKGATE_PRESENT      1         /*!< CLKGATE present or not */
 #define __CM4_REV              1         /*!< Core revision r0p1 */
--- a/asf/sam/include/sam4l/sam4ls4c.h
+++ b/asf/sam/include/sam4l/sam4ls4c.h
@ -375,7 +375,6 @@ void TWIM3_Handler               ( void );
 * \brief Configuration of the Cortex-M4 Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __BB_PRESENT           0         /*!< BIT_BANDING present or not */
 #define __CLKGATE_PRESENT      1         /*!< CLKGATE present or not */
 #define __CM4_REV              1         /*!< Core revision r0p1 */
--- a/asf/sam/include/sam4l/sam4ls8a.h
+++ b/asf/sam/include/sam4l/sam4ls8a.h
@ -375,7 +375,6 @@ void TWIM3_Handler               ( void );
 * \brief Configuration of the Cortex-M4 Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __BB_PRESENT           0         /*!< BIT_BANDING present or not */
 #define __CLKGATE_PRESENT      1         /*!< CLKGATE present or not */
 #define __CM4_REV              1         /*!< Core revision r0p1 */
--- a/asf/sam/include/sam4l/sam4ls8b.h
+++ b/asf/sam/include/sam4l/sam4ls8b.h
@ -375,7 +375,6 @@ void TWIM3_Handler               ( void );
 * \brief Configuration of the Cortex-M4 Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __BB_PRESENT           0         /*!< BIT_BANDING present or not */
 #define __CLKGATE_PRESENT      1         /*!< CLKGATE present or not */
 #define __CM4_REV              1         /*!< Core revision r0p1 */
--- a/asf/sam/include/sam4l/sam4ls8c.h
+++ b/asf/sam/include/sam4l/sam4ls8c.h
@ -375,7 +375,6 @@ void TWIM3_Handler               ( void );
 * \brief Configuration of the Cortex-M4 Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __BB_PRESENT           0         /*!< BIT_BANDING present or not */
 #define __CLKGATE_PRESENT      1         /*!< CLKGATE present or not */
 #define __CM4_REV              1         /*!< Core revision r0p1 */
--- a/asf/sam/include/same70/same70j19.h
+++ b/asf/sam/include/same70/same70j19.h
@ -385,7 +385,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam/include/same70/same70j20.h
+++ b/asf/sam/include/same70/same70j20.h
@ -385,7 +385,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam/include/same70/same70j21.h
+++ b/asf/sam/include/same70/same70j21.h
@ -385,7 +385,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam/include/same70/same70n19.h
+++ b/asf/sam/include/same70/same70n19.h
@ -401,7 +401,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam/include/same70/same70n20.h
+++ b/asf/sam/include/same70/same70n20.h
@ -401,7 +401,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam/include/same70/same70n21.h
+++ b/asf/sam/include/same70/same70n21.h
@ -401,7 +401,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam/include/same70/same70q19.h
+++ b/asf/sam/include/same70/same70q19.h
@ -409,7 +409,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam/include/same70/same70q20.h
+++ b/asf/sam/include/same70/same70q20.h
@ -409,7 +409,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam/include/same70/same70q21.h
+++ b/asf/sam/include/same70/same70q21.h
@ -409,7 +409,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam/include/same70b/same70j19b.h
+++ b/asf/sam/include/same70b/same70j19b.h
@ -400,7 +400,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam/include/same70b/same70j20b.h
+++ b/asf/sam/include/same70b/same70j20b.h
@ -400,7 +400,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam/include/same70b/same70j21b.h
+++ b/asf/sam/include/same70b/same70j21b.h
@ -400,7 +400,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam/include/same70b/same70n19b.h
+++ b/asf/sam/include/same70b/same70n19b.h
@ -418,7 +418,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam/include/same70b/same70n20b.h
+++ b/asf/sam/include/same70b/same70n20b.h
@ -418,7 +418,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam/include/same70b/same70n21b.h
+++ b/asf/sam/include/same70b/same70n21b.h
@ -418,7 +418,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam/include/same70b/same70q19b.h
+++ b/asf/sam/include/same70b/same70q19b.h
@ -428,7 +428,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam/include/same70b/same70q20b.h
+++ b/asf/sam/include/same70b/same70q20b.h
@ -428,7 +428,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam/include/same70b/same70q21b.h
+++ b/asf/sam/include/same70b/same70q21b.h
@ -428,7 +428,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam/include/samv71/samv71j19.h
+++ b/asf/sam/include/samv71/samv71j19.h
@ -387,7 +387,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam/include/samv71/samv71j20.h
+++ b/asf/sam/include/samv71/samv71j20.h
@ -389,7 +389,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam/include/samv71/samv71j21.h
+++ b/asf/sam/include/samv71/samv71j21.h
@ -389,7 +389,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam/include/samv71/samv71n19.h
+++ b/asf/sam/include/samv71/samv71n19.h
@ -403,7 +403,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam/include/samv71/samv71n20.h
+++ b/asf/sam/include/samv71/samv71n20.h
@ -401,7 +401,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam/include/samv71/samv71n21.h
+++ b/asf/sam/include/samv71/samv71n21.h
@ -401,7 +401,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam/include/samv71/samv71q19.h
+++ b/asf/sam/include/samv71/samv71q19.h
@ -411,7 +411,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam/include/samv71/samv71q20.h
+++ b/asf/sam/include/samv71/samv71q20.h
@ -411,7 +411,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam/include/samv71/samv71q21.h
+++ b/asf/sam/include/samv71/samv71q21.h
@ -411,7 +411,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam/include/samv71b/samv71j19b.h
+++ b/asf/sam/include/samv71b/samv71j19b.h
@ -402,7 +402,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam/include/samv71b/samv71j20b.h
+++ b/asf/sam/include/samv71b/samv71j20b.h
@ -402,7 +402,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam/include/samv71b/samv71j21b.h
+++ b/asf/sam/include/samv71b/samv71j21b.h
@ -402,7 +402,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam/include/samv71b/samv71n19b.h
+++ b/asf/sam/include/samv71b/samv71n19b.h
@ -420,7 +420,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam/include/samv71b/samv71n20b.h
+++ b/asf/sam/include/samv71b/samv71n20b.h
@ -420,7 +420,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam/include/samv71b/samv71n21b.h
+++ b/asf/sam/include/samv71b/samv71n21b.h
@ -420,7 +420,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam/include/samv71b/samv71q19b.h
+++ b/asf/sam/include/samv71b/samv71q19b.h
@ -430,7 +430,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam/include/samv71b/samv71q20b.h
+++ b/asf/sam/include/samv71b/samv71q20b.h
@ -430,7 +430,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam/include/samv71b/samv71q21b.h
+++ b/asf/sam/include/samv71b/samv71q21b.h
@ -430,7 +430,6 @@ void XDMAC_Handler                 ( void );
 #define __DTCM_PRESENT                 1 /**< Data TCM present                                                          */
 #define __DEBUG_LVL                    1
 #define __TRACE_LVL                    1
-#define __LITTLE_ENDIAN                1
 #define __ARCH_ARM                     1
 #define __ARCH_ARM_CORTEX_M            1
 #define __DEVICE_IS_SAM                1
--- a/asf/sam0/include/samd20/samd20e14.h
+++ b/asf/sam0/include/samd20/samd20e14.h
@ -207,7 +207,6 @@ void PTC_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samd20/samd20e15.h
+++ b/asf/sam0/include/samd20/samd20e15.h
@ -207,7 +207,6 @@ void PTC_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samd20/samd20e16.h
+++ b/asf/sam0/include/samd20/samd20e16.h
@ -207,7 +207,6 @@ void PTC_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samd20/samd20e17.h
+++ b/asf/sam0/include/samd20/samd20e17.h
@ -207,7 +207,6 @@ void PTC_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samd20/samd20e18.h
+++ b/asf/sam0/include/samd20/samd20e18.h
@ -207,7 +207,6 @@ void PTC_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samd20/samd20g14.h
+++ b/asf/sam0/include/samd20/samd20g14.h
@ -211,7 +211,6 @@ void PTC_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samd20/samd20g15.h
+++ b/asf/sam0/include/samd20/samd20g15.h
@ -211,7 +211,6 @@ void PTC_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samd20/samd20g16.h
+++ b/asf/sam0/include/samd20/samd20g16.h
@ -211,7 +211,6 @@ void PTC_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samd20/samd20g17.h
+++ b/asf/sam0/include/samd20/samd20g17.h
@ -211,7 +211,6 @@ void PTC_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samd20/samd20g17u.h
+++ b/asf/sam0/include/samd20/samd20g17u.h
@ -211,7 +211,6 @@ void PTC_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samd20/samd20g18.h
+++ b/asf/sam0/include/samd20/samd20g18.h
@ -211,7 +211,6 @@ void PTC_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samd20/samd20g18u.h
+++ b/asf/sam0/include/samd20/samd20g18u.h
@ -211,7 +211,6 @@ void PTC_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samd20/samd20j14.h
+++ b/asf/sam0/include/samd20/samd20j14.h
@ -215,7 +215,6 @@ void PTC_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samd20/samd20j15.h
+++ b/asf/sam0/include/samd20/samd20j15.h
@ -215,7 +215,6 @@ void PTC_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samd20/samd20j16.h
+++ b/asf/sam0/include/samd20/samd20j16.h
@ -215,7 +215,6 @@ void PTC_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samd20/samd20j17.h
+++ b/asf/sam0/include/samd20/samd20j17.h
@ -215,7 +215,6 @@ void PTC_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samd20/samd20j18.h
+++ b/asf/sam0/include/samd20/samd20j18.h
@ -215,7 +215,6 @@ void PTC_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samd21/samd21e15a.h
+++ b/asf/sam0/include/samd21/samd21e15a.h
@ -216,7 +216,6 @@ void I2S_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samd21/samd21e16a.h
+++ b/asf/sam0/include/samd21/samd21e16a.h
@ -216,7 +216,6 @@ void I2S_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samd21/samd21e17a.h
+++ b/asf/sam0/include/samd21/samd21e17a.h
@ -216,7 +216,6 @@ void I2S_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samd21/samd21e18a.h
+++ b/asf/sam0/include/samd21/samd21e18a.h
@ -216,7 +216,6 @@ void I2S_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samd21/samd21g15a.h
+++ b/asf/sam0/include/samd21/samd21g15a.h
@ -220,7 +220,6 @@ void I2S_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samd21/samd21g16a.h
+++ b/asf/sam0/include/samd21/samd21g16a.h
@ -220,7 +220,6 @@ void I2S_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samd21/samd21g17a.h
+++ b/asf/sam0/include/samd21/samd21g17a.h
@ -220,7 +220,6 @@ void I2S_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samd21/samd21g17au.h
+++ b/asf/sam0/include/samd21/samd21g17au.h
@ -224,7 +224,6 @@ void I2S_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samd21/samd21g18a.h
+++ b/asf/sam0/include/samd21/samd21g18a.h
@ -220,7 +220,6 @@ void I2S_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samd21/samd21g18au.h
+++ b/asf/sam0/include/samd21/samd21g18au.h
@ -224,7 +224,6 @@ void I2S_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samd21/samd21j15a.h
+++ b/asf/sam0/include/samd21/samd21j15a.h
@ -224,7 +224,6 @@ void I2S_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samd21/samd21j16a.h
+++ b/asf/sam0/include/samd21/samd21j16a.h
@ -224,7 +224,6 @@ void I2S_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samd21/samd21j17a.h
+++ b/asf/sam0/include/samd21/samd21j17a.h
@ -224,7 +224,6 @@ void I2S_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samd21/samd21j18a.h
+++ b/asf/sam0/include/samd21/samd21j18a.h
@ -224,7 +224,6 @@ void I2S_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samr21/samr21e16a.h
+++ b/asf/sam0/include/samr21/samr21e16a.h
@ -222,7 +222,6 @@ void PTC_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samr21/samr21e17a.h
+++ b/asf/sam0/include/samr21/samr21e17a.h
@ -222,7 +222,6 @@ void PTC_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samr21/samr21e18a.h
+++ b/asf/sam0/include/samr21/samr21e18a.h
@ -222,7 +222,6 @@ void PTC_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samr21/samr21e19a.h
+++ b/asf/sam0/include/samr21/samr21e19a.h
@ -222,7 +222,6 @@ void PTC_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samr21/samr21g16a.h
+++ b/asf/sam0/include/samr21/samr21g16a.h
@ -222,7 +222,6 @@ void PTC_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samr21/samr21g17a.h
+++ b/asf/sam0/include/samr21/samr21g17a.h
@ -222,7 +222,6 @@ void PTC_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */
--- a/asf/sam0/include/samr21/samr21g18a.h
+++ b/asf/sam0/include/samr21/samr21g18a.h
@ -222,7 +222,6 @@ void PTC_Handler                 ( void );
 * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
 */

-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */