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pinctrl: sam-d20-d21-da1: Add pinconfigs and include files 

Add Atmel SAM0 D20/D21/DA1 family of pinconfigs definitions and auto
generated files to be used in pinctrl devicetree files.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This commit is contained in:
Gerson Fernando Budke 2022-03-11 19:08:39 -03:00
parent 1876356e9c
commit 3d10116f7f
7 changed files with 6641 additions and 0 deletions
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643
include/dt-bindings/pinctrl/samd20eXab-pinctrl.h Normal file
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/*
* Autogenerated file
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <dt-bindings/pinctrl/atmel_sam_pinctrl.h>
/* pa0_gpio */
#define PA0_GPIO \
SAM_PINMUX(a, 0, gpio, gpio)
/* pa0a_eic_extint0 */
#define PA0A_EIC_EXTINT0 \
SAM_PINMUX(a, 0, a, periph)
/* pa0d_sercom1_pad0 */
#define PA0D_SERCOM1_PAD0 \
SAM_PINMUX(a, 0, d, periph)
/* pa0f_tc2_wo0 */
#define PA0F_TC2_WO0 \
SAM_PINMUX(a, 0, f, periph)
/* pa1_gpio */
#define PA1_GPIO \
SAM_PINMUX(a, 1, gpio, gpio)
/* pa1a_eic_extint1 */
#define PA1A_EIC_EXTINT1 \
SAM_PINMUX(a, 1, a, periph)
/* pa1d_sercom1_pad1 */
#define PA1D_SERCOM1_PAD1 \
SAM_PINMUX(a, 1, d, periph)
/* pa1f_tc2_wo1 */
#define PA1F_TC2_WO1 \
SAM_PINMUX(a, 1, f, periph)
/* pa2_gpio */
#define PA2_GPIO \
SAM_PINMUX(a, 2, gpio, gpio)
/* pa2a_eic_extint2 */
#define PA2A_EIC_EXTINT2 \
SAM_PINMUX(a, 2, a, periph)
/* pa2b_adc_ain0 */
#define PA2B_ADC_AIN0 \
SAM_PINMUX(a, 2, b, periph)
/* pa2b_ptc_y0 */
#define PA2B_PTC_Y0 \
SAM_PINMUX(a, 2, b, periph)
/* pa2b_dac_vout */
#define PA2B_DAC_VOUT \
SAM_PINMUX(a, 2, b, periph)
/* pa3_gpio */
#define PA3_GPIO \
SAM_PINMUX(a, 3, gpio, gpio)
/* pa3a_eic_extint3 */
#define PA3A_EIC_EXTINT3 \
SAM_PINMUX(a, 3, a, periph)
/* pa3b_adc_dac_vrfea */
#define PA3B_ADC_DAC_VRFEA \
SAM_PINMUX(a, 3, b, periph)
/* pa3b_adc_ain1 */
#define PA3B_ADC_AIN1 \
SAM_PINMUX(a, 3, b, periph)
/* pa3b_ptc_y1 */
#define PA3B_PTC_Y1 \
SAM_PINMUX(a, 3, b, periph)
/* pa4_gpio */
#define PA4_GPIO \
SAM_PINMUX(a, 4, gpio, gpio)
/* pa4a_eic_extint4 */
#define PA4A_EIC_EXTINT4 \
SAM_PINMUX(a, 4, a, periph)
/* pa4b_adc_vrefb */
#define PA4B_ADC_VREFB \
SAM_PINMUX(a, 4, b, periph)
/* pa4b_adc_ain4 */
#define PA4B_ADC_AIN4 \
SAM_PINMUX(a, 4, b, periph)
/* pa4b_ac_ain0 */
#define PA4B_AC_AIN0 \
SAM_PINMUX(a, 4, b, periph)
/* pa4b_ptc_y2 */
#define PA4B_PTC_Y2 \
SAM_PINMUX(a, 4, b, periph)
/* pa4d_sercom0_pad0 */
#define PA4D_SERCOM0_PAD0 \
SAM_PINMUX(a, 4, d, periph)
/* pa4f_tc0_wo0 */
#define PA4F_TC0_WO0 \
SAM_PINMUX(a, 4, f, periph)
/* pa5_gpio */
#define PA5_GPIO \
SAM_PINMUX(a, 5, gpio, gpio)
/* pa5a_eic_extint5 */
#define PA5A_EIC_EXTINT5 \
SAM_PINMUX(a, 5, a, periph)
/* pa5b_adc_ain5 */
#define PA5B_ADC_AIN5 \
SAM_PINMUX(a, 5, b, periph)
/* pa5b_ac_ain1 */
#define PA5B_AC_AIN1 \
SAM_PINMUX(a, 5, b, periph)
/* pa5b_ptc_y3 */
#define PA5B_PTC_Y3 \
SAM_PINMUX(a, 5, b, periph)
/* pa5d_sercom0_pad1 */
#define PA5D_SERCOM0_PAD1 \
SAM_PINMUX(a, 5, d, periph)
/* pa5f_tc0_wo1 */
#define PA5F_TC0_WO1 \
SAM_PINMUX(a, 5, f, periph)
/* pa6_gpio */
#define PA6_GPIO \
SAM_PINMUX(a, 6, gpio, gpio)
/* pa6a_eic_extint6 */
#define PA6A_EIC_EXTINT6 \
SAM_PINMUX(a, 6, a, periph)
/* pa6b_adc_ain6 */
#define PA6B_ADC_AIN6 \
SAM_PINMUX(a, 6, b, periph)
/* pa6b_ac_ain2 */
#define PA6B_AC_AIN2 \
SAM_PINMUX(a, 6, b, periph)
/* pa6b_ptc_y4 */
#define PA6B_PTC_Y4 \
SAM_PINMUX(a, 6, b, periph)
/* pa6d_sercom0_pad2 */
#define PA6D_SERCOM0_PAD2 \
SAM_PINMUX(a, 6, d, periph)
/* pa6f_tc1_wo0 */
#define PA6F_TC1_WO0 \
SAM_PINMUX(a, 6, f, periph)
/* pa7_gpio */
#define PA7_GPIO \
SAM_PINMUX(a, 7, gpio, gpio)
/* pa7a_eic_extint7 */
#define PA7A_EIC_EXTINT7 \
SAM_PINMUX(a, 7, a, periph)
/* pa7b_adc_ain7 */
#define PA7B_ADC_AIN7 \
SAM_PINMUX(a, 7, b, periph)
/* pa7b_ac_ain3 */
#define PA7B_AC_AIN3 \
SAM_PINMUX(a, 7, b, periph)
/* pa7b_ptc_y5 */
#define PA7B_PTC_Y5 \
SAM_PINMUX(a, 7, b, periph)
/* pa7d_sercom0_pad3 */
#define PA7D_SERCOM0_PAD3 \
SAM_PINMUX(a, 7, d, periph)
/* pa7f_tc1_wo1 */
#define PA7F_TC1_WO1 \
SAM_PINMUX(a, 7, f, periph)
/* pa8_gpio */
#define PA8_GPIO \
SAM_PINMUX(a, 8, gpio, gpio)
/* pa8a_eic_nmi */
#define PA8A_EIC_NMI \
SAM_PINMUX(a, 8, a, periph)
/* pa8b_adc_ain16 */
#define PA8B_ADC_AIN16 \
SAM_PINMUX(a, 8, b, periph)
/* pa8b_ptc_x0 */
#define PA8B_PTC_X0 \
SAM_PINMUX(a, 8, b, periph)
/* pa8c_sercom0_pad0 */
#define PA8C_SERCOM0_PAD0 \
SAM_PINMUX(a, 8, c, periph)
/* pa8d_sercom2_pad0 */
#define PA8D_SERCOM2_PAD0 \
SAM_PINMUX(a, 8, d, periph)
/* pa8e_tc0_wo0 */
#define PA8E_TC0_WO0 \
SAM_PINMUX(a, 8, e, periph)
/* pa9_gpio */
#define PA9_GPIO \
SAM_PINMUX(a, 9, gpio, gpio)
/* pa9a_eic_extint9 */
#define PA9A_EIC_EXTINT9 \
SAM_PINMUX(a, 9, a, periph)
/* pa9b_adc_ain17 */
#define PA9B_ADC_AIN17 \
SAM_PINMUX(a, 9, b, periph)
/* pa9b_ptc_x1 */
#define PA9B_PTC_X1 \
SAM_PINMUX(a, 9, b, periph)
/* pa9c_sercom0_pad1 */
#define PA9C_SERCOM0_PAD1 \
SAM_PINMUX(a, 9, c, periph)
/* pa9d_sercom2_pad1 */
#define PA9D_SERCOM2_PAD1 \
SAM_PINMUX(a, 9, d, periph)
/* pa9e_tc0_wo1 */
#define PA9E_TC0_WO1 \
SAM_PINMUX(a, 9, e, periph)
/* pa10_gpio */
#define PA10_GPIO \
SAM_PINMUX(a, 10, gpio, gpio)
/* pa10a_eic_extint10 */
#define PA10A_EIC_EXTINT10 \
SAM_PINMUX(a, 10, a, periph)
/* pa10b_adc_ain18 */
#define PA10B_ADC_AIN18 \
SAM_PINMUX(a, 10, b, periph)
/* pa10b_ptc_x2 */
#define PA10B_PTC_X2 \
SAM_PINMUX(a, 10, b, periph)
/* pa10c_sercom0_pad2 */
#define PA10C_SERCOM0_PAD2 \
SAM_PINMUX(a, 10, c, periph)
/* pa10d_sercom2_pad2 */
#define PA10D_SERCOM2_PAD2 \
SAM_PINMUX(a, 10, d, periph)
/* pa10e_tc1_wo0 */
#define PA10E_TC1_WO0 \
SAM_PINMUX(a, 10, e, periph)
/* pa10h_gclk_io4 */
#define PA10H_GCLK_IO4 \
SAM_PINMUX(a, 10, h, periph)
/* pa11_gpio */
#define PA11_GPIO \
SAM_PINMUX(a, 11, gpio, gpio)
/* pa11a_eic_extint11 */
#define PA11A_EIC_EXTINT11 \
SAM_PINMUX(a, 11, a, periph)
/* pa11b_adc_ain19 */
#define PA11B_ADC_AIN19 \
SAM_PINMUX(a, 11, b, periph)
/* pa11b_ptc_x3 */
#define PA11B_PTC_X3 \
SAM_PINMUX(a, 11, b, periph)
/* pa11c_sercom0_pad3 */
#define PA11C_SERCOM0_PAD3 \
SAM_PINMUX(a, 11, c, periph)
/* pa11d_sercom2_pad3 */
#define PA11D_SERCOM2_PAD3 \
SAM_PINMUX(a, 11, d, periph)
/* pa11e_tc1_wo1 */
#define PA11E_TC1_WO1 \
SAM_PINMUX(a, 11, e, periph)
/* pa11h_gclk_io5 */
#define PA11H_GCLK_IO5 \
SAM_PINMUX(a, 11, h, periph)
/* pa14_gpio */
#define PA14_GPIO \
SAM_PINMUX(a, 14, gpio, gpio)
/* pa14a_eic_extint14 */
#define PA14A_EIC_EXTINT14 \
SAM_PINMUX(a, 14, a, periph)
/* pa14c_sercom2_pad2 */
#define PA14C_SERCOM2_PAD2 \
SAM_PINMUX(a, 14, c, periph)
/* pa14d_sercom4_pad2 */
#define PA14D_SERCOM4_PAD2 \
SAM_PINMUX(a, 14, d, periph)
/* pa14e_tc3_wo0 */
#define PA14E_TC3_WO0 \
SAM_PINMUX(a, 14, e, periph)
/* pa14h_gclk_io0 */
#define PA14H_GCLK_IO0 \
SAM_PINMUX(a, 14, h, periph)
/* pa15_gpio */
#define PA15_GPIO \
SAM_PINMUX(a, 15, gpio, gpio)
/* pa15a_eic_extint15 */
#define PA15A_EIC_EXTINT15 \
SAM_PINMUX(a, 15, a, periph)
/* pa15c_sercom2_pad3 */
#define PA15C_SERCOM2_PAD3 \
SAM_PINMUX(a, 15, c, periph)
/* pa15d_sercom4_pad3 */
#define PA15D_SERCOM4_PAD3 \
SAM_PINMUX(a, 15, d, periph)
/* pa15e_tc3_wo1 */
#define PA15E_TC3_WO1 \
SAM_PINMUX(a, 15, e, periph)
/* pa15h_gclk_io1 */
#define PA15H_GCLK_IO1 \
SAM_PINMUX(a, 15, h, periph)
/* pa16_gpio */
#define PA16_GPIO \
SAM_PINMUX(a, 16, gpio, gpio)
/* pa16a_eic_extint0 */
#define PA16A_EIC_EXTINT0 \
SAM_PINMUX(a, 16, a, periph)
/* pa16b_ptc_x4 */
#define PA16B_PTC_X4 \
SAM_PINMUX(a, 16, b, periph)
/* pa16c_sercom1_pad0 */
#define PA16C_SERCOM1_PAD0 \
SAM_PINMUX(a, 16, c, periph)
/* pa16d_sercom3_pad0 */
#define PA16D_SERCOM3_PAD0 \
SAM_PINMUX(a, 16, d, periph)
/* pa16f_tc2_wo0 */
#define PA16F_TC2_WO0 \
SAM_PINMUX(a, 16, f, periph)
/* pa16h_gclk_io2 */
#define PA16H_GCLK_IO2 \
SAM_PINMUX(a, 16, h, periph)
/* pa17_gpio */
#define PA17_GPIO \
SAM_PINMUX(a, 17, gpio, gpio)
/* pa17a_eic_extint1 */
#define PA17A_EIC_EXTINT1 \
SAM_PINMUX(a, 17, a, periph)
/* pa17b_ptc_x5 */
#define PA17B_PTC_X5 \
SAM_PINMUX(a, 17, b, periph)
/* pa17c_sercom1_pad1 */
#define PA17C_SERCOM1_PAD1 \
SAM_PINMUX(a, 17, c, periph)
/* pa17d_sercom3_pad1 */
#define PA17D_SERCOM3_PAD1 \
SAM_PINMUX(a, 17, d, periph)
/* pa17f_tc2_wo1 */
#define PA17F_TC2_WO1 \
SAM_PINMUX(a, 17, f, periph)
/* pa17h_gclk_io3 */
#define PA17H_GCLK_IO3 \
SAM_PINMUX(a, 17, h, periph)
/* pa18_gpio */
#define PA18_GPIO \
SAM_PINMUX(a, 18, gpio, gpio)
/* pa18a_eic_extint2 */
#define PA18A_EIC_EXTINT2 \
SAM_PINMUX(a, 18, a, periph)
/* pa18b_ptc_x6 */
#define PA18B_PTC_X6 \
SAM_PINMUX(a, 18, b, periph)
/* pa18c_sercom1_pad2 */
#define PA18C_SERCOM1_PAD2 \
SAM_PINMUX(a, 18, c, periph)
/* pa18d_sercom3_pad2 */
#define PA18D_SERCOM3_PAD2 \
SAM_PINMUX(a, 18, d, periph)
/* pa18f_tc3_wo0 */
#define PA18F_TC3_WO0 \
SAM_PINMUX(a, 18, f, periph)
/* pa18h_ac_cmp0 */
#define PA18H_AC_CMP0 \
SAM_PINMUX(a, 18, h, periph)
/* pa19_gpio */
#define PA19_GPIO \
SAM_PINMUX(a, 19, gpio, gpio)
/* pa19a_eic_extint3 */
#define PA19A_EIC_EXTINT3 \
SAM_PINMUX(a, 19, a, periph)
/* pa19b_ptc_x7 */
#define PA19B_PTC_X7 \
SAM_PINMUX(a, 19, b, periph)
/* pa19c_sercom1_pad3 */
#define PA19C_SERCOM1_PAD3 \
SAM_PINMUX(a, 19, c, periph)
/* pa19d_sercom3_pad3 */
#define PA19D_SERCOM3_PAD3 \
SAM_PINMUX(a, 19, d, periph)
/* pa19f_tc3_wo1 */
#define PA19F_TC3_WO1 \
SAM_PINMUX(a, 19, f, periph)
/* pa19g_iis0_sd */
#define PA19G_IIS0_SD \
SAM_PINMUX(a, 19, g, periph)
/* pa19h_ac_cmp1 */
#define PA19H_AC_CMP1 \
SAM_PINMUX(a, 19, h, periph)
/* pa22_gpio */
#define PA22_GPIO \
SAM_PINMUX(a, 22, gpio, gpio)
/* pa22a_eic_extint6 */
#define PA22A_EIC_EXTINT6 \
SAM_PINMUX(a, 22, a, periph)
/* pa22b_ptc_x10 */
#define PA22B_PTC_X10 \
SAM_PINMUX(a, 22, b, periph)
/* pa22c_sercom3_pad0 */
#define PA22C_SERCOM3_PAD0 \
SAM_PINMUX(a, 22, c, periph)
/* pa22d_sercom5_pad0 */
#define PA22D_SERCOM5_PAD0 \
SAM_PINMUX(a, 22, d, periph)
/* pa22f_tc4_wo0 */
#define PA22F_TC4_WO0 \
SAM_PINMUX(a, 22, f, periph)
/* pa22h_gclk_io6 */
#define PA22H_GCLK_IO6 \
SAM_PINMUX(a, 22, h, periph)
/* pa23_gpio */
#define PA23_GPIO \
SAM_PINMUX(a, 23, gpio, gpio)
/* pa23a_eic_extint7 */
#define PA23A_EIC_EXTINT7 \
SAM_PINMUX(a, 23, a, periph)
/* pa23b_ptc_x11 */
#define PA23B_PTC_X11 \
SAM_PINMUX(a, 23, b, periph)
/* pa23c_sercom3_pad1 */
#define PA23C_SERCOM3_PAD1 \
SAM_PINMUX(a, 23, c, periph)
/* pa23d_sercom5_pad1 */
#define PA23D_SERCOM5_PAD1 \
SAM_PINMUX(a, 23, d, periph)
/* pa23f_tc4_wo1 */
#define PA23F_TC4_WO1 \
SAM_PINMUX(a, 23, f, periph)
/* pa23h_gclk_io7 */
#define PA23H_GCLK_IO7 \
SAM_PINMUX(a, 23, h, periph)
/* pa24_gpio */
#define PA24_GPIO \
SAM_PINMUX(a, 24, gpio, gpio)
/* pa24a_eic_extint12 */
#define PA24A_EIC_EXTINT12 \
SAM_PINMUX(a, 24, a, periph)
/* pa24c_sercom3_pad2 */
#define PA24C_SERCOM3_PAD2 \
SAM_PINMUX(a, 24, c, periph)
/* pa24d_sercom5_pad2 */
#define PA24D_SERCOM5_PAD2 \
SAM_PINMUX(a, 24, d, periph)
/* pa24f_tc5_wo0 */
#define PA24F_TC5_WO0 \
SAM_PINMUX(a, 24, f, periph)
/* pa25_gpio */
#define PA25_GPIO \
SAM_PINMUX(a, 25, gpio, gpio)
/* pa25a_eic_extint13 */
#define PA25A_EIC_EXTINT13 \
SAM_PINMUX(a, 25, a, periph)
/* pa25c_sercom3_pad3 */
#define PA25C_SERCOM3_PAD3 \
SAM_PINMUX(a, 25, c, periph)
/* pa25d_sercom5_pad3 */
#define PA25D_SERCOM5_PAD3 \
SAM_PINMUX(a, 25, d, periph)
/* pa25f_tc5_wo1 */
#define PA25F_TC5_WO1 \
SAM_PINMUX(a, 25, f, periph)
/* pa27_gpio */
#define PA27_GPIO \
SAM_PINMUX(a, 27, gpio, gpio)
/* pa27a_eic_extint15 */
#define PA27A_EIC_EXTINT15 \
SAM_PINMUX(a, 27, a, periph)
/* pa27h_gclk_io0 */
#define PA27H_GCLK_IO0 \
SAM_PINMUX(a, 27, h, periph)
/* pa28_gpio */
#define PA28_GPIO \
SAM_PINMUX(a, 28, gpio, gpio)
/* pa28a_eic_extint8 */
#define PA28A_EIC_EXTINT8 \
SAM_PINMUX(a, 28, a, periph)
/* pa28h_gclk_io0 */
#define PA28H_GCLK_IO0 \
SAM_PINMUX(a, 28, h, periph)
/* pa30_gpio */
#define PA30_GPIO \
SAM_PINMUX(a, 30, gpio, gpio)
/* pa30a_eic_extint10 */
#define PA30A_EIC_EXTINT10 \
SAM_PINMUX(a, 30, a, periph)
/* pa30d_sercom1_pad2 */
#define PA30D_SERCOM1_PAD2 \
SAM_PINMUX(a, 30, d, periph)
/* pa30f_tc1_wo0 */
#define PA30F_TC1_WO0 \
SAM_PINMUX(a, 30, f, periph)
/* pa30g_swd_clk */
#define PA30G_SWD_CLK \
SAM_PINMUX(a, 30, g, periph)
/* pa30h_gclk_io0 */
#define PA30H_GCLK_IO0 \
SAM_PINMUX(a, 30, h, periph)
/* pa31_gpio */
#define PA31_GPIO \
SAM_PINMUX(a, 31, gpio, gpio)
/* pa31a_eic_extint11 */
#define PA31A_EIC_EXTINT11 \
SAM_PINMUX(a, 31, a, periph)
/* pa31d_sercom1_pad3 */
#define PA31D_SERCOM1_PAD3 \
SAM_PINMUX(a, 31, d, periph)
/* pa31f_tc1_wo1 */
#define PA31F_TC1_WO1 \
SAM_PINMUX(a, 31, f, periph)
/* pa31g_swd_io */
#define PA31G_SWD_IO \
SAM_PINMUX(a, 31, g, periph)

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include/dt-bindings/pinctrl/samd20gXab-pinctrl.h Normal file
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/*
* Autogenerated file
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <dt-bindings/pinctrl/atmel_sam_pinctrl.h>
/*
* WARNING: this variant has package exception.
*
* Read datasheet topics related to I/O Multiplexing and Considerations or
* Peripheral Signal Multiplexing on I/O Lines for more information.
*/
/* pa0_gpio */
#define PA0_GPIO \
SAM_PINMUX(a, 0, gpio, gpio)
/* pa0a_eic_extint0 */
#define PA0A_EIC_EXTINT0 \
SAM_PINMUX(a, 0, a, periph)
/* pa0d_sercom1_pad0 */
#define PA0D_SERCOM1_PAD0 \
SAM_PINMUX(a, 0, d, periph)
/* pa0f_tc2_wo0 */
#define PA0F_TC2_WO0 \
SAM_PINMUX(a, 0, f, periph)
/* pa1_gpio */
#define PA1_GPIO \
SAM_PINMUX(a, 1, gpio, gpio)
/* pa1a_eic_extint1 */
#define PA1A_EIC_EXTINT1 \
SAM_PINMUX(a, 1, a, periph)
/* pa1d_sercom1_pad1 */
#define PA1D_SERCOM1_PAD1 \
SAM_PINMUX(a, 1, d, periph)
/* pa1f_tc2_wo1 */
#define PA1F_TC2_WO1 \
SAM_PINMUX(a, 1, f, periph)
/* pa2_gpio */
#define PA2_GPIO \
SAM_PINMUX(a, 2, gpio, gpio)
/* pa2a_eic_extint2 */
#define PA2A_EIC_EXTINT2 \
SAM_PINMUX(a, 2, a, periph)
/* pa2b_adc_ain0 */
#define PA2B_ADC_AIN0 \
SAM_PINMUX(a, 2, b, periph)
/* pa2b_ptc_y0 */
#define PA2B_PTC_Y0 \
SAM_PINMUX(a, 2, b, periph)
/* pa2b_dac_vout */
#define PA2B_DAC_VOUT \
SAM_PINMUX(a, 2, b, periph)
/* pa3_gpio */
#define PA3_GPIO \
SAM_PINMUX(a, 3, gpio, gpio)
/* pa3a_eic_extint3 */
#define PA3A_EIC_EXTINT3 \
SAM_PINMUX(a, 3, a, periph)
/* pa3b_adc_dac_vrfea */
#define PA3B_ADC_DAC_VRFEA \
SAM_PINMUX(a, 3, b, periph)
/* pa3b_adc_ain1 */
#define PA3B_ADC_AIN1 \
SAM_PINMUX(a, 3, b, periph)
/* pa3b_ptc_y1 */
#define PA3B_PTC_Y1 \
SAM_PINMUX(a, 3, b, periph)
/* pa4_gpio */
#define PA4_GPIO \
SAM_PINMUX(a, 4, gpio, gpio)
/* pa4a_eic_extint4 */
#define PA4A_EIC_EXTINT4 \
SAM_PINMUX(a, 4, a, periph)
/* pa4b_adc_vrefb */
#define PA4B_ADC_VREFB \
SAM_PINMUX(a, 4, b, periph)
/* pa4b_adc_ain4 */
#define PA4B_ADC_AIN4 \
SAM_PINMUX(a, 4, b, periph)
/* pa4b_ac_ain0 */
#define PA4B_AC_AIN0 \
SAM_PINMUX(a, 4, b, periph)
/* pa4b_ptc_y2 */
#define PA4B_PTC_Y2 \
SAM_PINMUX(a, 4, b, periph)
/* pa4d_sercom0_pad0 */
#define PA4D_SERCOM0_PAD0 \
SAM_PINMUX(a, 4, d, periph)
/* pa4f_tc0_wo0 */
#define PA4F_TC0_WO0 \
SAM_PINMUX(a, 4, f, periph)
/* pa5_gpio */
#define PA5_GPIO \
SAM_PINMUX(a, 5, gpio, gpio)
/* pa5a_eic_extint5 */
#define PA5A_EIC_EXTINT5 \
SAM_PINMUX(a, 5, a, periph)
/* pa5b_adc_ain5 */
#define PA5B_ADC_AIN5 \
SAM_PINMUX(a, 5, b, periph)
/* pa5b_ac_ain1 */
#define PA5B_AC_AIN1 \
SAM_PINMUX(a, 5, b, periph)
/* pa5b_ptc_y3 */
#define PA5B_PTC_Y3 \
SAM_PINMUX(a, 5, b, periph)
/* pa5d_sercom0_pad1 */
#define PA5D_SERCOM0_PAD1 \
SAM_PINMUX(a, 5, d, periph)
/* pa5f_tc0_wo1 */
#define PA5F_TC0_WO1 \
SAM_PINMUX(a, 5, f, periph)
/* pa6_gpio */
#define PA6_GPIO \
SAM_PINMUX(a, 6, gpio, gpio)
/* pa6a_eic_extint6 */
#define PA6A_EIC_EXTINT6 \
SAM_PINMUX(a, 6, a, periph)
/* pa6b_adc_ain6 */
#define PA6B_ADC_AIN6 \
SAM_PINMUX(a, 6, b, periph)
/* pa6b_ac_ain2 */
#define PA6B_AC_AIN2 \
SAM_PINMUX(a, 6, b, periph)
/* pa6b_ptc_y4 */
#define PA6B_PTC_Y4 \
SAM_PINMUX(a, 6, b, periph)
/* pa6d_sercom0_pad2 */
#define PA6D_SERCOM0_PAD2 \
SAM_PINMUX(a, 6, d, periph)
/* pa6f_tc1_wo0 */
#define PA6F_TC1_WO0 \
SAM_PINMUX(a, 6, f, periph)
/* pa7_gpio */
#define PA7_GPIO \
SAM_PINMUX(a, 7, gpio, gpio)
/* pa7a_eic_extint7 */
#define PA7A_EIC_EXTINT7 \
SAM_PINMUX(a, 7, a, periph)
/* pa7b_adc_ain7 */
#define PA7B_ADC_AIN7 \
SAM_PINMUX(a, 7, b, periph)
/* pa7b_ac_ain3 */
#define PA7B_AC_AIN3 \
SAM_PINMUX(a, 7, b, periph)
/* pa7b_ptc_y5 */
#define PA7B_PTC_Y5 \
SAM_PINMUX(a, 7, b, periph)
/* pa7d_sercom0_pad3 */
#define PA7D_SERCOM0_PAD3 \
SAM_PINMUX(a, 7, d, periph)
/* pa7f_tc1_wo1 */
#define PA7F_TC1_WO1 \
SAM_PINMUX(a, 7, f, periph)
/* pa8_gpio */
#define PA8_GPIO \
SAM_PINMUX(a, 8, gpio, gpio)
/* pa8a_eic_nmi */
#define PA8A_EIC_NMI \
SAM_PINMUX(a, 8, a, periph)
/* pa8b_adc_ain16 */
#define PA8B_ADC_AIN16 \
SAM_PINMUX(a, 8, b, periph)
/* pa8b_ptc_x0 */
#define PA8B_PTC_X0 \
SAM_PINMUX(a, 8, b, periph)
/* pa8c_sercom0_pad0 */
#define PA8C_SERCOM0_PAD0 \
SAM_PINMUX(a, 8, c, periph)
/* pa8d_sercom2_pad0 */
#define PA8D_SERCOM2_PAD0 \
SAM_PINMUX(a, 8, d, periph)
/* pa8e_tc0_wo0 */
#define PA8E_TC0_WO0 \
SAM_PINMUX(a, 8, e, periph)
/* pa9_gpio */
#define PA9_GPIO \
SAM_PINMUX(a, 9, gpio, gpio)
/* pa9a_eic_extint9 */
#define PA9A_EIC_EXTINT9 \
SAM_PINMUX(a, 9, a, periph)
/* pa9b_adc_ain17 */
#define PA9B_ADC_AIN17 \
SAM_PINMUX(a, 9, b, periph)
/* pa9b_ptc_x1 */
#define PA9B_PTC_X1 \
SAM_PINMUX(a, 9, b, periph)
/* pa9c_sercom0_pad1 */
#define PA9C_SERCOM0_PAD1 \
SAM_PINMUX(a, 9, c, periph)
/* pa9d_sercom2_pad1 */
#define PA9D_SERCOM2_PAD1 \
SAM_PINMUX(a, 9, d, periph)
/* pa9e_tc0_wo1 */
#define PA9E_TC0_WO1 \
SAM_PINMUX(a, 9, e, periph)
/* pa10_gpio */
#define PA10_GPIO \
SAM_PINMUX(a, 10, gpio, gpio)
/* pa10a_eic_extint10 */
#define PA10A_EIC_EXTINT10 \
SAM_PINMUX(a, 10, a, periph)
/* pa10b_adc_ain18 */
#define PA10B_ADC_AIN18 \
SAM_PINMUX(a, 10, b, periph)
/* pa10b_ptc_x2 */
#define PA10B_PTC_X2 \
SAM_PINMUX(a, 10, b, periph)
/* pa10c_sercom0_pad2 */
#define PA10C_SERCOM0_PAD2 \
SAM_PINMUX(a, 10, c, periph)
/* pa10d_sercom2_pad2 */
#define PA10D_SERCOM2_PAD2 \
SAM_PINMUX(a, 10, d, periph)
/* pa10e_tc1_wo0 */
#define PA10E_TC1_WO0 \
SAM_PINMUX(a, 10, e, periph)
/* pa10h_gclk_io4 */
#define PA10H_GCLK_IO4 \
SAM_PINMUX(a, 10, h, periph)
/* pa11_gpio */
#define PA11_GPIO \
SAM_PINMUX(a, 11, gpio, gpio)
/* pa11a_eic_extint11 */
#define PA11A_EIC_EXTINT11 \
SAM_PINMUX(a, 11, a, periph)
/* pa11b_adc_ain19 */
#define PA11B_ADC_AIN19 \
SAM_PINMUX(a, 11, b, periph)
/* pa11b_ptc_x3 */
#define PA11B_PTC_X3 \
SAM_PINMUX(a, 11, b, periph)
/* pa11c_sercom0_pad3 */
#define PA11C_SERCOM0_PAD3 \
SAM_PINMUX(a, 11, c, periph)
/* pa11d_sercom2_pad3 */
#define PA11D_SERCOM2_PAD3 \
SAM_PINMUX(a, 11, d, periph)
/* pa11e_tc1_wo1 */
#define PA11E_TC1_WO1 \
SAM_PINMUX(a, 11, e, periph)
/* pa11h_gclk_io5 */
#define PA11H_GCLK_IO5 \
SAM_PINMUX(a, 11, h, periph)
/* pa12_gpio */
#define PA12_GPIO \
SAM_PINMUX(a, 12, gpio, gpio)
/* pa12a_eic_extint12 */
#define PA12A_EIC_EXTINT12 \
SAM_PINMUX(a, 12, a, periph)
/* pa12c_sercom2_pad0 */
#define PA12C_SERCOM2_PAD0 \
SAM_PINMUX(a, 12, c, periph)
/* pa12d_sercom4_pad0 */
#define PA12D_SERCOM4_PAD0 \
SAM_PINMUX(a, 12, d, periph)
/* pa12e_tc2_wo0 */
#define PA12E_TC2_WO0 \
SAM_PINMUX(a, 12, e, periph)
/* pa12h_ac_cmp0 */
#define PA12H_AC_CMP0 \
SAM_PINMUX(a, 12, h, periph)
/* pa13_gpio */
#define PA13_GPIO \
SAM_PINMUX(a, 13, gpio, gpio)
/* pa13a_eic_extint13 */
#define PA13A_EIC_EXTINT13 \
SAM_PINMUX(a, 13, a, periph)
/* pa13c_sercom2_pad1 */
#define PA13C_SERCOM2_PAD1 \
SAM_PINMUX(a, 13, c, periph)
/* pa13d_sercom4_pad1 */
#define PA13D_SERCOM4_PAD1 \
SAM_PINMUX(a, 13, d, periph)
/* pa13e_tc2_wo1 */
#define PA13E_TC2_WO1 \
SAM_PINMUX(a, 13, e, periph)
/* pa13h_ac_cmp1 */
#define PA13H_AC_CMP1 \
SAM_PINMUX(a, 13, h, periph)
/* pa14_gpio */
#define PA14_GPIO \
SAM_PINMUX(a, 14, gpio, gpio)
/* pa14a_eic_extint14 */
#define PA14A_EIC_EXTINT14 \
SAM_PINMUX(a, 14, a, periph)
/* pa14c_sercom2_pad2 */
#define PA14C_SERCOM2_PAD2 \
SAM_PINMUX(a, 14, c, periph)
/* pa14d_sercom4_pad2 */
#define PA14D_SERCOM4_PAD2 \
SAM_PINMUX(a, 14, d, periph)
/* pa14e_tc3_wo0 */
#define PA14E_TC3_WO0 \
SAM_PINMUX(a, 14, e, periph)
/* pa14h_gclk_io0 */
#define PA14H_GCLK_IO0 \
SAM_PINMUX(a, 14, h, periph)
/* pa15_gpio */
#define PA15_GPIO \
SAM_PINMUX(a, 15, gpio, gpio)
/* pa15a_eic_extint15 */
#define PA15A_EIC_EXTINT15 \
SAM_PINMUX(a, 15, a, periph)
/* pa15c_sercom2_pad3 */
#define PA15C_SERCOM2_PAD3 \
SAM_PINMUX(a, 15, c, periph)
/* pa15d_sercom4_pad3 */
#define PA15D_SERCOM4_PAD3 \
SAM_PINMUX(a, 15, d, periph)
/* pa15e_tc3_wo1 */
#define PA15E_TC3_WO1 \
SAM_PINMUX(a, 15, e, periph)
/* pa15h_gclk_io1 */
#define PA15H_GCLK_IO1 \
SAM_PINMUX(a, 15, h, periph)
/* pa16_gpio */
#define PA16_GPIO \
SAM_PINMUX(a, 16, gpio, gpio)
/* pa16a_eic_extint0 */
#define PA16A_EIC_EXTINT0 \
SAM_PINMUX(a, 16, a, periph)
/* pa16b_ptc_x4 */
#define PA16B_PTC_X4 \
SAM_PINMUX(a, 16, b, periph)
/* pa16c_sercom1_pad0 */
#define PA16C_SERCOM1_PAD0 \
SAM_PINMUX(a, 16, c, periph)
/* pa16d_sercom3_pad0 */
#define PA16D_SERCOM3_PAD0 \
SAM_PINMUX(a, 16, d, periph)
/* pa16f_tc2_wo0 */
#define PA16F_TC2_WO0 \
SAM_PINMUX(a, 16, f, periph)
/* pa16h_gclk_io2 */
#define PA16H_GCLK_IO2 \
SAM_PINMUX(a, 16, h, periph)
/* pa17_gpio */
#define PA17_GPIO \
SAM_PINMUX(a, 17, gpio, gpio)
/* pa17a_eic_extint1 */
#define PA17A_EIC_EXTINT1 \
SAM_PINMUX(a, 17, a, periph)
/* pa17b_ptc_x5 */
#define PA17B_PTC_X5 \
SAM_PINMUX(a, 17, b, periph)
/* pa17c_sercom1_pad1 */
#define PA17C_SERCOM1_PAD1 \
SAM_PINMUX(a, 17, c, periph)
/* pa17d_sercom3_pad1 */
#define PA17D_SERCOM3_PAD1 \
SAM_PINMUX(a, 17, d, periph)
/* pa17f_tc2_wo1 */
#define PA17F_TC2_WO1 \
SAM_PINMUX(a, 17, f, periph)
/* pa17h_gclk_io3 */
#define PA17H_GCLK_IO3 \
SAM_PINMUX(a, 17, h, periph)
/* pa18_gpio */
#define PA18_GPIO \
SAM_PINMUX(a, 18, gpio, gpio)
/* pa18a_eic_extint2 */
#define PA18A_EIC_EXTINT2 \
SAM_PINMUX(a, 18, a, periph)
/* pa18b_ptc_x6 */
#define PA18B_PTC_X6 \
SAM_PINMUX(a, 18, b, periph)
/* pa18c_sercom1_pad2 */
#define PA18C_SERCOM1_PAD2 \
SAM_PINMUX(a, 18, c, periph)
/* pa18d_sercom3_pad2 */
#define PA18D_SERCOM3_PAD2 \
SAM_PINMUX(a, 18, d, periph)
/* pa18f_tc3_wo0 */
#define PA18F_TC3_WO0 \
SAM_PINMUX(a, 18, f, periph)
/* pa18h_ac_cmp0 */
#define PA18H_AC_CMP0 \
SAM_PINMUX(a, 18, h, periph)
/* pa19_gpio */
#define PA19_GPIO \
SAM_PINMUX(a, 19, gpio, gpio)
/* pa19a_eic_extint3 */
#define PA19A_EIC_EXTINT3 \
SAM_PINMUX(a, 19, a, periph)
/* pa19b_ptc_x7 */
#define PA19B_PTC_X7 \
SAM_PINMUX(a, 19, b, periph)
/* pa19c_sercom1_pad3 */
#define PA19C_SERCOM1_PAD3 \
SAM_PINMUX(a, 19, c, periph)
/* pa19d_sercom3_pad3 */
#define PA19D_SERCOM3_PAD3 \
SAM_PINMUX(a, 19, d, periph)
/* pa19f_tc3_wo1 */
#define PA19F_TC3_WO1 \
SAM_PINMUX(a, 19, f, periph)
/* pa19g_iis0_sd */
#define PA19G_IIS0_SD \
SAM_PINMUX(a, 19, g, periph)
/* pa19h_ac_cmp1 */
#define PA19H_AC_CMP1 \
SAM_PINMUX(a, 19, h, periph)
/* pa20_gpio */
#define PA20_GPIO \
SAM_PINMUX(a, 20, gpio, gpio)
/* pa20a_eic_extint4 */
#define PA20A_EIC_EXTINT4 \
SAM_PINMUX(a, 20, a, periph)
/* pa20b_ptc_x8 */
#define PA20B_PTC_X8 \
SAM_PINMUX(a, 20, b, periph)
/* pa20c_sercom5_pad2 */
#define PA20C_SERCOM5_PAD2 \
SAM_PINMUX(a, 20, c, periph)
/* pa20d_sercom3_pad2 */
#define PA20D_SERCOM3_PAD2 \
SAM_PINMUX(a, 20, d, periph)
/* pa20e_tc7_wo0 */
#define PA20E_TC7_WO0 \
SAM_PINMUX(a, 20, e, periph)
/* pa20h_gclk_io4 */
#define PA20H_GCLK_IO4 \
SAM_PINMUX(a, 20, h, periph)
/* pa21_gpio */
#define PA21_GPIO \
SAM_PINMUX(a, 21, gpio, gpio)
/* pa21a_eic_extint5 */
#define PA21A_EIC_EXTINT5 \
SAM_PINMUX(a, 21, a, periph)
/* pa21b_ptc_x9 */
#define PA21B_PTC_X9 \
SAM_PINMUX(a, 21, b, periph)
/* pa21c_sercom5_pad3 */
#define PA21C_SERCOM5_PAD3 \
SAM_PINMUX(a, 21, c, periph)
/* pa21d_sercom3_pad3 */
#define PA21D_SERCOM3_PAD3 \
SAM_PINMUX(a, 21, d, periph)
/* pa21e_tc7_wo1 */
#define PA21E_TC7_WO1 \
SAM_PINMUX(a, 21, e, periph)
/* pa21h_gclk_io5 */
#define PA21H_GCLK_IO5 \
SAM_PINMUX(a, 21, h, periph)
/* pa22_gpio */
#define PA22_GPIO \
SAM_PINMUX(a, 22, gpio, gpio)
/* pa22a_eic_extint6 */
#define PA22A_EIC_EXTINT6 \
SAM_PINMUX(a, 22, a, periph)
/* pa22b_ptc_x10 */
#define PA22B_PTC_X10 \
SAM_PINMUX(a, 22, b, periph)
/* pa22c_sercom3_pad0 */
#define PA22C_SERCOM3_PAD0 \
SAM_PINMUX(a, 22, c, periph)
/* pa22d_sercom5_pad0 */
#define PA22D_SERCOM5_PAD0 \
SAM_PINMUX(a, 22, d, periph)
/* pa22f_tc4_wo0 */
#define PA22F_TC4_WO0 \
SAM_PINMUX(a, 22, f, periph)
/* pa22h_gclk_io6 */
#define PA22H_GCLK_IO6 \
SAM_PINMUX(a, 22, h, periph)
/* pa23_gpio */
#define PA23_GPIO \
SAM_PINMUX(a, 23, gpio, gpio)
/* pa23a_eic_extint7 */
#define PA23A_EIC_EXTINT7 \
SAM_PINMUX(a, 23, a, periph)
/* pa23b_ptc_x11 */
#define PA23B_PTC_X11 \
SAM_PINMUX(a, 23, b, periph)
/* pa23c_sercom3_pad1 */
#define PA23C_SERCOM3_PAD1 \
SAM_PINMUX(a, 23, c, periph)
/* pa23d_sercom5_pad1 */
#define PA23D_SERCOM5_PAD1 \
SAM_PINMUX(a, 23, d, periph)
/* pa23f_tc4_wo1 */
#define PA23F_TC4_WO1 \
SAM_PINMUX(a, 23, f, periph)
/* pa23h_gclk_io7 */
#define PA23H_GCLK_IO7 \
SAM_PINMUX(a, 23, h, periph)
/* pa24_gpio */
#define PA24_GPIO \
SAM_PINMUX(a, 24, gpio, gpio)
/* pa24a_eic_extint12 */
#define PA24A_EIC_EXTINT12 \
SAM_PINMUX(a, 24, a, periph)
/* pa24c_sercom3_pad2 */
#define PA24C_SERCOM3_PAD2 \
SAM_PINMUX(a, 24, c, periph)
/* pa24d_sercom5_pad2 */
#define PA24D_SERCOM5_PAD2 \
SAM_PINMUX(a, 24, d, periph)
/* pa24f_tc5_wo0 */
#define PA24F_TC5_WO0 \
SAM_PINMUX(a, 24, f, periph)
/* pa25_gpio */
#define PA25_GPIO \
SAM_PINMUX(a, 25, gpio, gpio)
/* pa25a_eic_extint13 */
#define PA25A_EIC_EXTINT13 \
SAM_PINMUX(a, 25, a, periph)
/* pa25c_sercom3_pad3 */
#define PA25C_SERCOM3_PAD3 \
SAM_PINMUX(a, 25, c, periph)
/* pa25d_sercom5_pad3 */
#define PA25D_SERCOM5_PAD3 \
SAM_PINMUX(a, 25, d, periph)
/* pa25f_tc5_wo1 */
#define PA25F_TC5_WO1 \
SAM_PINMUX(a, 25, f, periph)
/* pa27_gpio */
#define PA27_GPIO \
SAM_PINMUX(a, 27, gpio, gpio)
/* pa27a_eic_extint15 */
#define PA27A_EIC_EXTINT15 \
SAM_PINMUX(a, 27, a, periph)
/* pa27h_gclk_io0 */
#define PA27H_GCLK_IO0 \
SAM_PINMUX(a, 27, h, periph)
/* pa28_gpio */
#define PA28_GPIO \
SAM_PINMUX(a, 28, gpio, gpio)
/* pa28a_eic_extint8 */
#define PA28A_EIC_EXTINT8 \
SAM_PINMUX(a, 28, a, periph)
/* pa28h_gclk_io0 */
#define PA28H_GCLK_IO0 \
SAM_PINMUX(a, 28, h, periph)
/* pa30_gpio */
#define PA30_GPIO \
SAM_PINMUX(a, 30, gpio, gpio)
/* pa30a_eic_extint10 */
#define PA30A_EIC_EXTINT10 \
SAM_PINMUX(a, 30, a, periph)
/* pa30d_sercom1_pad2 */
#define PA30D_SERCOM1_PAD2 \
SAM_PINMUX(a, 30, d, periph)
/* pa30f_tc1_wo0 */
#define PA30F_TC1_WO0 \
SAM_PINMUX(a, 30, f, periph)
/* pa30g_swd_clk */
#define PA30G_SWD_CLK \
SAM_PINMUX(a, 30, g, periph)
/* pa30h_gclk_io0 */
#define PA30H_GCLK_IO0 \
SAM_PINMUX(a, 30, h, periph)
/* pa31_gpio */
#define PA31_GPIO \
SAM_PINMUX(a, 31, gpio, gpio)
/* pa31a_eic_extint11 */
#define PA31A_EIC_EXTINT11 \
SAM_PINMUX(a, 31, a, periph)
/* pa31d_sercom1_pad3 */
#define PA31D_SERCOM1_PAD3 \
SAM_PINMUX(a, 31, d, periph)
/* pa31f_tc1_wo1 */
#define PA31F_TC1_WO1 \
SAM_PINMUX(a, 31, f, periph)
/* pa31g_swd_io */
#define PA31G_SWD_IO \
SAM_PINMUX(a, 31, g, periph)
/* pb2_gpio */
#define PB2_GPIO \
SAM_PINMUX(b, 2, gpio, gpio)
/* pb2a_eic_extint2 */
#define PB2A_EIC_EXTINT2 \
SAM_PINMUX(b, 2, a, periph)
/* pb2b_adc_ain10 */
#define PB2B_ADC_AIN10 \
SAM_PINMUX(b, 2, b, periph)
/* pb2b_ptc_y8 */
#define PB2B_PTC_Y8 \
SAM_PINMUX(b, 2, b, periph)
/* pb2d_sercom5_pad0 */
#define PB2D_SERCOM5_PAD0 \
SAM_PINMUX(b, 2, d, periph)
/* pb2f_tc6_wo0 */
#define PB2F_TC6_WO0 \
SAM_PINMUX(b, 2, f, periph)
/* pb3_gpio */
#define PB3_GPIO \
SAM_PINMUX(b, 3, gpio, gpio)
/* pb3a_eic_extint3 */
#define PB3A_EIC_EXTINT3 \
SAM_PINMUX(b, 3, a, periph)
/* pb3b_adc_ain11 */
#define PB3B_ADC_AIN11 \
SAM_PINMUX(b, 3, b, periph)
/* pb3b_ptc_y9 */
#define PB3B_PTC_Y9 \
SAM_PINMUX(b, 3, b, periph)
/* pb3d_sercom5_pad1 */
#define PB3D_SERCOM5_PAD1 \
SAM_PINMUX(b, 3, d, periph)
/* pb3f_tc6_wo1 */
#define PB3F_TC6_WO1 \
SAM_PINMUX(b, 3, f, periph)
/* pb8_gpio */
#define PB8_GPIO \
SAM_PINMUX(b, 8, gpio, gpio)
/* pb8a_eic_extint8 */
#define PB8A_EIC_EXTINT8 \
SAM_PINMUX(b, 8, a, periph)
/* pb8b_adc_ain2 */
#define PB8B_ADC_AIN2 \
SAM_PINMUX(b, 8, b, periph)
/* pb8b_ptc_y14 */
#define PB8B_PTC_Y14 \
SAM_PINMUX(b, 8, b, periph)
/* pb8d_sercom4_pad0 */
#define PB8D_SERCOM4_PAD0 \
SAM_PINMUX(b, 8, d, periph)
/* pb8f_tc4_wo0 */
#define PB8F_TC4_WO0 \
SAM_PINMUX(b, 8, f, periph)
/* pb9_gpio */
#define PB9_GPIO \
SAM_PINMUX(b, 9, gpio, gpio)
/* pb9a_eic_extint9 */
#define PB9A_EIC_EXTINT9 \
SAM_PINMUX(b, 9, a, periph)
/* pb9b_adc_ain3 */
#define PB9B_ADC_AIN3 \
SAM_PINMUX(b, 9, b, periph)
/* pb9b_ptc_y15 */
#define PB9B_PTC_Y15 \
SAM_PINMUX(b, 9, b, periph)
/* pb9d_sercom4_pad1 */
#define PB9D_SERCOM4_PAD1 \
SAM_PINMUX(b, 9, d, periph)
/* pb9f_tc4_wo1 */
#define PB9F_TC4_WO1 \
SAM_PINMUX(b, 9, f, periph)
/* pb10_gpio */
#define PB10_GPIO \
SAM_PINMUX(b, 10, gpio, gpio)
/* pb10a_eic_extint10 */
#define PB10A_EIC_EXTINT10 \
SAM_PINMUX(b, 10, a, periph)
/* pb10d_sercom4_pad2 */
#define PB10D_SERCOM4_PAD2 \
SAM_PINMUX(b, 10, d, periph)
/* pb10f_tc5_wo0 */
#define PB10F_TC5_WO0 \
SAM_PINMUX(b, 10, f, periph)
/* pb10h_gclk_io4 */
#define PB10H_GCLK_IO4 \
SAM_PINMUX(b, 10, h, periph)
/* pb11_gpio */
#define PB11_GPIO \
SAM_PINMUX(b, 11, gpio, gpio)
/* pb11a_eic_extint11 */
#define PB11A_EIC_EXTINT11 \
SAM_PINMUX(b, 11, a, periph)
/* pb11d_sercom4_pad3 */
#define PB11D_SERCOM4_PAD3 \
SAM_PINMUX(b, 11, d, periph)
/* pb11f_tc5_wo1 */
#define PB11F_TC5_WO1 \
SAM_PINMUX(b, 11, f, periph)
/* pb11h_gclk_io5 */
#define PB11H_GCLK_IO5 \
SAM_PINMUX(b, 11, h, periph)
/* pb22_gpio */
#define PB22_GPIO \
SAM_PINMUX(b, 22, gpio, gpio)
/* pb22a_eic_extint6 */
#define PB22A_EIC_EXTINT6 \
SAM_PINMUX(b, 22, a, periph)
/* pb22d_sercom5_pad2 */
#define PB22D_SERCOM5_PAD2 \
SAM_PINMUX(b, 22, d, periph)
/* pb22f_tc7_wo0 */
#define PB22F_TC7_WO0 \
SAM_PINMUX(b, 22, f, periph)
/* pb22h_gclk_io0 */
#define PB22H_GCLK_IO0 \
SAM_PINMUX(b, 22, h, periph)
/* pb23_gpio */
#define PB23_GPIO \
SAM_PINMUX(b, 23, gpio, gpio)
/* pb23a_eic_extint7 */
#define PB23A_EIC_EXTINT7 \
SAM_PINMUX(b, 23, a, periph)
/* pb23d_sercom5_pad3 */
#define PB23D_SERCOM5_PAD3 \
SAM_PINMUX(b, 23, d, periph)
/* pb23f_tc7_wo1 */
#define PB23F_TC7_WO1 \
SAM_PINMUX(b, 23, f, periph)
/* pb23h_gclk_io1 */
#define PB23H_GCLK_IO1 \
SAM_PINMUX(b, 23, h, periph)

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/*
* Autogenerated file
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <dt-bindings/pinctrl/atmel_sam_pinctrl.h>
/* pa0_gpio */
#define PA0_GPIO \
SAM_PINMUX(a, 0, gpio, gpio)
/* pa0a_eic_extint0 */
#define PA0A_EIC_EXTINT0 \
SAM_PINMUX(a, 0, a, periph)
/* pa0d_sercom1_pad0 */
#define PA0D_SERCOM1_PAD0 \
SAM_PINMUX(a, 0, d, periph)
/* pa0e_tcc2_wo0 */
#define PA0E_TCC2_WO0 \
SAM_PINMUX(a, 0, e, periph)
/* pa1_gpio */
#define PA1_GPIO \
SAM_PINMUX(a, 1, gpio, gpio)
/* pa1a_eic_extint1 */
#define PA1A_EIC_EXTINT1 \
SAM_PINMUX(a, 1, a, periph)
/* pa1d_sercom1_pad1 */
#define PA1D_SERCOM1_PAD1 \
SAM_PINMUX(a, 1, d, periph)
/* pa1e_tcc2_wo1 */
#define PA1E_TCC2_WO1 \
SAM_PINMUX(a, 1, e, periph)
/* pa2_gpio */
#define PA2_GPIO \
SAM_PINMUX(a, 2, gpio, gpio)
/* pa2a_eic_extint2 */
#define PA2A_EIC_EXTINT2 \
SAM_PINMUX(a, 2, a, periph)
/* pa2b_adc_ain0 */
#define PA2B_ADC_AIN0 \
SAM_PINMUX(a, 2, b, periph)
/* pa2b_ptc_y0 */
#define PA2B_PTC_Y0 \
SAM_PINMUX(a, 2, b, periph)
/* pa2b_dac_vout */
#define PA2B_DAC_VOUT \
SAM_PINMUX(a, 2, b, periph)
/* pa2f_tcc3_wo0 */
#define PA2F_TCC3_WO0 \
SAM_PINMUX(a, 2, f, periph)
/* pa3_gpio */
#define PA3_GPIO \
SAM_PINMUX(a, 3, gpio, gpio)
/* pa3a_eic_extint3 */
#define PA3A_EIC_EXTINT3 \
SAM_PINMUX(a, 3, a, periph)
/* pa3b_adc_dac_vrfea */
#define PA3B_ADC_DAC_VRFEA \
SAM_PINMUX(a, 3, b, periph)
/* pa3b_adc_ain1 */
#define PA3B_ADC_AIN1 \
SAM_PINMUX(a, 3, b, periph)
/* pa3b_ptc_y1 */
#define PA3B_PTC_Y1 \
SAM_PINMUX(a, 3, b, periph)
/* pa3f_tcc3_wo1 */
#define PA3F_TCC3_WO1 \
SAM_PINMUX(a, 3, f, periph)
/* pa4_gpio */
#define PA4_GPIO \
SAM_PINMUX(a, 4, gpio, gpio)
/* pa4a_eic_extint4 */
#define PA4A_EIC_EXTINT4 \
SAM_PINMUX(a, 4, a, periph)
/* pa4b_adc_vrefb */
#define PA4B_ADC_VREFB \
SAM_PINMUX(a, 4, b, periph)
/* pa4b_adc_ain4 */
#define PA4B_ADC_AIN4 \
SAM_PINMUX(a, 4, b, periph)
/* pa4b_ac_ain0 */
#define PA4B_AC_AIN0 \
SAM_PINMUX(a, 4, b, periph)
/* pa4b_ptc_y2 */
#define PA4B_PTC_Y2 \
SAM_PINMUX(a, 4, b, periph)
/* pa4d_sercom0_pad0 */
#define PA4D_SERCOM0_PAD0 \
SAM_PINMUX(a, 4, d, periph)
/* pa4e_tcc0_wo0 */
#define PA4E_TCC0_WO0 \
SAM_PINMUX(a, 4, e, periph)
/* pa4f_tcc3_wo2 */
#define PA4F_TCC3_WO2 \
SAM_PINMUX(a, 4, f, periph)
/* pa5_gpio */
#define PA5_GPIO \
SAM_PINMUX(a, 5, gpio, gpio)
/* pa5a_eic_extint5 */
#define PA5A_EIC_EXTINT5 \
SAM_PINMUX(a, 5, a, periph)
/* pa5b_adc_ain5 */
#define PA5B_ADC_AIN5 \
SAM_PINMUX(a, 5, b, periph)
/* pa5b_ac_ain1 */
#define PA5B_AC_AIN1 \
SAM_PINMUX(a, 5, b, periph)
/* pa5b_ptc_y3 */
#define PA5B_PTC_Y3 \
SAM_PINMUX(a, 5, b, periph)
/* pa5d_sercom0_pad1 */
#define PA5D_SERCOM0_PAD1 \
SAM_PINMUX(a, 5, d, periph)
/* pa5e_tcc0_wo1 */
#define PA5E_TCC0_WO1 \
SAM_PINMUX(a, 5, e, periph)
/* pa5f_tcc3_wo3 */
#define PA5F_TCC3_WO3 \
SAM_PINMUX(a, 5, f, periph)
/* pa6_gpio */
#define PA6_GPIO \
SAM_PINMUX(a, 6, gpio, gpio)
/* pa6a_eic_extint6 */
#define PA6A_EIC_EXTINT6 \
SAM_PINMUX(a, 6, a, periph)
/* pa6b_adc_ain6 */
#define PA6B_ADC_AIN6 \
SAM_PINMUX(a, 6, b, periph)
/* pa6b_ac_ain2 */
#define PA6B_AC_AIN2 \
SAM_PINMUX(a, 6, b, periph)
/* pa6b_ptc_y4 */
#define PA6B_PTC_Y4 \
SAM_PINMUX(a, 6, b, periph)
/* pa6d_sercom0_pad2 */
#define PA6D_SERCOM0_PAD2 \
SAM_PINMUX(a, 6, d, periph)
/* pa6e_tcc1_wo0 */
#define PA6E_TCC1_WO0 \
SAM_PINMUX(a, 6, e, periph)
/* pa6f_tcc3_wo4 */
#define PA6F_TCC3_WO4 \
SAM_PINMUX(a, 6, f, periph)
/* pa7_gpio */
#define PA7_GPIO \
SAM_PINMUX(a, 7, gpio, gpio)
/* pa7a_eic_extint7 */
#define PA7A_EIC_EXTINT7 \
SAM_PINMUX(a, 7, a, periph)
/* pa7b_adc_ain7 */
#define PA7B_ADC_AIN7 \
SAM_PINMUX(a, 7, b, periph)
/* pa7b_ac_ain3 */
#define PA7B_AC_AIN3 \
SAM_PINMUX(a, 7, b, periph)
/* pa7b_ptc_y5 */
#define PA7B_PTC_Y5 \
SAM_PINMUX(a, 7, b, periph)
/* pa7d_sercom0_pad3 */
#define PA7D_SERCOM0_PAD3 \
SAM_PINMUX(a, 7, d, periph)
/* pa7e_tcc0_wo1 */
#define PA7E_TCC0_WO1 \
SAM_PINMUX(a, 7, e, periph)
/* pa7f_tcc3_wo5 */
#define PA7F_TCC3_WO5 \
SAM_PINMUX(a, 7, f, periph)
/* pa7g_iis0_sd */
#define PA7G_IIS0_SD \
SAM_PINMUX(a, 7, g, periph)
/* pa8_gpio */
#define PA8_GPIO \
SAM_PINMUX(a, 8, gpio, gpio)
/* pa8a_eic_nmi */
#define PA8A_EIC_NMI \
SAM_PINMUX(a, 8, a, periph)
/* pa8b_adc_ain16 */
#define PA8B_ADC_AIN16 \
SAM_PINMUX(a, 8, b, periph)
/* pa8b_ptc_x0 */
#define PA8B_PTC_X0 \
SAM_PINMUX(a, 8, b, periph)
/* pa8c_sercom0_pad0 */
#define PA8C_SERCOM0_PAD0 \
SAM_PINMUX(a, 8, c, periph)
/* pa8d_sercom2_pad0 */
#define PA8D_SERCOM2_PAD0 \
SAM_PINMUX(a, 8, d, periph)
/* pa8e_tcc0_wo0 */
#define PA8E_TCC0_WO0 \
SAM_PINMUX(a, 8, e, periph)
/* pa8f_tcc1_wo2 */
#define PA8F_TCC1_WO2 \
SAM_PINMUX(a, 8, f, periph)
/* pa8g_iis1_sd */
#define PA8G_IIS1_SD \
SAM_PINMUX(a, 8, g, periph)
/* pa9_gpio */
#define PA9_GPIO \
SAM_PINMUX(a, 9, gpio, gpio)
/* pa9a_eic_extint9 */
#define PA9A_EIC_EXTINT9 \
SAM_PINMUX(a, 9, a, periph)
/* pa9b_adc_ain17 */
#define PA9B_ADC_AIN17 \
SAM_PINMUX(a, 9, b, periph)
/* pa9b_ptc_x1 */
#define PA9B_PTC_X1 \
SAM_PINMUX(a, 9, b, periph)
/* pa9c_sercom0_pad1 */
#define PA9C_SERCOM0_PAD1 \
SAM_PINMUX(a, 9, c, periph)
/* pa9d_sercom2_pad1 */
#define PA9D_SERCOM2_PAD1 \
SAM_PINMUX(a, 9, d, periph)
/* pa9e_tcc0_wo1 */
#define PA9E_TCC0_WO1 \
SAM_PINMUX(a, 9, e, periph)
/* pa9f_tcc1_wo3 */
#define PA9F_TCC1_WO3 \
SAM_PINMUX(a, 9, f, periph)
/* pa9g_iis0_mck */
#define PA9G_IIS0_MCK \
SAM_PINMUX(a, 9, g, periph)
/* pa10_gpio */
#define PA10_GPIO \
SAM_PINMUX(a, 10, gpio, gpio)
/* pa10a_eic_extint10 */
#define PA10A_EIC_EXTINT10 \
SAM_PINMUX(a, 10, a, periph)
/* pa10b_adc_ain18 */
#define PA10B_ADC_AIN18 \
SAM_PINMUX(a, 10, b, periph)
/* pa10b_ptc_x2 */
#define PA10B_PTC_X2 \
SAM_PINMUX(a, 10, b, periph)
/* pa10c_sercom0_pad2 */
#define PA10C_SERCOM0_PAD2 \
SAM_PINMUX(a, 10, c, periph)
/* pa10d_sercom2_pad2 */
#define PA10D_SERCOM2_PAD2 \
SAM_PINMUX(a, 10, d, periph)
/* pa10e_tcc1_wo0 */
#define PA10E_TCC1_WO0 \
SAM_PINMUX(a, 10, e, periph)
/* pa10f_tcc0_wo2 */
#define PA10F_TCC0_WO2 \
SAM_PINMUX(a, 10, f, periph)
/* pa10g_iis0_sck */
#define PA10G_IIS0_SCK \
SAM_PINMUX(a, 10, g, periph)
/* pa10h_gclk_io4 */
#define PA10H_GCLK_IO4 \
SAM_PINMUX(a, 10, h, periph)
/* pa11_gpio */
#define PA11_GPIO \
SAM_PINMUX(a, 11, gpio, gpio)
/* pa11a_eic_extint11 */
#define PA11A_EIC_EXTINT11 \
SAM_PINMUX(a, 11, a, periph)
/* pa11b_adc_ain19 */
#define PA11B_ADC_AIN19 \
SAM_PINMUX(a, 11, b, periph)
/* pa11b_ptc_x3 */
#define PA11B_PTC_X3 \
SAM_PINMUX(a, 11, b, periph)
/* pa11c_sercom0_pad3 */
#define PA11C_SERCOM0_PAD3 \
SAM_PINMUX(a, 11, c, periph)
/* pa11d_sercom2_pad3 */
#define PA11D_SERCOM2_PAD3 \
SAM_PINMUX(a, 11, d, periph)
/* pa11e_tcc1_wo1 */
#define PA11E_TCC1_WO1 \
SAM_PINMUX(a, 11, e, periph)
/* pa11f_tcc0_wo3 */
#define PA11F_TCC0_WO3 \
SAM_PINMUX(a, 11, f, periph)
/* pa11g_iis0_fs */
#define PA11G_IIS0_FS \
SAM_PINMUX(a, 11, g, periph)
/* pa11h_gclk_io5 */
#define PA11H_GCLK_IO5 \
SAM_PINMUX(a, 11, h, periph)
/* pa14_gpio */
#define PA14_GPIO \
SAM_PINMUX(a, 14, gpio, gpio)
/* pa14a_eic_extint14 */
#define PA14A_EIC_EXTINT14 \
SAM_PINMUX(a, 14, a, periph)
/* pa14c_sercom2_pad2 */
#define PA14C_SERCOM2_PAD2 \
SAM_PINMUX(a, 14, c, periph)
/* pa14d_sercom4_pad2 */
#define PA14D_SERCOM4_PAD2 \
SAM_PINMUX(a, 14, d, periph)
/* pa14e_tc3_wo0 */
#define PA14E_TC3_WO0 \
SAM_PINMUX(a, 14, e, periph)
/* pa14f_tcc0_wo4 */
#define PA14F_TCC0_WO4 \
SAM_PINMUX(a, 14, f, periph)
/* pa14h_gclk_io0 */
#define PA14H_GCLK_IO0 \
SAM_PINMUX(a, 14, h, periph)
/* pa15_gpio */
#define PA15_GPIO \
SAM_PINMUX(a, 15, gpio, gpio)
/* pa15a_eic_extint15 */
#define PA15A_EIC_EXTINT15 \
SAM_PINMUX(a, 15, a, periph)
/* pa15c_sercom2_pad3 */
#define PA15C_SERCOM2_PAD3 \
SAM_PINMUX(a, 15, c, periph)
/* pa15d_sercom4_pad3 */
#define PA15D_SERCOM4_PAD3 \
SAM_PINMUX(a, 15, d, periph)
/* pa15e_tc3_wo1 */
#define PA15E_TC3_WO1 \
SAM_PINMUX(a, 15, e, periph)
/* pa15f_tcc0_wo5 */
#define PA15F_TCC0_WO5 \
SAM_PINMUX(a, 15, f, periph)
/* pa15h_gclk_io1 */
#define PA15H_GCLK_IO1 \
SAM_PINMUX(a, 15, h, periph)
/* pa16_gpio */
#define PA16_GPIO \
SAM_PINMUX(a, 16, gpio, gpio)
/* pa16a_eic_extint0 */
#define PA16A_EIC_EXTINT0 \
SAM_PINMUX(a, 16, a, periph)
/* pa16b_ptc_x4 */
#define PA16B_PTC_X4 \
SAM_PINMUX(a, 16, b, periph)
/* pa16c_sercom1_pad0 */
#define PA16C_SERCOM1_PAD0 \
SAM_PINMUX(a, 16, c, periph)
/* pa16d_sercom3_pad0 */
#define PA16D_SERCOM3_PAD0 \
SAM_PINMUX(a, 16, d, periph)
/* pa16e_tcc2_wo0 */
#define PA16E_TCC2_WO0 \
SAM_PINMUX(a, 16, e, periph)
/* pa16f_tcc0_wo6 */
#define PA16F_TCC0_WO6 \
SAM_PINMUX(a, 16, f, periph)
/* pa16h_gclk_io2 */
#define PA16H_GCLK_IO2 \
SAM_PINMUX(a, 16, h, periph)
/* pa17_gpio */
#define PA17_GPIO \
SAM_PINMUX(a, 17, gpio, gpio)
/* pa17a_eic_extint1 */
#define PA17A_EIC_EXTINT1 \
SAM_PINMUX(a, 17, a, periph)
/* pa17b_ptc_x5 */
#define PA17B_PTC_X5 \
SAM_PINMUX(a, 17, b, periph)
/* pa17c_sercom1_pad1 */
#define PA17C_SERCOM1_PAD1 \
SAM_PINMUX(a, 17, c, periph)
/* pa17d_sercom3_pad1 */
#define PA17D_SERCOM3_PAD1 \
SAM_PINMUX(a, 17, d, periph)
/* pa17e_tcc2_wo1 */
#define PA17E_TCC2_WO1 \
SAM_PINMUX(a, 17, e, periph)
/* pa17f_tcc0_wo7 */
#define PA17F_TCC0_WO7 \
SAM_PINMUX(a, 17, f, periph)
/* pa17h_gclk_io3 */
#define PA17H_GCLK_IO3 \
SAM_PINMUX(a, 17, h, periph)
/* pa18_gpio */
#define PA18_GPIO \
SAM_PINMUX(a, 18, gpio, gpio)
/* pa18a_eic_extint2 */
#define PA18A_EIC_EXTINT2 \
SAM_PINMUX(a, 18, a, periph)
/* pa18b_ptc_x6 */
#define PA18B_PTC_X6 \
SAM_PINMUX(a, 18, b, periph)
/* pa18c_sercom1_pad2 */
#define PA18C_SERCOM1_PAD2 \
SAM_PINMUX(a, 18, c, periph)
/* pa18d_sercom3_pad2 */
#define PA18D_SERCOM3_PAD2 \
SAM_PINMUX(a, 18, d, periph)
/* pa18f_tc3_wo0 */
#define PA18F_TC3_WO0 \
SAM_PINMUX(a, 18, f, periph)
/* pa18f_tcc0_wo2 */
#define PA18F_TCC0_WO2 \
SAM_PINMUX(a, 18, f, periph)
/* pa18h_ac_cmp0 */
#define PA18H_AC_CMP0 \
SAM_PINMUX(a, 18, h, periph)
/* pa19_gpio */
#define PA19_GPIO \
SAM_PINMUX(a, 19, gpio, gpio)
/* pa19a_eic_extint3 */
#define PA19A_EIC_EXTINT3 \
SAM_PINMUX(a, 19, a, periph)
/* pa19b_ptc_x7 */
#define PA19B_PTC_X7 \
SAM_PINMUX(a, 19, b, periph)
/* pa19c_sercom1_pad3 */
#define PA19C_SERCOM1_PAD3 \
SAM_PINMUX(a, 19, c, periph)
/* pa19d_sercom3_pad3 */
#define PA19D_SERCOM3_PAD3 \
SAM_PINMUX(a, 19, d, periph)
/* pa19e_tc3_wo1 */
#define PA19E_TC3_WO1 \
SAM_PINMUX(a, 19, e, periph)
/* pa19f_tcc0_wo3 */
#define PA19F_TCC0_WO3 \
SAM_PINMUX(a, 19, f, periph)
/* pa19g_iis0_sd */
#define PA19G_IIS0_SD \
SAM_PINMUX(a, 19, g, periph)
/* pa19h_ac_cmp1 */
#define PA19H_AC_CMP1 \
SAM_PINMUX(a, 19, h, periph)
/* pa22_gpio */
#define PA22_GPIO \
SAM_PINMUX(a, 22, gpio, gpio)
/* pa22a_eic_extint6 */
#define PA22A_EIC_EXTINT6 \
SAM_PINMUX(a, 22, a, periph)
/* pa22b_ptc_x10 */
#define PA22B_PTC_X10 \
SAM_PINMUX(a, 22, b, periph)
/* pa22c_sercom3_pad0 */
#define PA22C_SERCOM3_PAD0 \
SAM_PINMUX(a, 22, c, periph)
/* pa22d_sercom5_pad0 */
#define PA22D_SERCOM5_PAD0 \
SAM_PINMUX(a, 22, d, periph)
/* pa22e_tc4_wo0 */
#define PA22E_TC4_WO0 \
SAM_PINMUX(a, 22, e, periph)
/* pa22f_tcc0_wo4 */
#define PA22F_TCC0_WO4 \
SAM_PINMUX(a, 22, f, periph)
/* pa22h_gclk_io6 */
#define PA22H_GCLK_IO6 \
SAM_PINMUX(a, 22, h, periph)
/* pa23_gpio */
#define PA23_GPIO \
SAM_PINMUX(a, 23, gpio, gpio)
/* pa23a_eic_extint7 */
#define PA23A_EIC_EXTINT7 \
SAM_PINMUX(a, 23, a, periph)
/* pa23b_ptc_x11 */
#define PA23B_PTC_X11 \
SAM_PINMUX(a, 23, b, periph)
/* pa23c_sercom3_pad1 */
#define PA23C_SERCOM3_PAD1 \
SAM_PINMUX(a, 23, c, periph)
/* pa23d_sercom5_pad1 */
#define PA23D_SERCOM5_PAD1 \
SAM_PINMUX(a, 23, d, periph)
/* pa23e_tc4_wo1 */
#define PA23E_TC4_WO1 \
SAM_PINMUX(a, 23, e, periph)
/* pa23f_tcc0_wo5 */
#define PA23F_TCC0_WO5 \
SAM_PINMUX(a, 23, f, periph)
/* pa23g_usb_sof */
#define PA23G_USB_SOF \
SAM_PINMUX(a, 23, g, periph)
/* pa23h_gclk_io7 */
#define PA23H_GCLK_IO7 \
SAM_PINMUX(a, 23, h, periph)
/* pa24_gpio */
#define PA24_GPIO \
SAM_PINMUX(a, 24, gpio, gpio)
/* pa24a_eic_extint12 */
#define PA24A_EIC_EXTINT12 \
SAM_PINMUX(a, 24, a, periph)
/* pa24c_sercom3_pad2 */
#define PA24C_SERCOM3_PAD2 \
SAM_PINMUX(a, 24, c, periph)
/* pa24d_sercom5_pad2 */
#define PA24D_SERCOM5_PAD2 \
SAM_PINMUX(a, 24, d, periph)
/* pa24e_tc5_wo0 */
#define PA24E_TC5_WO0 \
SAM_PINMUX(a, 24, e, periph)
/* pa24f_tcc1_wo2 */
#define PA24F_TCC1_WO2 \
SAM_PINMUX(a, 24, f, periph)
/* pa24g_usb_dm */
#define PA24G_USB_DM \
SAM_PINMUX(a, 24, g, periph)
/* pa25_gpio */
#define PA25_GPIO \
SAM_PINMUX(a, 25, gpio, gpio)
/* pa25a_eic_extint13 */
#define PA25A_EIC_EXTINT13 \
SAM_PINMUX(a, 25, a, periph)
/* pa25c_sercom3_pad3 */
#define PA25C_SERCOM3_PAD3 \
SAM_PINMUX(a, 25, c, periph)
/* pa25d_sercom5_pad3 */
#define PA25D_SERCOM5_PAD3 \
SAM_PINMUX(a, 25, d, periph)
/* pa25e_tc5_wo1 */
#define PA25E_TC5_WO1 \
SAM_PINMUX(a, 25, e, periph)
/* pa25f_tcc1_wo3 */
#define PA25F_TCC1_WO3 \
SAM_PINMUX(a, 25, f, periph)
/* pa25g_usb_dp */
#define PA25G_USB_DP \
SAM_PINMUX(a, 25, g, periph)
/* pa27_gpio */
#define PA27_GPIO \
SAM_PINMUX(a, 27, gpio, gpio)
/* pa27a_eic_extint15 */
#define PA27A_EIC_EXTINT15 \
SAM_PINMUX(a, 27, a, periph)
/* pa27f_tcc3_wo6 */
#define PA27F_TCC3_WO6 \
SAM_PINMUX(a, 27, f, periph)
/* pa27h_gclk_io0 */
#define PA27H_GCLK_IO0 \
SAM_PINMUX(a, 27, h, periph)
/* pa28_gpio */
#define PA28_GPIO \
SAM_PINMUX(a, 28, gpio, gpio)
/* pa28a_eic_extint8 */
#define PA28A_EIC_EXTINT8 \
SAM_PINMUX(a, 28, a, periph)
/* pa28f_tcc3_wo7 */
#define PA28F_TCC3_WO7 \
SAM_PINMUX(a, 28, f, periph)
/* pa28h_gclk_io0 */
#define PA28H_GCLK_IO0 \
SAM_PINMUX(a, 28, h, periph)
/* pa30_gpio */
#define PA30_GPIO \
SAM_PINMUX(a, 30, gpio, gpio)
/* pa30a_eic_extint10 */
#define PA30A_EIC_EXTINT10 \
SAM_PINMUX(a, 30, a, periph)
/* pa30d_sercom1_pad2 */
#define PA30D_SERCOM1_PAD2 \
SAM_PINMUX(a, 30, d, periph)
/* pa30e_tcc1_wo0 */
#define PA30E_TCC1_WO0 \
SAM_PINMUX(a, 30, e, periph)
/* pa30f_tcc3_wo4 */
#define PA30F_TCC3_WO4 \
SAM_PINMUX(a, 30, f, periph)
/* pa30g_swd_clk */
#define PA30G_SWD_CLK \
SAM_PINMUX(a, 30, g, periph)
/* pa30h_gclk_io0 */
#define PA30H_GCLK_IO0 \
SAM_PINMUX(a, 30, h, periph)
/* pa31_gpio */
#define PA31_GPIO \
SAM_PINMUX(a, 31, gpio, gpio)
/* pa31a_eic_extint11 */
#define PA31A_EIC_EXTINT11 \
SAM_PINMUX(a, 31, a, periph)
/* pa31d_sercom1_pad3 */
#define PA31D_SERCOM1_PAD3 \
SAM_PINMUX(a, 31, d, periph)
/* pa31e_tcc1_wo1 */
#define PA31E_TCC1_WO1 \
SAM_PINMUX(a, 31, e, periph)
/* pa31f_tcc3_wo5 */
#define PA31F_TCC3_WO5 \
SAM_PINMUX(a, 31, f, periph)
/* pa31g_swd_io */
#define PA31G_SWD_IO \
SAM_PINMUX(a, 31, g, periph)

1122
include/dt-bindings/pinctrl/samd21-da1gXabcd-pinctrl.h Normal file
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1431
include/dt-bindings/pinctrl/samd21-da1jXabcd-pinctrl.h Normal file
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541
pinconfigs/sam-d2x-da1-abcd.yml Normal file
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# Copyright (c) 2022 Gerson Fernando Budke
# SPDX-License-Identifier: Apache-2.0
#
# Sources:
# - SAM_D20_ Family_Datasheet_DS60001504C (Revision C - 11/2019)
# - SAM_D21_DA1_Family_DataSheet_DS40001882F (Revision F - 03/2020)
#
# Pin codes:
#
# - 32 pins: e
# - 48 pins: g
# - 64 pins: j
#
# SoC Revision (variant) supported:
#
# - SAMD20
# - A = Default Variant
# - B = Improved Low Power
#
# - SAMD21/SAMDA1
# - A = Default Variant
# - B = Added RWW support for 32 KB and 64 KB memory options
# - C = Silicon revision F for WLCSP45 package option
# - D = Silicon Revision G with RWW Support in 128KB memory options
model: atmel,sam
family: d2x-da1
map: SAM_PINMUX
series: [d20, d21-da1]
revisions:
d20: ab
d21-da1: abcd
variants:
- pincode: e
series: [d20, d21-da1]
- pincode: g
series: [d20, d21-da1]
exception: y
- pincode: j
series: [d20, d21-da1]
pins:
pa00:
pincodes: [e, g, j]
periph:
- [a, eic, extint0]
- [d, sercom1, pad0]
- [e, tcc2, wo0, [d20]]
- [f, tc2, wo0, [d21-da1]]
pa01:
pincodes: [e, g, j]
periph:
- [a, eic, extint1]
- [d, sercom1, pad1]
- [e, tcc2, wo1, [d20]]
- [f, tc2, wo1, [d21-da1]]
pa02:
pincodes: [e, g, j]
periph:
- [a, eic, extint2]
- [b, adc, ain0]
- [b, ptc, y0]
- [b, dac, vout]
- [f, tcc3, wo0, [d20]]
pa03:
pincodes: [e, g, j]
periph:
- [a, eic, extint3]
- [b, adc_dac, vrfea]
- [b, adc, ain1]
- [b, ptc, y1]
- [f, tcc3, wo1, [d20]]
pb04:
pincodes: [j]
periph:
- [a, eic, extint4]
- [b, adc, ain12]
- [b, ptc, y10]
pb05:
pincodes: [j]
periph:
- [a, eic, extint5]
- [b, adc, ain13]
- [b, ptc, y11]
pb06:
pincodes: [j]
periph:
- [a, eic, extint6]
- [b, adc, ain14]
- [b, ptc, y12]
pb07:
pincodes: [j]
periph:
- [a, eic, extint7]
- [b, adc, ain15]
- [b, ptc, y13]
pb08:
pincodes: [g, j]
periph:
- [a, eic, extint8]
- [b, adc, ain2]
- [b, ptc, y14]
- [d, sercom4, pad0]
- [e, tc4, wo0, [d20]]
- [f, tcc3, wo6, [d20]]
- [f, tc4, wo0, [d21-da1]]
pb09:
pincodes: [g, j]
periph:
- [a, eic, extint9]
- [b, adc, ain3]
- [b, ptc, y15]
- [d, sercom4, pad1]
- [e, tc4, wo1, [d20]]
- [f, tcc3, wo7, [d20]]
- [f, tc4, wo1, [d21-da1]]
pa04:
pincodes: [e, g, j]
periph:
- [a, eic, extint4]
- [b, adc, vrefb]
- [b, adc, ain4]
- [b, ac, ain0]
- [b, ptc, y2]
- [d, sercom0, pad0]
- [e, tcc0, wo0, [d20]]
- [f, tcc3, wo2, [d20]]
- [f, tc0, wo0, [d21-da1]]
pa05:
pincodes: [e, g, j]
periph:
- [a, eic, extint5]
- [b, adc, ain5]
- [b, ac, ain1]
- [b, ptc, y3]
- [d, sercom0, pad1]
- [e, tcc0, wo1, [d20]]
- [f, tcc3, wo3, [d20]]
- [f, tc0, wo1, [d21-da1]]
pa06:
pincodes: [e, g, j]
periph:
- [a, eic, extint6]
- [b, adc, ain6]
- [b, ac, ain2]
- [b, ptc, y4]
- [d, sercom0, pad2]
- [e, tcc1, wo0, [d20]]
- [f, tcc3, wo4, [d20]]
- [f, tc1, wo0, [d21-da1]]
pa07:
pincodes: [e, g, j]
periph:
- [a, eic, extint7]
- [b, adc, ain7]
- [b, ac, ain3]
- [b, ptc, y5]
- [d, sercom0, pad3]
- [e, tcc0, wo1, [d20]]
- [f, tcc3, wo5, [d20]]
- [f, tc1, wo1, [d21-da1]]
- [g, iis0, sd, [d20]]
pa08:
pincodes: [e, g, j]
periph:
- [a, eic, nmi]
- [b, adc, ain16]
- [b, ptc, x0]
- [c, sercom0, pad0]
- [d, sercom2, pad0]
- [e, tcc0, wo0, [d20]]
- [e, tc0, wo0, [d21-da1]]
- [f, tcc1, wo2, [d20]]
- [g, iis1, sd, [d20]]
pa09:
pincodes: [e, g, j]
periph:
- [a, eic, extint9]
- [b, adc, ain17]
- [b, ptc, x1]
- [c, sercom0, pad1]
- [d, sercom2, pad1]
- [e, tcc0, wo1, [d20]]
- [e, tc0, wo1, [d21-da1]]
- [f, tcc1, wo3, [d20]]
- [g, iis0, mck, [d20]]
pa10:
pincodes: [e, g, j]
periph:
- [a, eic, extint10]
- [b, adc, ain18]
- [b, ptc, x2]
- [c, sercom0, pad2]
- [d, sercom2, pad2]
- [e, tcc1, wo0, [d20]]
- [e, tc1, wo0, [d21-da1]]
- [f, tcc0, wo2, [d20]]
- [g, iis0, sck, [d20]]
- [h, gclk, io4]
pa11:
pincodes: [e, g, j]
periph:
- [a, eic, extint11]
- [b, adc, ain19]
- [b, ptc, x3]
- [c, sercom0, pad3]
- [d, sercom2, pad3]
- [e, tcc1, wo1, [d20]]
- [e, tc1, wo1, [d21-da1]]
- [f, tcc0, wo3, [d20]]
- [g, iis0, fs, [d20]]
- [h, gclk, io5]
pb10:
pincodes: [g, j]
periph:
- [a, eic, extint10]
- [d, sercom4, pad2]
- [e, tc5, wo0, [d20]]
- [f, tcc0, wo4, [d20]]
- [f, tc5, wo0, [d21-da1]]
- [g, iis1, mck, [d20]]
- [h, gclk, io4]
pb11:
pincodes: [g, j]
periph:
- [a, eic, extint11]
- [d, sercom4, pad3]
- [e, tc5, wo1, [d20]]
- [f, tcc0, wo5, [d20]]
- [f, tc5, wo1, [d21-da1]]
- [g, iis1, sck, [d20]]
- [h, gclk, io5]
pb12:
pincodes: [j]
periph:
- [a, eic, extint12]
- [b, ptc, x12]
- [c, sercom4, pad0]
- [e, tc4, wo0]
- [f, tcc0, wo6, [d20]]
- [g, iis1, fs, [d20]]
- [h, gclk, io6]
pb13:
pincodes: [j]
periph:
- [a, eic, extint13]
- [b, ptc, x13]
- [c, sercom4, pad1]
- [e, tc4, wo1]
- [f, tcc0, wo7, [d20]]
- [h, gclk, io7]
pb14:
pincodes: [j]
periph:
- [a, eic, extint14]
- [b, ptc, x14]
- [c, sercom4, pad2]
- [e, tc5, wo0]
- [h, gclk, io0]
pb15:
pincodes: [j]
periph:
- [a, eic, extint15]
- [b, ptc, x15]
- [c, sercom4, pad3]
- [e, tc5, wo1]
- [h, gclk, io1]
pa12:
pincodes: [g, j]
periph:
- [a, eic, extint12]
- [c, sercom2, pad0]
- [d, sercom4, pad0]
- [e, tcc2, wo0, [d20]]
- [e, tc2, wo0, [d21-da1]]
- [f, tcc0, wo6, [d20]]
- [h, ac, cmp0]
pa13:
pincodes: [g, j]
periph:
- [a, eic, extint13]
- [c, sercom2, pad1]
- [d, sercom4, pad1]
- [e, tcc2, wo1, [d20]]
- [e, tc2, wo1, [d21-da1]]
- [f, tcc0, wo7, [d20]]
- [h, ac, cmp1]
pa14:
pincodes: [e, g, j]
periph:
- [a, eic, extint14]
- [c, sercom2, pad2]
- [d, sercom4, pad2]
- [e, tc3, wo0]
- [f, tcc0, wo4, [d20]]
- [h, gclk, io0]
pa15:
pincodes: [e, g, j]
periph:
- [a, eic, extint15]
- [c, sercom2, pad3]
- [d, sercom4, pad3]
- [e, tc3, wo1]
- [f, tcc0, wo5, [d20]]
- [h, gclk, io1]
pa16:
pincodes: [e, g, j]
periph:
- [a, eic, extint0]
- [b, ptc, x4]
- [c, sercom1, pad0]
- [d, sercom3, pad0]
- [e, tcc2, wo0, [d20]]
- [f, tcc0, wo6, [d20]]
- [f, tc2, wo0, [d21-da1]]
- [h, gclk, io2]
pa17:
pincodes: [e, g, j]
periph:
- [a, eic, extint1]
- [b, ptc, x5]
- [c, sercom1, pad1]
- [d, sercom3, pad1]
- [e, tcc2, wo1, [d20]]
- [f, tcc0, wo7, [d20]]
- [f, tc2, wo1, [d21-da1]]
- [h, gclk, io3]
pa18:
pincodes: [e, g, j]
periph:
- [a, eic, extint2]
- [b, ptc, x6]
- [c, sercom1, pad2]
- [d, sercom3, pad2]
- [f, tc3, wo0, [d20]]
- [f, tcc0, wo2, [d20]]
- [f, tc3, wo0, [d21-da1]]
- [h, ac, cmp0]
pa19:
pincodes: [e, g, j]
periph:
- [a, eic, extint3]
- [b, ptc, x7]
- [c, sercom1, pad3]
- [d, sercom3, pad3]
- [e, tc3, wo1, [d20]]
- [f, tcc0, wo3, [d20]]
- [f, tc3, wo1, [d21-da1]]
- [g, iis0, sd]
- [h, ac, cmp1]
pb16:
pincodes: [j]
periph:
- [a, eic, extint0]
- [c, sercom5, pad0]
- [e, tc6, wo0]
- [f, tcc0, wo4, [d20]]
- [g, iis1, sd, [d20]]
- [h, gclk, io2]
pb17:
pincodes: [j]
periph:
- [a, eic, extint1]
- [c, sercom5, pad1]
- [e, tc6, wo1]
- [f, tcc0, wo5, [d20]]
- [g, iis0, mck, [d20]]
- [h, gclk, io3]
pa20:
pincodes: [g, j]
periph:
- [a, eic, extint4]
- [b, ptc, x8]
- [c, sercom5, pad2]
- [d, sercom3, pad2]
- [e, tc7, wo0]
- [f, tcc0, wo6, [d20]]
- [g, iis0, sck, [d20]]
- [h, gclk, io4]
pa21:
pincodes: [g, j]
periph:
- [a, eic, extint5]
- [b, ptc, x9]
- [c, sercom5, pad3]
- [d, sercom3, pad3]
- [e, tc7, wo1]
- [f, tcc0, wo7, [d20]]
- [g, iis0, fs, [d20]]
- [h, gclk, io5]
pa22:
pincodes: [e, g, j]
periph:
- [a, eic, extint6]
- [b, ptc, x10]
- [c, sercom3, pad0]
- [d, sercom5, pad0]
- [e, tc4, wo0, [d20]]
- [f, tcc0, wo4, [d20]]
- [f, tc4, wo0, [d21-da1]]
- [h, gclk, io6]
pa23:
pincodes: [e, g, j]
periph:
- [a, eic, extint7]
- [b, ptc, x11]
- [c, sercom3, pad1]
- [d, sercom5, pad1]
- [e, tc4, wo1, [d20]]
- [f, tcc0, wo5, [d20]]
- [f, tc4, wo1, [d21-da1]]
- [g, usb, sof, [d20]]
- [h, gclk, io7]
pa24:
pincodes: [e, g, j]
periph:
- [a, eic, extint12]
- [c, sercom3, pad2]
- [d, sercom5, pad2]
- [e, tc5, wo0, [d20]]
- [f, tcc1, wo2, [d20]]
- [f, tc5, wo0, [d21-da1]]
- [g, usb, dm, [d20]]
pa25:
pincodes: [e, g, j]
periph:
- [a, eic, extint13]
- [c, sercom3, pad3]
- [d, sercom5, pad3]
- [e, tc5, wo1, [d20]]
- [f, tcc1, wo3, [d20]]
- [f, tc5, wo1, [d21-da1]]
- [g, usb, dp, [d20]]
pb22:
pincodes: [g, j]
periph:
- [a, eic, extint6]
- [d, sercom5, pad2]
- [e, tc7, wo0, [d20]]
- [f, tcc3, wo0, [d20]]
- [f, tc7, wo0, [d21-da1]]
- [h, gclk, io0]
pb23:
pincodes: [g, j]
periph:
- [a, eic, extint7]
- [d, sercom5, pad3]
- [e, tc7, wo1, [d20]]
- [f, tcc3, wo1, [d20]]
- [f, tc7, wo1, [d21-da1]]
- [h, gclk, io1]
pa27:
pincodes: [e, g, j]
periph:
- [a, eic, extint15]
- [f, tcc3, wo6, [d20]]
- [h, gclk, io0]
pa28:
pincodes: [e, g, j]
periph:
- [a, eic, extint8]
- [f, tcc3, wo7, [d20]]
- [h, gclk, io0]
pa30:
pincodes: [e, g, j]
periph:
- [a, eic, extint10]
- [d, sercom1, pad2]
- [e, tcc1, wo0, [d20]]
- [f, tcc3, wo4, [d20]]
- [f, tc1, wo0, [d21-da1]]
- [g, swd, clk]
- [h, gclk, io0]
pa31:
pincodes: [e, g, j]
periph:
- [a, eic, extint11]
- [d, sercom1, pad3]
- [e, tcc1, wo1, [d20]]
- [f, tcc3, wo5, [d20]]
- [f, tc1, wo1, [d21-da1]]
- [g, swd, io]
pb30:
pincodes: [j]
periph:
- [a, eic, extint14]
- [d, sercom5, pad0]
- [e, tcc0, wo0, [d20]]
- [f, tcc1, wo2, [d20]]
- [f, tc0, wo0, [d21-da1]]
pb31:
pincodes: [j]
periph:
- [a, eic, extint15]
- [d, sercom5, pad1]
- [e, tcc0, wo1, [d20]]
- [f, tcc1, wo3, [d20]]
- [f, tc0, wo1, [d21-da1]]
pb00:
pincodes: [j]
periph:
- [a, eic, extint0]
- [b, adc, ain8]
- [b, ptc, y6]
- [d, sercom5, pad2]
- [e, tc7, wo0, [d20]]
- [f, tc7, wo0, [d21-da1]]
pb01:
pincodes: [j]
periph:
- [a, eic, extint1]
- [b, adc, ain9]
- [b, ptc, y7]
- [d, sercom5, pad3]
- [e, tc7, wo1, [d20]]
- [f, tc7, wo0, [d21-da1]]
pb02:
pincodes: [g, j]
periph:
- [a, eic, extint2]
- [b, adc, ain10]
- [b, ptc, y8]
- [d, sercom5, pad0]
- [e, tc6, wo0, [d20]]
- [f, tcc3, wo2, [d20]]
- [f, tc6, wo0, [d21-da1]]
pb03:
pincodes: [g, j]
periph:
- [a, eic, extint3]
- [b, adc, ain11]
- [b, ptc, y9]
- [d, sercom5, pad1]
- [e, tc6, wo1, [d20]]
- [f, tcc3, wo3, [d20]]
- [f, tc6, wo1, [d21-da1]]